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1 | 5fafdf24 | ths | /*
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2 | 423f0742 | pbrook | * General purpose implementation of a simple periodic countdown timer.
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3 | 423f0742 | pbrook | *
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4 | 423f0742 | pbrook | * Copyright (c) 2007 CodeSourcery.
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5 | 423f0742 | pbrook | *
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6 | 423f0742 | pbrook | * This code is licenced under the GNU LGPL.
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7 | 423f0742 | pbrook | */
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8 | 87ecb68b | pbrook | #include "hw.h" |
9 | 87ecb68b | pbrook | #include "qemu-timer.h" |
10 | 423f0742 | pbrook | |
11 | 423f0742 | pbrook | |
12 | 423f0742 | pbrook | struct ptimer_state
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13 | 423f0742 | pbrook | { |
14 | 423f0742 | pbrook | int enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */ |
15 | 8d05ea8a | blueswir1 | uint64_t limit; |
16 | 8d05ea8a | blueswir1 | uint64_t delta; |
17 | 423f0742 | pbrook | uint32_t period_frac; |
18 | 423f0742 | pbrook | int64_t period; |
19 | 423f0742 | pbrook | int64_t last_event; |
20 | 423f0742 | pbrook | int64_t next_event; |
21 | 423f0742 | pbrook | QEMUBH *bh; |
22 | 423f0742 | pbrook | QEMUTimer *timer; |
23 | 423f0742 | pbrook | }; |
24 | 423f0742 | pbrook | |
25 | 423f0742 | pbrook | /* Use a bottom-half routine to avoid reentrancy issues. */
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26 | 423f0742 | pbrook | static void ptimer_trigger(ptimer_state *s) |
27 | 423f0742 | pbrook | { |
28 | 423f0742 | pbrook | if (s->bh) {
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29 | 423f0742 | pbrook | qemu_bh_schedule(s->bh); |
30 | 423f0742 | pbrook | } |
31 | 423f0742 | pbrook | } |
32 | 423f0742 | pbrook | |
33 | 423f0742 | pbrook | static void ptimer_reload(ptimer_state *s) |
34 | 423f0742 | pbrook | { |
35 | 423f0742 | pbrook | if (s->delta == 0) { |
36 | 423f0742 | pbrook | ptimer_trigger(s); |
37 | 423f0742 | pbrook | s->delta = s->limit; |
38 | 423f0742 | pbrook | } |
39 | 423f0742 | pbrook | if (s->delta == 0 || s->period == 0) { |
40 | 423f0742 | pbrook | fprintf(stderr, "Timer with period zero, disabling\n");
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41 | 423f0742 | pbrook | s->enabled = 0;
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42 | 423f0742 | pbrook | return;
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43 | 423f0742 | pbrook | } |
44 | 423f0742 | pbrook | |
45 | 423f0742 | pbrook | s->last_event = s->next_event; |
46 | 423f0742 | pbrook | s->next_event = s->last_event + s->delta * s->period; |
47 | 423f0742 | pbrook | if (s->period_frac) {
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48 | 423f0742 | pbrook | s->next_event += ((int64_t)s->period_frac * s->delta) >> 32;
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49 | 423f0742 | pbrook | } |
50 | 423f0742 | pbrook | qemu_mod_timer(s->timer, s->next_event); |
51 | 423f0742 | pbrook | } |
52 | 423f0742 | pbrook | |
53 | 423f0742 | pbrook | static void ptimer_tick(void *opaque) |
54 | 423f0742 | pbrook | { |
55 | 423f0742 | pbrook | ptimer_state *s = (ptimer_state *)opaque; |
56 | 423f0742 | pbrook | ptimer_trigger(s); |
57 | 423f0742 | pbrook | s->delta = 0;
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58 | 423f0742 | pbrook | if (s->enabled == 2) { |
59 | 423f0742 | pbrook | s->enabled = 0;
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60 | 423f0742 | pbrook | } else {
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61 | 423f0742 | pbrook | ptimer_reload(s); |
62 | 423f0742 | pbrook | } |
63 | 423f0742 | pbrook | } |
64 | 423f0742 | pbrook | |
65 | 8d05ea8a | blueswir1 | uint64_t ptimer_get_count(ptimer_state *s) |
66 | 423f0742 | pbrook | { |
67 | 423f0742 | pbrook | int64_t now; |
68 | 8d05ea8a | blueswir1 | uint64_t counter; |
69 | 423f0742 | pbrook | |
70 | 423f0742 | pbrook | if (s->enabled) {
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71 | 423f0742 | pbrook | now = qemu_get_clock(vm_clock); |
72 | 423f0742 | pbrook | /* Figure out the current counter value. */
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73 | 423f0742 | pbrook | if (now - s->next_event > 0 |
74 | 423f0742 | pbrook | || s->period == 0) {
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75 | 423f0742 | pbrook | /* Prevent timer underflowing if it should already have
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76 | 423f0742 | pbrook | triggered. */
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77 | 423f0742 | pbrook | counter = 0;
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78 | 423f0742 | pbrook | } else {
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79 | 8d05ea8a | blueswir1 | uint64_t rem; |
80 | 8d05ea8a | blueswir1 | uint64_t div; |
81 | 423f0742 | pbrook | |
82 | 423f0742 | pbrook | rem = s->next_event - now; |
83 | 423f0742 | pbrook | div = s->period; |
84 | 423f0742 | pbrook | counter = rem / div; |
85 | 423f0742 | pbrook | } |
86 | 423f0742 | pbrook | } else {
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87 | 423f0742 | pbrook | counter = s->delta; |
88 | 423f0742 | pbrook | } |
89 | 423f0742 | pbrook | return counter;
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90 | 423f0742 | pbrook | } |
91 | 423f0742 | pbrook | |
92 | 8d05ea8a | blueswir1 | void ptimer_set_count(ptimer_state *s, uint64_t count)
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93 | 423f0742 | pbrook | { |
94 | 423f0742 | pbrook | s->delta = count; |
95 | 423f0742 | pbrook | if (s->enabled) {
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96 | 423f0742 | pbrook | s->next_event = qemu_get_clock(vm_clock); |
97 | 423f0742 | pbrook | ptimer_reload(s); |
98 | 423f0742 | pbrook | } |
99 | 423f0742 | pbrook | } |
100 | 423f0742 | pbrook | |
101 | 423f0742 | pbrook | void ptimer_run(ptimer_state *s, int oneshot) |
102 | 423f0742 | pbrook | { |
103 | 423f0742 | pbrook | if (s->period == 0) { |
104 | 423f0742 | pbrook | fprintf(stderr, "Timer with period zero, disabling\n");
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105 | 423f0742 | pbrook | return;
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106 | 423f0742 | pbrook | } |
107 | 423f0742 | pbrook | s->enabled = oneshot ? 2 : 1; |
108 | 423f0742 | pbrook | s->next_event = qemu_get_clock(vm_clock); |
109 | 423f0742 | pbrook | ptimer_reload(s); |
110 | 423f0742 | pbrook | } |
111 | 423f0742 | pbrook | |
112 | 8d05ea8a | blueswir1 | /* Pause a timer. Note that this may cause it to "lose" time, even if it
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113 | 423f0742 | pbrook | is immediately restarted. */
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114 | 423f0742 | pbrook | void ptimer_stop(ptimer_state *s)
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115 | 423f0742 | pbrook | { |
116 | 423f0742 | pbrook | if (!s->enabled)
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117 | 423f0742 | pbrook | return;
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118 | 423f0742 | pbrook | |
119 | 423f0742 | pbrook | s->delta = ptimer_get_count(s); |
120 | 423f0742 | pbrook | qemu_del_timer(s->timer); |
121 | 423f0742 | pbrook | s->enabled = 0;
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122 | 423f0742 | pbrook | } |
123 | 423f0742 | pbrook | |
124 | 423f0742 | pbrook | /* Set counter increment interval in nanoseconds. */
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125 | 423f0742 | pbrook | void ptimer_set_period(ptimer_state *s, int64_t period)
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126 | 423f0742 | pbrook | { |
127 | 423f0742 | pbrook | s->period = period; |
128 | 423f0742 | pbrook | s->period_frac = 0;
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129 | 8d05ea8a | blueswir1 | if (s->enabled) {
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130 | 8d05ea8a | blueswir1 | s->next_event = qemu_get_clock(vm_clock); |
131 | 8d05ea8a | blueswir1 | ptimer_reload(s); |
132 | 8d05ea8a | blueswir1 | } |
133 | 423f0742 | pbrook | } |
134 | 423f0742 | pbrook | |
135 | 423f0742 | pbrook | /* Set counter frequency in Hz. */
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136 | 423f0742 | pbrook | void ptimer_set_freq(ptimer_state *s, uint32_t freq)
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137 | 423f0742 | pbrook | { |
138 | 423f0742 | pbrook | s->period = 1000000000ll / freq;
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139 | 423f0742 | pbrook | s->period_frac = (1000000000ll << 32) / freq; |
140 | 8d05ea8a | blueswir1 | if (s->enabled) {
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141 | 8d05ea8a | blueswir1 | s->next_event = qemu_get_clock(vm_clock); |
142 | 8d05ea8a | blueswir1 | ptimer_reload(s); |
143 | 8d05ea8a | blueswir1 | } |
144 | 423f0742 | pbrook | } |
145 | 423f0742 | pbrook | |
146 | 423f0742 | pbrook | /* Set the initial countdown value. If reload is nonzero then also set
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147 | 423f0742 | pbrook | count = limit. */
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148 | 8d05ea8a | blueswir1 | void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) |
149 | 423f0742 | pbrook | { |
150 | 423f0742 | pbrook | s->limit = limit; |
151 | 423f0742 | pbrook | if (reload)
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152 | 423f0742 | pbrook | s->delta = limit; |
153 | 62ea5b0b | pbrook | if (s->enabled && reload) {
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154 | 8d05ea8a | blueswir1 | s->next_event = qemu_get_clock(vm_clock); |
155 | 8d05ea8a | blueswir1 | ptimer_reload(s); |
156 | 8d05ea8a | blueswir1 | } |
157 | 8d05ea8a | blueswir1 | } |
158 | 8d05ea8a | blueswir1 | |
159 | 8d05ea8a | blueswir1 | void qemu_put_ptimer(QEMUFile *f, ptimer_state *s)
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160 | 8d05ea8a | blueswir1 | { |
161 | 8d05ea8a | blueswir1 | qemu_put_byte(f, s->enabled); |
162 | 8d05ea8a | blueswir1 | qemu_put_be64s(f, &s->limit); |
163 | 8d05ea8a | blueswir1 | qemu_put_be64s(f, &s->delta); |
164 | 8d05ea8a | blueswir1 | qemu_put_be32s(f, &s->period_frac); |
165 | 8d05ea8a | blueswir1 | qemu_put_be64s(f, &s->period); |
166 | 8d05ea8a | blueswir1 | qemu_put_be64s(f, &s->last_event); |
167 | 8d05ea8a | blueswir1 | qemu_put_be64s(f, &s->next_event); |
168 | 8d05ea8a | blueswir1 | qemu_put_timer(f, s->timer); |
169 | 8d05ea8a | blueswir1 | } |
170 | 8d05ea8a | blueswir1 | |
171 | 8d05ea8a | blueswir1 | void qemu_get_ptimer(QEMUFile *f, ptimer_state *s)
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172 | 8d05ea8a | blueswir1 | { |
173 | 8d05ea8a | blueswir1 | s->enabled = qemu_get_byte(f); |
174 | 8d05ea8a | blueswir1 | qemu_get_be64s(f, &s->limit); |
175 | 8d05ea8a | blueswir1 | qemu_get_be64s(f, &s->delta); |
176 | 8d05ea8a | blueswir1 | qemu_get_be32s(f, &s->period_frac); |
177 | 8d05ea8a | blueswir1 | qemu_get_be64s(f, &s->period); |
178 | 8d05ea8a | blueswir1 | qemu_get_be64s(f, &s->last_event); |
179 | 8d05ea8a | blueswir1 | qemu_get_be64s(f, &s->next_event); |
180 | 8d05ea8a | blueswir1 | qemu_get_timer(f, s->timer); |
181 | 423f0742 | pbrook | } |
182 | 423f0742 | pbrook | |
183 | 423f0742 | pbrook | ptimer_state *ptimer_init(QEMUBH *bh) |
184 | 423f0742 | pbrook | { |
185 | 423f0742 | pbrook | ptimer_state *s; |
186 | 423f0742 | pbrook | |
187 | 423f0742 | pbrook | s = (ptimer_state *)qemu_mallocz(sizeof(ptimer_state));
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188 | 423f0742 | pbrook | s->bh = bh; |
189 | 423f0742 | pbrook | s->timer = qemu_new_timer(vm_clock, ptimer_tick, s); |
190 | 423f0742 | pbrook | return s;
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191 | 423f0742 | pbrook | } |