root / tests / cris / check_scc.s @ 1ffc346f
History | View | Annotate | Download (1.1 kB)
1 | dd43edf4 | ths | # mach: crisv0 crisv3 crisv8 crisv10 crisv32 |
---|---|---|---|
2 | dd43edf4 | ths | # output: 1\n0\n1\n0\n1\n0\n1\n0\n0\n1\n1\n0\n1\n0\n1\n0\n1\n0\n0\n1\n0\n1\n1\n0\n1\n0\n0\n1\n1\n0\n1\n1\n0\n |
3 | dd43edf4 | ths | |
4 | dd43edf4 | ths | .include "testutils.inc" |
5 | dd43edf4 | ths | |
6 | dd43edf4 | ths | .macro lcheckr3 v |
7 | dd43edf4 | ths | move $ccs, $r9 |
8 | dd43edf4 | ths | checkr3 \v |
9 | dd43edf4 | ths | move $r9, $ccs |
10 | dd43edf4 | ths | .endm |
11 | dd43edf4 | ths | |
12 | dd43edf4 | ths | start |
13 | dd43edf4 | ths | clearf nzvc |
14 | dd43edf4 | ths | scc r3 |
15 | dd43edf4 | ths | lcheckr3 1 |
16 | dd43edf4 | ths | scs r3 |
17 | dd43edf4 | ths | lcheckr3 0 |
18 | dd43edf4 | ths | sne r3 |
19 | dd43edf4 | ths | lcheckr3 1 |
20 | dd43edf4 | ths | seq r3 |
21 | dd43edf4 | ths | lcheckr3 0 |
22 | dd43edf4 | ths | svc r3 |
23 | dd43edf4 | ths | lcheckr3 1 |
24 | dd43edf4 | ths | svs r3 |
25 | dd43edf4 | ths | lcheckr3 0 |
26 | dd43edf4 | ths | spl r3 |
27 | dd43edf4 | ths | lcheckr3 1 |
28 | dd43edf4 | ths | smi r3 |
29 | dd43edf4 | ths | lcheckr3 0 |
30 | dd43edf4 | ths | sls r3 |
31 | dd43edf4 | ths | lcheckr3 0 |
32 | dd43edf4 | ths | shi r3 |
33 | dd43edf4 | ths | lcheckr3 1 |
34 | dd43edf4 | ths | sge r3 |
35 | dd43edf4 | ths | lcheckr3 1 |
36 | dd43edf4 | ths | slt r3 |
37 | dd43edf4 | ths | lcheckr3 0 |
38 | dd43edf4 | ths | sgt r3 |
39 | dd43edf4 | ths | lcheckr3 1 |
40 | dd43edf4 | ths | sle r3 |
41 | dd43edf4 | ths | lcheckr3 0 |
42 | dd43edf4 | ths | sa r3 |
43 | dd43edf4 | ths | lcheckr3 1 |
44 | dd43edf4 | ths | setf nzvc |
45 | dd43edf4 | ths | scc r3 |
46 | dd43edf4 | ths | lcheckr3 0 |
47 | dd43edf4 | ths | scs r3 |
48 | dd43edf4 | ths | lcheckr3 1 |
49 | dd43edf4 | ths | sne r3 |
50 | dd43edf4 | ths | lcheckr3 0 |
51 | dd43edf4 | ths | svc r3 |
52 | dd43edf4 | ths | lcheckr3 0 |
53 | dd43edf4 | ths | svs r3 |
54 | dd43edf4 | ths | lcheckr3 1 |
55 | dd43edf4 | ths | spl r3 |
56 | dd43edf4 | ths | lcheckr3 0 |
57 | dd43edf4 | ths | smi r3 |
58 | dd43edf4 | ths | lcheckr3 1 |
59 | dd43edf4 | ths | sls r3 |
60 | dd43edf4 | ths | lcheckr3 1 |
61 | dd43edf4 | ths | shi r3 |
62 | dd43edf4 | ths | lcheckr3 0 |
63 | dd43edf4 | ths | sge r3 |
64 | dd43edf4 | ths | lcheckr3 1 |
65 | dd43edf4 | ths | slt r3 |
66 | dd43edf4 | ths | lcheckr3 0 |
67 | dd43edf4 | ths | sgt r3 |
68 | dd43edf4 | ths | lcheckr3 0 |
69 | dd43edf4 | ths | sle r3 |
70 | dd43edf4 | ths | lcheckr3 1 |
71 | dd43edf4 | ths | sa r3 |
72 | dd43edf4 | ths | lcheckr3 1 |
73 | dd43edf4 | ths | clearf n |
74 | dd43edf4 | ths | sge r3 |
75 | dd43edf4 | ths | lcheckr3 0 |
76 | dd43edf4 | ths | slt r3 |
77 | dd43edf4 | ths | lcheckr3 1 |
78 | dd43edf4 | ths | |
79 | dd43edf4 | ths | .if 1 ;..asm.arch.cris.v32 |
80 | dd43edf4 | ths | setf p |
81 | dd43edf4 | ths | ssb r3 |
82 | dd43edf4 | ths | .else |
83 | dd43edf4 | ths | moveq 1,r3 |
84 | dd43edf4 | ths | .endif |
85 | dd43edf4 | ths | lcheckr3 1 |
86 | dd43edf4 | ths | |
87 | dd43edf4 | ths | .if 1 ;..asm.arch.cris.v32 |
88 | dd43edf4 | ths | clearf p |
89 | dd43edf4 | ths | ssb r3 |
90 | dd43edf4 | ths | .else |
91 | dd43edf4 | ths | moveq 0,r3 |
92 | dd43edf4 | ths | .endif |
93 | dd43edf4 | ths | lcheckr3 0 |
94 | dd43edf4 | ths | |
95 | dd43edf4 | ths | quit |