Revision 20132b96 target-sparc/translate.c

b/target-sparc/translate.c
1005 1005
    }
1006 1006
}
1007 1007

  
1008
static inline void save_state(DisasContext *dc)
1008
static inline void update_psr(DisasContext *dc)
1009 1009
{
1010
    tcg_gen_movi_tl(cpu_pc, dc->pc);
1011
    /* flush pending conditional evaluations before exposing cpu state */
1012 1010
    if (dc->cc_op != CC_OP_FLAGS) {
1013 1011
        dc->cc_op = CC_OP_FLAGS;
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        gen_helper_compute_psr(cpu_env);
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    }
1014
}
1015

  
1016
static inline void save_state(DisasContext *dc)
1017
{
1018
    tcg_gen_movi_tl(cpu_pc, dc->pc);
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    save_npc(dc);
1017 1020
}
1018 1021

  
......
2704 2707
                    break;
2705 2708
#ifdef TARGET_SPARC64
2706 2709
                case 0x2: /* V9 rdccr */
2707
                    gen_helper_compute_psr(cpu_env);
2710
                    update_psr(dc);
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                    gen_helper_rdccr(cpu_dst, cpu_env);
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                    gen_movl_TN_reg(rd, cpu_dst);
2710 2713
                    break;
......
2783 2786
#if !defined(CONFIG_USER_ONLY)
2784 2787
            } else if (xop == 0x29) { /* rdpsr / UA2005 rdhpr */
2785 2788
#ifndef TARGET_SPARC64
2786
                if (!supervisor(dc))
2789
                if (!supervisor(dc)) {
2787 2790
                    goto priv_insn;
2788
                gen_helper_compute_psr(cpu_env);
2789
                dc->cc_op = CC_OP_FLAGS;
2791
                }
2792
                update_psr(dc);
2790 2793
                gen_helper_rdpsr(cpu_dst, cpu_env);
2791 2794
#else
2792 2795
                CHECK_IU_FEATURE(dc, HYPV);
......
3612 3615
                        dc->cc_op = CC_OP_TSUBTV;
3613 3616
                        break;
3614 3617
                    case 0x24: /* mulscc */
3615
                        gen_helper_compute_psr(cpu_env);
3618
                        update_psr(dc);
3616 3619
                        gen_op_mulscc(cpu_dst, cpu_src1, cpu_src2);
3617 3620
                        gen_movl_TN_reg(rd, cpu_dst);
3618 3621
                        tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD);
......
4651 4654
        {
4652 4655
            unsigned int xop = GET_FIELD(insn, 7, 12);
4653 4656

  
4654
            /* flush pending conditional evaluations before exposing
4655
               cpu state */
4656
            if (dc->cc_op != CC_OP_FLAGS) {
4657
                dc->cc_op = CC_OP_FLAGS;
4658
                gen_helper_compute_psr(cpu_env);
4659
            }
4660 4657
            cpu_src1 = get_src1(insn, cpu_src1);
4661 4658
            if (xop == 0x3c || xop == 0x3e) { // V9 casa/casxa
4662 4659
                rs2 = GET_FIELD(insn, 27, 31);
......
5507 5504
    } else {
5508 5505
        env->npc = npc;
5509 5506
    }
5510

  
5511
    /* flush pending conditional evaluations before exposing cpu state */
5512
    if (CC_OP != CC_OP_FLAGS) {
5513
        helper_compute_psr(env);
5514
    }
5515 5507
}

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