Revision 2065061e target-sparc/helper.c
b/target-sparc/helper.c | ||
---|---|---|
420 | 420 |
|
421 | 421 |
static int get_physical_address_data(CPUState *env, |
422 | 422 |
target_phys_addr_t *physical, int *prot, |
423 |
target_ulong address, int rw, int is_user)
|
|
423 |
target_ulong address, int rw, int mmu_idx)
|
|
424 | 424 |
{ |
425 | 425 |
unsigned int i; |
426 | 426 |
uint64_t context; |
427 | 427 |
|
428 |
int is_user = (mmu_idx == MMU_USER_IDX || |
|
429 |
mmu_idx == MMU_USER_SECONDARY_IDX); |
|
430 |
|
|
428 | 431 |
if ((env->lsu & DMMU_E) == 0) { /* DMMU disabled */ |
429 | 432 |
*physical = ultrasparc_truncate_physical(address); |
430 | 433 |
*prot = PAGE_READ | PAGE_WRITE; |
431 | 434 |
return 0; |
432 | 435 |
} |
433 | 436 |
|
434 |
if (env->tl == 0) { |
|
437 |
switch(mmu_idx) { |
|
438 |
case MMU_USER_IDX: |
|
439 |
case MMU_KERNEL_IDX: |
|
435 | 440 |
context = env->dmmu.mmu_primary_context & 0x1fff; |
436 |
} else { |
|
441 |
break; |
|
442 |
case MMU_USER_SECONDARY_IDX: |
|
443 |
case MMU_KERNEL_SECONDARY_IDX: |
|
444 |
context = env->dmmu.mmu_secondary_context & 0x1fff; |
|
445 |
break; |
|
446 |
case MMU_NUCLEUS_IDX: |
|
437 | 447 |
context = 0; |
448 |
break; |
|
438 | 449 |
} |
439 | 450 |
|
440 | 451 |
for (i = 0; i < 64; i++) { |
... | ... | |
482 | 493 |
|
483 | 494 |
static int get_physical_address_code(CPUState *env, |
484 | 495 |
target_phys_addr_t *physical, int *prot, |
485 |
target_ulong address, int is_user)
|
|
496 |
target_ulong address, int mmu_idx)
|
|
486 | 497 |
{ |
487 | 498 |
unsigned int i; |
488 | 499 |
uint64_t context; |
489 | 500 |
|
501 |
int is_user = (mmu_idx == MMU_USER_IDX || |
|
502 |
mmu_idx == MMU_USER_SECONDARY_IDX); |
|
503 |
|
|
490 | 504 |
if ((env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0) { |
491 | 505 |
/* IMMU disabled */ |
492 | 506 |
*physical = ultrasparc_truncate_physical(address); |
... | ... | |
495 | 509 |
} |
496 | 510 |
|
497 | 511 |
if (env->tl == 0) { |
512 |
/* PRIMARY context */ |
|
498 | 513 |
context = env->dmmu.mmu_primary_context & 0x1fff; |
499 | 514 |
} else { |
515 |
/* NUCLEUS context */ |
|
500 | 516 |
context = 0; |
501 | 517 |
} |
502 | 518 |
|
... | ... | |
535 | 551 |
target_ulong address, int rw, int mmu_idx, |
536 | 552 |
target_ulong *page_size) |
537 | 553 |
{ |
538 |
int is_user = mmu_idx == MMU_USER_IDX; |
|
539 |
|
|
540 | 554 |
/* ??? We treat everything as a small page, then explicitly flush |
541 | 555 |
everything when an entry is evicted. */ |
542 | 556 |
*page_size = TARGET_PAGE_SIZE; |
543 | 557 |
if (rw == 2) |
544 | 558 |
return get_physical_address_code(env, physical, prot, address, |
545 |
is_user);
|
|
559 |
mmu_idx);
|
|
546 | 560 |
else |
547 | 561 |
return get_physical_address_data(env, physical, prot, address, rw, |
548 |
is_user);
|
|
562 |
mmu_idx);
|
|
549 | 563 |
} |
550 | 564 |
|
551 | 565 |
/* Perform address translation */ |
... | ... | |
659 | 673 |
|
660 | 674 |
|
661 | 675 |
#if !defined(CONFIG_USER_ONLY) |
662 |
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) |
|
676 |
target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, |
|
677 |
int mmu_idx) |
|
663 | 678 |
{ |
664 | 679 |
target_phys_addr_t phys_addr; |
665 | 680 |
target_ulong page_size; |
666 | 681 |
int prot, access_index; |
667 | 682 |
|
668 | 683 |
if (get_physical_address(env, &phys_addr, &prot, &access_index, addr, 2, |
669 |
MMU_KERNEL_IDX, &page_size) != 0)
|
|
684 |
mmu_idx, &page_size) != 0)
|
|
670 | 685 |
if (get_physical_address(env, &phys_addr, &prot, &access_index, addr, |
671 |
0, MMU_KERNEL_IDX, &page_size) != 0)
|
|
686 |
0, mmu_idx, &page_size) != 0)
|
|
672 | 687 |
return -1; |
673 | 688 |
if (cpu_get_physical_page_desc(phys_addr) == IO_MEM_UNASSIGNED) |
674 | 689 |
return -1; |
675 | 690 |
return phys_addr; |
676 | 691 |
} |
692 |
|
|
693 |
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) |
|
694 |
{ |
|
695 |
return cpu_get_phys_page_nofault(env, addr, MMU_KERNEL_IDX); |
|
696 |
} |
|
677 | 697 |
#endif |
678 | 698 |
|
679 | 699 |
void cpu_reset(CPUSPARCState *env) |
Also available in: Unified diff