Revision 20dcee94 target-m68k/cpu.h
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| 59 | 59 |
uint32_t pc; |
| 60 | 60 |
uint32_t sr; |
| 61 | 61 |
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/* SSP and USP. The current_sp is stored in aregs[7], the other here. */ |
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int current_sp; |
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uint32_t sp[2]; |
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| 65 |
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| 62 | 66 |
/* Condition flags. */ |
| 63 | 67 |
uint32_t cc_op; |
| 64 | 68 |
uint32_t cc_dest; |
| ... | ... | |
| 92 | 96 |
uint32_t vbr; |
| 93 | 97 |
uint32_t mbar; |
| 94 | 98 |
uint32_t rambar0; |
| 99 |
uint32_t cacr; |
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| 95 | 100 |
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| 96 | 101 |
uint32_t features; |
| 97 | 102 |
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| ... | ... | |
| 151 | 156 |
#define SR_S 0x2000 |
| 152 | 157 |
#define SR_T 0x8000 |
| 153 | 158 |
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#define M68K_SSP 0 |
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#define M68K_USP 1 |
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/* CACR fields are implementation defined, but some bits are common. */ |
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#define M68K_CACR_EUSP 0x10 |
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| 154 | 165 |
#define MACSR_PAV0 0x100 |
| 155 | 166 |
#define MACSR_OMC 0x080 |
| 156 | 167 |
#define MACSR_SU 0x040 |
| ... | ... | |
| 167 | 178 |
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| 168 | 179 |
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); |
| 169 | 180 |
void m68k_set_macsr(CPUM68KState *env, uint32_t val); |
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void m68k_switch_sp(CPUM68KState *env); |
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| 170 | 182 |
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| 171 | 183 |
#define M68K_FPCR_PREC (1 << 6) |
| 172 | 184 |
|
| ... | ... | |
| 179 | 191 |
M68K_FEATURE_CF_FPU, |
| 180 | 192 |
M68K_FEATURE_CF_MAC, |
| 181 | 193 |
M68K_FEATURE_CF_EMAC, |
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M68K_FEATURE_USP, |
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| 182 | 195 |
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */ |
| 183 | 196 |
M68K_FEATURE_WORD_INDEX /* word sized address index registers. */ |
| 184 | 197 |
}; |
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