Archipelago » qemu

/*

 *  MIPS emulation helpers for qemu.

 *

 *  Copyright (c) 2004-2005 Jocelyn Mayer

 *

 * This library is free software; you can redistribute it and/or

 * modify it under the terms of the GNU Lesser General Public

 * License as published by the Free Software Foundation; either

 * version 2 of the License, or (at your option) any later version.

 *

 * This library is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * Lesser General Public License for more details.

 *

 * You should have received a copy of the GNU Lesser General Public

 * License along with this library; if not, see <http://www.gnu.org/licenses/>.

 */

#include <stdlib.h>

#include "exec.h"

#include "host-utils.h"

#include "helper.h"

#ifndef CONFIG_USER_ONLY

static inline void cpu_mips_tlb_flush (CPUState *env, int flush_global);

#endif

/*****************************************************************************/

/* Exceptions processing helpers */

void helper_raise_exception_err (uint32_t exception, int error_code)

{

#if 1

    if (exception < 0x100)

        qemu_log("%s: %d %d\n", __func__, exception, error_code);

#endif

    env->exception_index = exception;

    env->error_code = error_code;

    cpu_loop_exit();

}

void helper_raise_exception (uint32_t exception)

{

    helper_raise_exception_err(exception, 0);

}

#if !defined(CONFIG_USER_ONLY)

static void do_restore_state (void *pc_ptr)

{

    TranslationBlock *tb;

    unsigned long pc = (unsigned long) pc_ptr;

    tb = tb_find_pc (pc);

    if (tb) {

        cpu_restore_state (tb, env, pc, NULL);

    }

}

#endif

#if defined(CONFIG_USER_ONLY)

#define HELPER_LD(name, insn, type)                                     \

static inline type do_##name(target_ulong addr, int mem_idx)            \

{                                                                       \

    return (type) insn##_raw(addr);                                     \

}

#else

#define HELPER_LD(name, insn, type)                                     \

static inline type do_##name(target_ulong addr, int mem_idx)            \

{                                                                       \

    switch (mem_idx)                                                    \

    {                                                                   \

    case 0: return (type) insn##_kernel(addr); break;                   \

    case 1: return (type) insn##_super(addr); break;                    \

    default:                                                            \

    case 2: return (type) insn##_user(addr); break;                     \

    }                                                                   \

}

#endif

HELPER_LD(lbu, ldub, uint8_t)

HELPER_LD(lw, ldl, int32_t)

#ifdef TARGET_MIPS64

HELPER_LD(ld, ldq, int64_t)

#endif

#undef HELPER_LD

#if defined(CONFIG_USER_ONLY)

#define HELPER_ST(name, insn, type)                                     \

static inline void do_##name(target_ulong addr, type val, int mem_idx)  \

{                                                                       \

    insn##_raw(addr, val);                                              \

}

#else

#define HELPER_ST(name, insn, type)                                     \

static inline void do_##name(target_ulong addr, type val, int mem_idx)  \

{                                                                       \

    switch (mem_idx)                                                    \

    {                                                                   \

    case 0: insn##_kernel(addr, val); break;                            \

    case 1: insn##_super(addr, val); break;                             \

    default:                                                            \

    case 2: insn##_user(addr, val); break;                              \

    }                                                                   \

}

#endif

HELPER_ST(sb, stb, uint8_t)

HELPER_ST(sw, stl, uint32_t)

#ifdef TARGET_MIPS64

HELPER_ST(sd, stq, uint64_t)

#endif

#undef HELPER_ST

target_ulong helper_clo (target_ulong arg1)

{

    return clo32(arg1);

}

target_ulong helper_clz (target_ulong arg1)

{

    return clz32(arg1);

}

#if defined(TARGET_MIPS64)

target_ulong helper_dclo (target_ulong arg1)

{

    return clo64(arg1);

}

target_ulong helper_dclz (target_ulong arg1)

{

    return clz64(arg1);

}

#endif /* TARGET_MIPS64 */

/* 64 bits arithmetic for 32 bits hosts */

static inline uint64_t get_HILO (void)

{

    return ((uint64_t)(env->active_tc.HI[0]) << 32) | (uint32_t)env->active_tc.LO[0];

}

static inline void set_HILO (uint64_t HILO)

{

    env->active_tc.LO[0] = (int32_t)HILO;

    env->active_tc.HI[0] = (int32_t)(HILO >> 32);

}

static inline void set_HIT0_LO (target_ulong arg1, uint64_t HILO)

{

    env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);

    arg1 = env->active_tc.HI[0] = (int32_t)(HILO >> 32);

}

static inline void set_HI_LOT0 (target_ulong arg1, uint64_t HILO)

{

    arg1 = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);

    env->active_tc.HI[0] = (int32_t)(HILO >> 32);

}

/* Multiplication variants of the vr54xx. */

target_ulong helper_muls (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, 0 - ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_mulsu (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, 0 - ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

target_ulong helper_macc (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, ((int64_t)get_HILO()) + ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_macchi (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, ((int64_t)get_HILO()) + ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_maccu (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, ((uint64_t)get_HILO()) + ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

target_ulong helper_macchiu (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, ((uint64_t)get_HILO()) + ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

target_ulong helper_msac (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, ((int64_t)get_HILO()) - ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_msachi (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, ((int64_t)get_HILO()) - ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_msacu (target_ulong arg1, target_ulong arg2)

{

    set_HI_LOT0(arg1, ((uint64_t)get_HILO()) - ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

target_ulong helper_msachiu (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, ((uint64_t)get_HILO()) - ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

target_ulong helper_mulhi (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);

    return arg1;

}

target_ulong helper_mulhiu (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);

    return arg1;

}

target_ulong helper_mulshi (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, 0 - ((int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2));

    return arg1;

}

target_ulong helper_mulshiu (target_ulong arg1, target_ulong arg2)

{

    set_HIT0_LO(arg1, 0 - ((uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2));

    return arg1;

}

#ifdef TARGET_MIPS64

void helper_dmult (target_ulong arg1, target_ulong arg2)

{

    muls64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2);

}

void helper_dmultu (target_ulong arg1, target_ulong arg2)

{

    mulu64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2);

}

#endif

#ifndef CONFIG_USER_ONLY

static inline target_phys_addr_t do_translate_address(target_ulong address, int rw)

{

    target_phys_addr_t lladdr;

    lladdr = cpu_mips_translate_address(env, address, rw);

    if (lladdr == -1LL) {

        cpu_loop_exit();

    } else {

        return lladdr;

    }

}

#define HELPER_LD_ATOMIC(name, insn)                                          \

target_ulong helper_##name(target_ulong arg, int mem_idx)                     \

{                                                                             \

    env->lladdr = do_translate_address(arg, 0);                               \

    env->llval = do_##insn(arg, mem_idx);                                     \

    return env->llval;                                                        \

}

HELPER_LD_ATOMIC(ll, lw)

#ifdef TARGET_MIPS64

HELPER_LD_ATOMIC(lld, ld)

#endif

#undef HELPER_LD_ATOMIC

#define HELPER_ST_ATOMIC(name, ld_insn, st_insn, almask)                      \

target_ulong helper_##name(target_ulong arg1, target_ulong arg2, int mem_idx) \

{                                                                             \

    target_long tmp;                                                          \

                                                                              \

    if (arg2 & almask) {                                                      \

        env->CP0_BadVAddr = arg2;                                             \

        helper_raise_exception(EXCP_AdES);                                    \

    }                                                                         \

    if (do_translate_address(arg2, 1) == env->lladdr) {                       \

        tmp = do_##ld_insn(arg2, mem_idx);                                    \

        if (tmp == env->llval) {                                              \

            do_##st_insn(arg2, arg1, mem_idx);                                \

            return 1;                                                         \

        }                                                                     \

    }                                                                         \

    return 0;                                                                 \

}

HELPER_ST_ATOMIC(sc, lw, sw, 0x3)

#ifdef TARGET_MIPS64

HELPER_ST_ATOMIC(scd, ld, sd, 0x7)

#endif

#undef HELPER_ST_ATOMIC

#endif

#ifdef TARGET_WORDS_BIGENDIAN

#define GET_LMASK(v) ((v) & 3)

#define GET_OFFSET(addr, offset) (addr + (offset))

#else

#define GET_LMASK(v) (((v) & 3) ^ 3)

#define GET_OFFSET(addr, offset) (addr - (offset))

#endif

target_ulong helper_lwl(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    target_ulong tmp;

    tmp = do_lbu(arg2, mem_idx);

    arg1 = (arg1 & 0x00FFFFFF) | (tmp << 24);

    if (GET_LMASK(arg2) <= 2) {

        tmp = do_lbu(GET_OFFSET(arg2, 1), mem_idx);

        arg1 = (arg1 & 0xFF00FFFF) | (tmp << 16);

    }

    if (GET_LMASK(arg2) <= 1) {

        tmp = do_lbu(GET_OFFSET(arg2, 2), mem_idx);

        arg1 = (arg1 & 0xFFFF00FF) | (tmp << 8);

    }

    if (GET_LMASK(arg2) == 0) {

        tmp = do_lbu(GET_OFFSET(arg2, 3), mem_idx);

        arg1 = (arg1 & 0xFFFFFF00) | tmp;

    }

    return (int32_t)arg1;

}

target_ulong helper_lwr(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    target_ulong tmp;

    tmp = do_lbu(arg2, mem_idx);

    arg1 = (arg1 & 0xFFFFFF00) | tmp;

    if (GET_LMASK(arg2) >= 1) {

        tmp = do_lbu(GET_OFFSET(arg2, -1), mem_idx);

        arg1 = (arg1 & 0xFFFF00FF) | (tmp << 8);

    }

    if (GET_LMASK(arg2) >= 2) {

        tmp = do_lbu(GET_OFFSET(arg2, -2), mem_idx);

        arg1 = (arg1 & 0xFF00FFFF) | (tmp << 16);

    }

    if (GET_LMASK(arg2) == 3) {

        tmp = do_lbu(GET_OFFSET(arg2, -3), mem_idx);

        arg1 = (arg1 & 0x00FFFFFF) | (tmp << 24);

    }

    return (int32_t)arg1;

}

void helper_swl(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    do_sb(arg2, (uint8_t)(arg1 >> 24), mem_idx);

    if (GET_LMASK(arg2) <= 2)

        do_sb(GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16), mem_idx);

    if (GET_LMASK(arg2) <= 1)

        do_sb(GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8), mem_idx);

    if (GET_LMASK(arg2) == 0)

        do_sb(GET_OFFSET(arg2, 3), (uint8_t)arg1, mem_idx);

}

void helper_swr(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    do_sb(arg2, (uint8_t)arg1, mem_idx);

    if (GET_LMASK(arg2) >= 1)

        do_sb(GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx);

    if (GET_LMASK(arg2) >= 2)

        do_sb(GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx);

    if (GET_LMASK(arg2) == 3)

        do_sb(GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx);

}

#if defined(TARGET_MIPS64)

/* "half" load and stores.  We must do the memory access inline,

   or fault handling won't work.  */

#ifdef TARGET_WORDS_BIGENDIAN

#define GET_LMASK64(v) ((v) & 7)

#else

#define GET_LMASK64(v) (((v) & 7) ^ 7)

#endif

target_ulong helper_ldl(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    uint64_t tmp;

    tmp = do_lbu(arg2, mem_idx);

    arg1 = (arg1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);

    if (GET_LMASK64(arg2) <= 6) {

        tmp = do_lbu(GET_OFFSET(arg2, 1), mem_idx);

        arg1 = (arg1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);

    }

    if (GET_LMASK64(arg2) <= 5) {

        tmp = do_lbu(GET_OFFSET(arg2, 2), mem_idx);

        arg1 = (arg1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);

    }

    if (GET_LMASK64(arg2) <= 4) {

        tmp = do_lbu(GET_OFFSET(arg2, 3), mem_idx);

        arg1 = (arg1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);

    }

    if (GET_LMASK64(arg2) <= 3) {

        tmp = do_lbu(GET_OFFSET(arg2, 4), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);

    }

    if (GET_LMASK64(arg2) <= 2) {

        tmp = do_lbu(GET_OFFSET(arg2, 5), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);

    }

    if (GET_LMASK64(arg2) <= 1) {

        tmp = do_lbu(GET_OFFSET(arg2, 6), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8);

    }

    if (GET_LMASK64(arg2) == 0) {

        tmp = do_lbu(GET_OFFSET(arg2, 7), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;

    }

    return arg1;

}

target_ulong helper_ldr(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    uint64_t tmp;

    tmp = do_lbu(arg2, mem_idx);

    arg1 = (arg1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;

    if (GET_LMASK64(arg2) >= 1) {

        tmp = do_lbu(GET_OFFSET(arg2, -1), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFFFFFF00FFULL) | (tmp  << 8);

    }

    if (GET_LMASK64(arg2) >= 2) {

        tmp = do_lbu(GET_OFFSET(arg2, -2), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);

    }

    if (GET_LMASK64(arg2) >= 3) {

        tmp = do_lbu(GET_OFFSET(arg2, -3), mem_idx);

        arg1 = (arg1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);

    }

    if (GET_LMASK64(arg2) >= 4) {

        tmp = do_lbu(GET_OFFSET(arg2, -4), mem_idx);

        arg1 = (arg1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);

    }

    if (GET_LMASK64(arg2) >= 5) {

        tmp = do_lbu(GET_OFFSET(arg2, -5), mem_idx);

        arg1 = (arg1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);

    }

    if (GET_LMASK64(arg2) >= 6) {

        tmp = do_lbu(GET_OFFSET(arg2, -6), mem_idx);

        arg1 = (arg1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);

    }

    if (GET_LMASK64(arg2) == 7) {

        tmp = do_lbu(GET_OFFSET(arg2, -7), mem_idx);

        arg1 = (arg1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);

    }

    return arg1;

}

void helper_sdl(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    do_sb(arg2, (uint8_t)(arg1 >> 56), mem_idx);

    if (GET_LMASK64(arg2) <= 6)

        do_sb(GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48), mem_idx);

    if (GET_LMASK64(arg2) <= 5)

        do_sb(GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40), mem_idx);

    if (GET_LMASK64(arg2) <= 4)

        do_sb(GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32), mem_idx);

    if (GET_LMASK64(arg2) <= 3)

        do_sb(GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24), mem_idx);

    if (GET_LMASK64(arg2) <= 2)

        do_sb(GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16), mem_idx);

    if (GET_LMASK64(arg2) <= 1)

        do_sb(GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), mem_idx);

    if (GET_LMASK64(arg2) <= 0)

        do_sb(GET_OFFSET(arg2, 7), (uint8_t)arg1, mem_idx);

}

void helper_sdr(target_ulong arg1, target_ulong arg2, int mem_idx)

{

    do_sb(arg2, (uint8_t)arg1, mem_idx);

    if (GET_LMASK64(arg2) >= 1)

        do_sb(GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx);

    if (GET_LMASK64(arg2) >= 2)

        do_sb(GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx);

    if (GET_LMASK64(arg2) >= 3)

        do_sb(GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx);

    if (GET_LMASK64(arg2) >= 4)

        do_sb(GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32), mem_idx);

    if (GET_LMASK64(arg2) >= 5)

        do_sb(GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40), mem_idx);

    if (GET_LMASK64(arg2) >= 6)

        do_sb(GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48), mem_idx);

    if (GET_LMASK64(arg2) == 7)

        do_sb(GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56), mem_idx);

}

#endif /* TARGET_MIPS64 */

static const int multiple_regs[] = { 16, 17, 18, 19, 20, 21, 22, 23, 30 };

void helper_lwm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)

{

    target_ulong base_reglist = reglist & 0xf;

    target_ulong do_r31 = reglist & 0x10;

#ifdef CONFIG_USER_ONLY

#undef ldfun

#define ldfun ldl_raw

#else

    uint32_t (*ldfun)(target_ulong);

    switch (mem_idx)

    {

    case 0: ldfun = ldl_kernel; break;

    case 1: ldfun = ldl_super; break;

    default:

    case 2: ldfun = ldl_user; break;

    }

#endif

    if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {

        target_ulong i;

        for (i = 0; i < base_reglist; i++) {

            env->active_tc.gpr[multiple_regs[i]] = (target_long) ldfun(addr);

            addr += 4;

        }

    }

    if (do_r31) {

        env->active_tc.gpr[31] = (target_long) ldfun(addr);

    }

}

void helper_swm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)

{

    target_ulong base_reglist = reglist & 0xf;

    target_ulong do_r31 = reglist & 0x10;

#ifdef CONFIG_USER_ONLY

#undef stfun

#define stfun stl_raw

#else

    void (*stfun)(target_ulong, uint32_t);

    switch (mem_idx)

    {

    case 0: stfun = stl_kernel; break;

    case 1: stfun = stl_super; break;

     default:

    case 2: stfun = stl_user; break;

    }

#endif

    if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {

        target_ulong i;

        for (i = 0; i < base_reglist; i++) {

            stfun(addr, env->active_tc.gpr[multiple_regs[i]]);

            addr += 4;

        }

    }

    if (do_r31) {

        stfun(addr, env->active_tc.gpr[31]);

    }

}

#if defined(TARGET_MIPS64)

void helper_ldm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)

{

    target_ulong base_reglist = reglist & 0xf;

    target_ulong do_r31 = reglist & 0x10;

#ifdef CONFIG_USER_ONLY

#undef ldfun

#define ldfun ldq_raw

#else

    uint64_t (*ldfun)(target_ulong);

    switch (mem_idx)

    {

    case 0: ldfun = ldq_kernel; break;

    case 1: ldfun = ldq_super; break;

    default:

    case 2: ldfun = ldq_user; break;

    }

#endif

    if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {

        target_ulong i;

        for (i = 0; i < base_reglist; i++) {

            env->active_tc.gpr[multiple_regs[i]] = ldfun(addr);

            addr += 8;

        }

    }

    if (do_r31) {

        env->active_tc.gpr[31] = ldfun(addr);

    }

}

void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)

{

    target_ulong base_reglist = reglist & 0xf;

    target_ulong do_r31 = reglist & 0x10;

#ifdef CONFIG_USER_ONLY

#undef stfun

#define stfun stq_raw

#else

    void (*stfun)(target_ulong, uint64_t);

    switch (mem_idx)

    {

    case 0: stfun = stq_kernel; break;

    case 1: stfun = stq_super; break;

     default:

    case 2: stfun = stq_user; break;

    }

#endif

    if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {

        target_ulong i;

        for (i = 0; i < base_reglist; i++) {

            stfun(addr, env->active_tc.gpr[multiple_regs[i]]);

            addr += 8;

        }

    }

    if (do_r31) {

        stfun(addr, env->active_tc.gpr[31]);

    }

}

#endif

#ifndef CONFIG_USER_ONLY

/* CP0 helpers */

target_ulong helper_mfc0_mvpcontrol (void)

{

    return env->mvp->CP0_MVPControl;

}

target_ulong helper_mfc0_mvpconf0 (void)

{

    return env->mvp->CP0_MVPConf0;

}

target_ulong helper_mfc0_mvpconf1 (void)

{

    return env->mvp->CP0_MVPConf1;

}

target_ulong helper_mfc0_random (void)

{

    return (int32_t)cpu_mips_get_random(env);

}

target_ulong helper_mfc0_tcstatus (void)

{

    return env->active_tc.CP0_TCStatus;

}

target_ulong helper_mftc0_tcstatus(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCStatus;

    else

        return env->tcs[other_tc].CP0_TCStatus;

}

target_ulong helper_mfc0_tcbind (void)

{

    return env->active_tc.CP0_TCBind;

}

target_ulong helper_mftc0_tcbind(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCBind;

    else

        return env->tcs[other_tc].CP0_TCBind;

}

target_ulong helper_mfc0_tcrestart (void)

{

    return env->active_tc.PC;

}

target_ulong helper_mftc0_tcrestart(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.PC;

    else

        return env->tcs[other_tc].PC;

}

target_ulong helper_mfc0_tchalt (void)

{

    return env->active_tc.CP0_TCHalt;

}

target_ulong helper_mftc0_tchalt(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCHalt;

    else

        return env->tcs[other_tc].CP0_TCHalt;

}

target_ulong helper_mfc0_tccontext (void)

{

    return env->active_tc.CP0_TCContext;

}

target_ulong helper_mftc0_tccontext(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCContext;

    else

        return env->tcs[other_tc].CP0_TCContext;

}

target_ulong helper_mfc0_tcschedule (void)

{

    return env->active_tc.CP0_TCSchedule;

}

target_ulong helper_mftc0_tcschedule(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCSchedule;

    else

        return env->tcs[other_tc].CP0_TCSchedule;

}

target_ulong helper_mfc0_tcschefback (void)

{

    return env->active_tc.CP0_TCScheFBack;

}

target_ulong helper_mftc0_tcschefback(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    if (other_tc == env->current_tc)

        return env->active_tc.CP0_TCScheFBack;

    else

        return env->tcs[other_tc].CP0_TCScheFBack;

}

target_ulong helper_mfc0_count (void)

{

    return (int32_t)cpu_mips_get_count(env);

}

target_ulong helper_mftc0_entryhi(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    int32_t tcstatus;

    if (other_tc == env->current_tc)

        tcstatus = env->active_tc.CP0_TCStatus;

    else

        tcstatus = env->tcs[other_tc].CP0_TCStatus;

    return (env->CP0_EntryHi & ~0xff) | (tcstatus & 0xff);

}

target_ulong helper_mftc0_status(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    target_ulong t0;

    int32_t tcstatus;

    if (other_tc == env->current_tc)

        tcstatus = env->active_tc.CP0_TCStatus;

    else

        tcstatus = env->tcs[other_tc].CP0_TCStatus;

    t0 = env->CP0_Status & ~0xf1000018;

    t0 |= tcstatus & (0xf << CP0TCSt_TCU0);

    t0 |= (tcstatus & (1 << CP0TCSt_TMX)) >> (CP0TCSt_TMX - CP0St_MX);

    t0 |= (tcstatus & (0x3 << CP0TCSt_TKSU)) >> (CP0TCSt_TKSU - CP0St_KSU);

    return t0;

}

target_ulong helper_mfc0_lladdr (void)

{

    return (int32_t)(env->lladdr >> env->CP0_LLAddr_shift);

}

target_ulong helper_mfc0_watchlo (uint32_t sel)

{

    return (int32_t)env->CP0_WatchLo[sel];

}

target_ulong helper_mfc0_watchhi (uint32_t sel)

{

    return env->CP0_WatchHi[sel];

}

target_ulong helper_mfc0_debug (void)

{

    target_ulong t0 = env->CP0_Debug;

    if (env->hflags & MIPS_HFLAG_DM)

        t0 |= 1 << CP0DB_DM;

    return t0;

}

target_ulong helper_mftc0_debug(void)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    int32_t tcstatus;

    if (other_tc == env->current_tc)

        tcstatus = env->active_tc.CP0_Debug_tcstatus;

    else

        tcstatus = env->tcs[other_tc].CP0_Debug_tcstatus;

    /* XXX: Might be wrong, check with EJTAG spec. */

    return (env->CP0_Debug & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) |

            (tcstatus & ((1 << CP0DB_SSt) | (1 << CP0DB_Halt)));

}

#if defined(TARGET_MIPS64)

target_ulong helper_dmfc0_tcrestart (void)

{

    return env->active_tc.PC;