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1 | e33d8cdb | balrog | /*
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2 | e33d8cdb | balrog | * Copyright (c) 2006-2008 Openedhand Ltd.
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3 | e33d8cdb | balrog | * Written by Andrzej Zaborowski <balrog@zabor.org>
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4 | e33d8cdb | balrog | *
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5 | e33d8cdb | balrog | * This program is free software; you can redistribute it and/or
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6 | e33d8cdb | balrog | * modify it under the terms of the GNU General Public License as
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7 | e33d8cdb | balrog | * published by the Free Software Foundation; either version 2 or
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8 | e33d8cdb | balrog | * (at your option) version 3 of the License.
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9 | e33d8cdb | balrog | *
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10 | e33d8cdb | balrog | * This program is distributed in the hope that it will be useful,
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11 | e33d8cdb | balrog | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | e33d8cdb | balrog | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 | e33d8cdb | balrog | * GNU General Public License for more details.
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14 | e33d8cdb | balrog | *
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15 | fad6cb1a | aurel32 | * You should have received a copy of the GNU General Public License along
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16 | 8167ee88 | Blue Swirl | * with this program; if not, see <http://www.gnu.org/licenses/>.
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17 | e33d8cdb | balrog | */
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18 | e33d8cdb | balrog | #include "hw.h" |
19 | e33d8cdb | balrog | #include "pxa.h" |
20 | e33d8cdb | balrog | #include "sharpsl.h" |
21 | e33d8cdb | balrog | |
22 | e33d8cdb | balrog | #undef REG_FMT
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23 | e33d8cdb | balrog | #define REG_FMT "0x%02lx" |
24 | e33d8cdb | balrog | |
25 | e33d8cdb | balrog | /* SCOOP devices */
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26 | e33d8cdb | balrog | |
27 | bc24a225 | Paul Brook | struct ScoopInfo {
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28 | e33d8cdb | balrog | qemu_irq handler[16];
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29 | e33d8cdb | balrog | qemu_irq *in; |
30 | e33d8cdb | balrog | uint16_t status; |
31 | e33d8cdb | balrog | uint16_t power; |
32 | e33d8cdb | balrog | uint32_t gpio_level; |
33 | e33d8cdb | balrog | uint32_t gpio_dir; |
34 | e33d8cdb | balrog | uint32_t prev_level; |
35 | e33d8cdb | balrog | |
36 | e33d8cdb | balrog | uint16_t mcr; |
37 | e33d8cdb | balrog | uint16_t cdr; |
38 | e33d8cdb | balrog | uint16_t ccr; |
39 | e33d8cdb | balrog | uint16_t irr; |
40 | e33d8cdb | balrog | uint16_t imr; |
41 | e33d8cdb | balrog | uint16_t isr; |
42 | e33d8cdb | balrog | }; |
43 | e33d8cdb | balrog | |
44 | e33d8cdb | balrog | #define SCOOP_MCR 0x00 |
45 | e33d8cdb | balrog | #define SCOOP_CDR 0x04 |
46 | e33d8cdb | balrog | #define SCOOP_CSR 0x08 |
47 | e33d8cdb | balrog | #define SCOOP_CPR 0x0c |
48 | e33d8cdb | balrog | #define SCOOP_CCR 0x10 |
49 | e33d8cdb | balrog | #define SCOOP_IRR_IRM 0x14 |
50 | e33d8cdb | balrog | #define SCOOP_IMR 0x18 |
51 | e33d8cdb | balrog | #define SCOOP_ISR 0x1c |
52 | e33d8cdb | balrog | #define SCOOP_GPCR 0x20 |
53 | e33d8cdb | balrog | #define SCOOP_GPWR 0x24 |
54 | e33d8cdb | balrog | #define SCOOP_GPRR 0x28 |
55 | e33d8cdb | balrog | |
56 | bc24a225 | Paul Brook | static inline void scoop_gpio_handler_update(ScoopInfo *s) { |
57 | e33d8cdb | balrog | uint32_t level, diff; |
58 | e33d8cdb | balrog | int bit;
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59 | e33d8cdb | balrog | level = s->gpio_level & s->gpio_dir; |
60 | e33d8cdb | balrog | |
61 | e33d8cdb | balrog | for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) { |
62 | e33d8cdb | balrog | bit = ffs(diff) - 1;
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63 | e33d8cdb | balrog | qemu_set_irq(s->handler[bit], (level >> bit) & 1);
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64 | e33d8cdb | balrog | } |
65 | e33d8cdb | balrog | |
66 | e33d8cdb | balrog | s->prev_level = level; |
67 | e33d8cdb | balrog | } |
68 | e33d8cdb | balrog | |
69 | e33d8cdb | balrog | static uint32_t scoop_readb(void *opaque, target_phys_addr_t addr) |
70 | e33d8cdb | balrog | { |
71 | bc24a225 | Paul Brook | ScoopInfo *s = (ScoopInfo *) opaque; |
72 | e33d8cdb | balrog | |
73 | e33d8cdb | balrog | switch (addr) {
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74 | e33d8cdb | balrog | case SCOOP_MCR:
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75 | e33d8cdb | balrog | return s->mcr;
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76 | e33d8cdb | balrog | case SCOOP_CDR:
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77 | e33d8cdb | balrog | return s->cdr;
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78 | e33d8cdb | balrog | case SCOOP_CSR:
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79 | e33d8cdb | balrog | return s->status;
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80 | e33d8cdb | balrog | case SCOOP_CPR:
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81 | e33d8cdb | balrog | return s->power;
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82 | e33d8cdb | balrog | case SCOOP_CCR:
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83 | e33d8cdb | balrog | return s->ccr;
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84 | e33d8cdb | balrog | case SCOOP_IRR_IRM:
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85 | e33d8cdb | balrog | return s->irr;
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86 | e33d8cdb | balrog | case SCOOP_IMR:
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87 | e33d8cdb | balrog | return s->imr;
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88 | e33d8cdb | balrog | case SCOOP_ISR:
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89 | e33d8cdb | balrog | return s->isr;
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90 | e33d8cdb | balrog | case SCOOP_GPCR:
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91 | e33d8cdb | balrog | return s->gpio_dir;
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92 | e33d8cdb | balrog | case SCOOP_GPWR:
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93 | e33d8cdb | balrog | case SCOOP_GPRR:
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94 | 1f163b14 | balrog | return s->gpio_level;
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95 | e33d8cdb | balrog | default:
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96 | a8b7063b | Blue Swirl | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
97 | e33d8cdb | balrog | } |
98 | e33d8cdb | balrog | |
99 | e33d8cdb | balrog | return 0; |
100 | e33d8cdb | balrog | } |
101 | e33d8cdb | balrog | |
102 | e33d8cdb | balrog | static void scoop_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) |
103 | e33d8cdb | balrog | { |
104 | bc24a225 | Paul Brook | ScoopInfo *s = (ScoopInfo *) opaque; |
105 | e33d8cdb | balrog | value &= 0xffff;
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106 | e33d8cdb | balrog | |
107 | e33d8cdb | balrog | switch (addr) {
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108 | e33d8cdb | balrog | case SCOOP_MCR:
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109 | e33d8cdb | balrog | s->mcr = value; |
110 | e33d8cdb | balrog | break;
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111 | e33d8cdb | balrog | case SCOOP_CDR:
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112 | e33d8cdb | balrog | s->cdr = value; |
113 | e33d8cdb | balrog | break;
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114 | e33d8cdb | balrog | case SCOOP_CPR:
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115 | e33d8cdb | balrog | s->power = value; |
116 | e33d8cdb | balrog | if (value & 0x80) |
117 | e33d8cdb | balrog | s->power |= 0x8040;
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118 | e33d8cdb | balrog | break;
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119 | e33d8cdb | balrog | case SCOOP_CCR:
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120 | e33d8cdb | balrog | s->ccr = value; |
121 | e33d8cdb | balrog | break;
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122 | e33d8cdb | balrog | case SCOOP_IRR_IRM:
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123 | e33d8cdb | balrog | s->irr = value; |
124 | e33d8cdb | balrog | break;
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125 | e33d8cdb | balrog | case SCOOP_IMR:
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126 | e33d8cdb | balrog | s->imr = value; |
127 | e33d8cdb | balrog | break;
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128 | e33d8cdb | balrog | case SCOOP_ISR:
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129 | e33d8cdb | balrog | s->isr = value; |
130 | e33d8cdb | balrog | break;
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131 | e33d8cdb | balrog | case SCOOP_GPCR:
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132 | e33d8cdb | balrog | s->gpio_dir = value; |
133 | e33d8cdb | balrog | scoop_gpio_handler_update(s); |
134 | e33d8cdb | balrog | break;
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135 | e33d8cdb | balrog | case SCOOP_GPWR:
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136 | 1f163b14 | balrog | case SCOOP_GPRR: /* GPRR is probably R/O in real HW */ |
137 | e33d8cdb | balrog | s->gpio_level = value & s->gpio_dir; |
138 | e33d8cdb | balrog | scoop_gpio_handler_update(s); |
139 | e33d8cdb | balrog | break;
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140 | e33d8cdb | balrog | default:
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141 | a8b7063b | Blue Swirl | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
142 | e33d8cdb | balrog | } |
143 | e33d8cdb | balrog | } |
144 | e33d8cdb | balrog | |
145 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const scoop_readfn[] = { |
146 | e33d8cdb | balrog | scoop_readb, |
147 | e33d8cdb | balrog | scoop_readb, |
148 | e33d8cdb | balrog | scoop_readb, |
149 | e33d8cdb | balrog | }; |
150 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const scoop_writefn[] = { |
151 | e33d8cdb | balrog | scoop_writeb, |
152 | e33d8cdb | balrog | scoop_writeb, |
153 | e33d8cdb | balrog | scoop_writeb, |
154 | e33d8cdb | balrog | }; |
155 | e33d8cdb | balrog | |
156 | e33d8cdb | balrog | void scoop_gpio_set(void *opaque, int line, int level) |
157 | e33d8cdb | balrog | { |
158 | 8d30b794 | Torsten Duwe | ScoopInfo *s = (ScoopInfo *) opaque; |
159 | e33d8cdb | balrog | |
160 | e33d8cdb | balrog | if (level)
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161 | e33d8cdb | balrog | s->gpio_level |= (1 << line);
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162 | e33d8cdb | balrog | else
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163 | e33d8cdb | balrog | s->gpio_level &= ~(1 << line);
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164 | e33d8cdb | balrog | } |
165 | e33d8cdb | balrog | |
166 | bc24a225 | Paul Brook | qemu_irq *scoop_gpio_in_get(ScoopInfo *s) |
167 | e33d8cdb | balrog | { |
168 | e33d8cdb | balrog | return s->in;
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169 | e33d8cdb | balrog | } |
170 | e33d8cdb | balrog | |
171 | bc24a225 | Paul Brook | void scoop_gpio_out_set(ScoopInfo *s, int line, |
172 | e33d8cdb | balrog | qemu_irq handler) { |
173 | e33d8cdb | balrog | if (line >= 16) { |
174 | e33d8cdb | balrog | fprintf(stderr, "No GPIO pin %i\n", line);
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175 | e33d8cdb | balrog | exit(-1);
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176 | e33d8cdb | balrog | } |
177 | e33d8cdb | balrog | |
178 | e33d8cdb | balrog | s->handler[line] = handler; |
179 | e33d8cdb | balrog | } |
180 | e33d8cdb | balrog | |
181 | e33d8cdb | balrog | static void scoop_save(QEMUFile *f, void *opaque) |
182 | e33d8cdb | balrog | { |
183 | bc24a225 | Paul Brook | ScoopInfo *s = (ScoopInfo *) opaque; |
184 | e33d8cdb | balrog | qemu_put_be16s(f, &s->status); |
185 | e33d8cdb | balrog | qemu_put_be16s(f, &s->power); |
186 | e33d8cdb | balrog | qemu_put_be32s(f, &s->gpio_level); |
187 | e33d8cdb | balrog | qemu_put_be32s(f, &s->gpio_dir); |
188 | e33d8cdb | balrog | qemu_put_be32s(f, &s->prev_level); |
189 | e33d8cdb | balrog | qemu_put_be16s(f, &s->mcr); |
190 | e33d8cdb | balrog | qemu_put_be16s(f, &s->cdr); |
191 | e33d8cdb | balrog | qemu_put_be16s(f, &s->ccr); |
192 | e33d8cdb | balrog | qemu_put_be16s(f, &s->irr); |
193 | e33d8cdb | balrog | qemu_put_be16s(f, &s->imr); |
194 | e33d8cdb | balrog | qemu_put_be16s(f, &s->isr); |
195 | e33d8cdb | balrog | } |
196 | e33d8cdb | balrog | |
197 | e33d8cdb | balrog | static int scoop_load(QEMUFile *f, void *opaque, int version_id) |
198 | e33d8cdb | balrog | { |
199 | 1f163b14 | balrog | uint16_t dummy; |
200 | bc24a225 | Paul Brook | ScoopInfo *s = (ScoopInfo *) opaque; |
201 | e33d8cdb | balrog | qemu_get_be16s(f, &s->status); |
202 | e33d8cdb | balrog | qemu_get_be16s(f, &s->power); |
203 | e33d8cdb | balrog | qemu_get_be32s(f, &s->gpio_level); |
204 | e33d8cdb | balrog | qemu_get_be32s(f, &s->gpio_dir); |
205 | e33d8cdb | balrog | qemu_get_be32s(f, &s->prev_level); |
206 | e33d8cdb | balrog | qemu_get_be16s(f, &s->mcr); |
207 | e33d8cdb | balrog | qemu_get_be16s(f, &s->cdr); |
208 | e33d8cdb | balrog | qemu_get_be16s(f, &s->ccr); |
209 | e33d8cdb | balrog | qemu_get_be16s(f, &s->irr); |
210 | e33d8cdb | balrog | qemu_get_be16s(f, &s->imr); |
211 | e33d8cdb | balrog | qemu_get_be16s(f, &s->isr); |
212 | 1f163b14 | balrog | if (version_id < 1) |
213 | 1f163b14 | balrog | qemu_get_be16s(f, &dummy); |
214 | e33d8cdb | balrog | |
215 | e33d8cdb | balrog | return 0; |
216 | e33d8cdb | balrog | } |
217 | e33d8cdb | balrog | |
218 | bc24a225 | Paul Brook | ScoopInfo *scoop_init(PXA2xxState *cpu, |
219 | e33d8cdb | balrog | int instance,
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220 | e33d8cdb | balrog | target_phys_addr_t target_base) { |
221 | e33d8cdb | balrog | int iomemtype;
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222 | bc24a225 | Paul Brook | ScoopInfo *s; |
223 | e33d8cdb | balrog | |
224 | bc24a225 | Paul Brook | s = (ScoopInfo *) |
225 | bc24a225 | Paul Brook | qemu_mallocz(sizeof(ScoopInfo));
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226 | bc24a225 | Paul Brook | memset(s, 0, sizeof(ScoopInfo)); |
227 | e33d8cdb | balrog | |
228 | e33d8cdb | balrog | s->status = 0x02;
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229 | e33d8cdb | balrog | s->in = qemu_allocate_irqs(scoop_gpio_set, s, 16);
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230 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(scoop_readfn, |
231 | e33d8cdb | balrog | scoop_writefn, s); |
232 | 8da3ff18 | pbrook | cpu_register_physical_memory(target_base, 0x1000, iomemtype);
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233 | 1f163b14 | balrog | register_savevm("scoop", instance, 1, scoop_save, scoop_load, s); |
234 | e33d8cdb | balrog | |
235 | e33d8cdb | balrog | return s;
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236 | e33d8cdb | balrog | } |
237 | e33d8cdb | balrog | |
238 | e33d8cdb | balrog | /* Write the bootloader parameters memory area. */
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239 | e33d8cdb | balrog | |
240 | e33d8cdb | balrog | #define MAGIC_CHG(a, b, c, d) ((d << 24) | (c << 16) | (b << 8) | a) |
241 | e33d8cdb | balrog | |
242 | b1d8e52e | blueswir1 | static struct __attribute__ ((__packed__)) sl_param_info { |
243 | e33d8cdb | balrog | uint32_t comadj_keyword; |
244 | e33d8cdb | balrog | int32_t comadj; |
245 | e33d8cdb | balrog | |
246 | e33d8cdb | balrog | uint32_t uuid_keyword; |
247 | e33d8cdb | balrog | char uuid[16]; |
248 | e33d8cdb | balrog | |
249 | e33d8cdb | balrog | uint32_t touch_keyword; |
250 | e33d8cdb | balrog | int32_t touch_xp; |
251 | e33d8cdb | balrog | int32_t touch_yp; |
252 | e33d8cdb | balrog | int32_t touch_xd; |
253 | e33d8cdb | balrog | int32_t touch_yd; |
254 | e33d8cdb | balrog | |
255 | e33d8cdb | balrog | uint32_t adadj_keyword; |
256 | e33d8cdb | balrog | int32_t adadj; |
257 | e33d8cdb | balrog | |
258 | e33d8cdb | balrog | uint32_t phad_keyword; |
259 | e33d8cdb | balrog | int32_t phadadj; |
260 | e33d8cdb | balrog | } zaurus_bootparam = { |
261 | e33d8cdb | balrog | .comadj_keyword = MAGIC_CHG('C', 'M', 'A', 'D'), |
262 | e33d8cdb | balrog | .comadj = 125,
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263 | e33d8cdb | balrog | .uuid_keyword = MAGIC_CHG('U', 'U', 'I', 'D'), |
264 | e33d8cdb | balrog | .uuid = { -1 },
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265 | e33d8cdb | balrog | .touch_keyword = MAGIC_CHG('T', 'U', 'C', 'H'), |
266 | e33d8cdb | balrog | .touch_xp = -1,
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267 | e33d8cdb | balrog | .adadj_keyword = MAGIC_CHG('B', 'V', 'A', 'D'), |
268 | e33d8cdb | balrog | .adadj = -1,
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269 | e33d8cdb | balrog | .phad_keyword = MAGIC_CHG('P', 'H', 'A', 'D'), |
270 | e33d8cdb | balrog | .phadadj = 0x01,
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271 | e33d8cdb | balrog | }; |
272 | e33d8cdb | balrog | |
273 | f78630ab | pbrook | void sl_bootparam_write(target_phys_addr_t ptr)
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274 | e33d8cdb | balrog | { |
275 | f78630ab | pbrook | cpu_physical_memory_write(ptr, (void *)&zaurus_bootparam,
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276 | f78630ab | pbrook | sizeof(struct sl_param_info)); |
277 | e33d8cdb | balrog | } |