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1 b9adb4a6 bellard
/* General "disassemble this chunk" code.  Used for debugging. */
2 5bbe9299 bellard
#include "config.h"
3 76cad711 Paolo Bonzini
#include "disas/bfd.h"
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#include "elf.h"
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#include <errno.h>
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#include "cpu.h"
8 76cad711 Paolo Bonzini
#include "disas/disas.h"
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typedef struct CPUDebug {
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    struct disassemble_info info;
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    CPUArchState *env;
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} CPUDebug;
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/* Filled in by elfload.c.  Simplistic, but will do for now. */
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struct syminfo *syminfos = NULL;
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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int
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buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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                   struct disassemble_info *info)
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{
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    if (memaddr < info->buffer_vma
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        || memaddr + length > info->buffer_vma + info->buffer_length)
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        /* Out of bounds.  Use EIO because GDB uses it.  */
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        return EIO;
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    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
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    return 0;
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}
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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static int
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target_read_memory (bfd_vma memaddr,
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                    bfd_byte *myaddr,
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                    int length,
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                    struct disassemble_info *info)
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{
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    CPUDebug *s = container_of(info, CPUDebug, info);
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42 f17ec444 Andreas Färber
    cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
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    return 0;
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}
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/* Print an error message.  We can assume that this is in response to
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   an error return from buffer_read_memory.  */
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void
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perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
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{
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  if (status != EIO)
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    /* Can't happen.  */
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    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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  else
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    /* Actually, address between memaddr and memaddr + len was
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       out of bounds.  */
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    (*info->fprintf_func) (info->stream,
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                           "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
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}
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61 a31f0531 Jim Meyering
/* This could be in a separate file, to save minuscule amounts of space
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   in statically linked executables.  */
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/* Just print the address is hex.  This is included for completeness even
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   though both GDB and objdump provide their own (to print symbolic
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   addresses).  */
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void
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generic_print_address (bfd_vma addr, struct disassemble_info *info)
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{
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    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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}
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74 636bd289 Peter Maydell
/* Print address in hex, truncated to the width of a target virtual address. */
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static void
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generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
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{
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    uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
79 636bd289 Peter Maydell
    generic_print_address(addr & mask, info);
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}
81 636bd289 Peter Maydell
82 636bd289 Peter Maydell
/* Print address in hex, truncated to the width of a host virtual address. */
83 636bd289 Peter Maydell
static void
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generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
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{
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    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
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    generic_print_address(addr & mask, info);
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}
89 636bd289 Peter Maydell
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/* Just return the given address.  */
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int
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generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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{
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  return 1;
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}
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98 903ec55c Aurelien Jarno
bfd_vma bfd_getl64 (const bfd_byte *addr)
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{
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  unsigned long long v;
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  v = (unsigned long long) addr[0];
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  v |= (unsigned long long) addr[1] << 8;
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  v |= (unsigned long long) addr[2] << 16;
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  v |= (unsigned long long) addr[3] << 24;
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  v |= (unsigned long long) addr[4] << 32;
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  v |= (unsigned long long) addr[5] << 40;
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  v |= (unsigned long long) addr[6] << 48;
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  v |= (unsigned long long) addr[7] << 56;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getl32 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0];
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  v |= (unsigned long) addr[1] << 8;
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  v |= (unsigned long) addr[2] << 16;
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  v |= (unsigned long) addr[3] << 24;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getb32 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
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  v |= (unsigned long) addr[1] << 16;
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  v |= (unsigned long) addr[2] << 8;
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  v |= (unsigned long) addr[3];
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getl16 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0];
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  v |= (unsigned long) addr[1] << 8;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getb16 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
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  v |= (unsigned long) addr[1] << 16;
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  return (bfd_vma) v;
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}
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#ifdef TARGET_ARM
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static int
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print_insn_thumb1(bfd_vma pc, disassemble_info *info)
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{
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  return print_insn_arm(pc | 1, info);
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}
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#endif
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161 c46ffd57 Richard Henderson
static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
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                              const char *prefix)
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{
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    int i, n = info->buffer_length;
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    uint8_t *buf = g_malloc(n);
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    info->read_memory_func(pc, buf, n, info);
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    for (i = 0; i < n; ++i) {
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        if (i % 32 == 0) {
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            info->fprintf_func(info->stream, "\n%s: ", prefix);
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        }
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        info->fprintf_func(info->stream, "%02x", buf[i]);
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    }
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    g_free(buf);
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    return n;
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}
179 c46ffd57 Richard Henderson
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static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
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{
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    return print_insn_objdump(pc, info, "OBJD-H");
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}
184 c46ffd57 Richard Henderson
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static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
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{
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    return print_insn_objdump(pc, info, "OBJD-T");
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}
189 c46ffd57 Richard Henderson
190 e91c8a77 ths
/* Disassemble this for me please... (debugging). 'flags' has the following
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   values:
192 e99722f6 Frediano Ziglio
    i386 - 1 means 16 bit code, 2 means 64 bit code
193 999b53ec Claudio Fontana
    arm  - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
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    ppc  - nonzero means little endian
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    other targets - unused
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 */
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void target_disas(FILE *out, CPUArchState *env, target_ulong code,
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                  target_ulong size, int flags)
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{
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    target_ulong pc;
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    int count;
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    CPUDebug s;
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    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
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    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
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    s.env = env;
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    s.info.read_memory_func = target_read_memory;
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    s.info.buffer_vma = code;
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    s.info.buffer_length = size;
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    s.info.print_address_func = generic_print_target_address;
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#ifdef TARGET_WORDS_BIGENDIAN
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    s.info.endian = BFD_ENDIAN_BIG;
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#else
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    s.info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(TARGET_I386)
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    if (flags == 2) {
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        s.info.mach = bfd_mach_x86_64;
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    } else if (flags == 1) {
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        s.info.mach = bfd_mach_i386_i8086;
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    } else {
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        s.info.mach = bfd_mach_i386_i386;
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    }
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    print_insn = print_insn_i386;
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#elif defined(TARGET_ARM)
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    if (flags & 4) {
229 999b53ec Claudio Fontana
        /* We might not be compiled with the A64 disassembler
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         * because it needs a C++ compiler; in that case we will
231 999b53ec Claudio Fontana
         * fall through to the default print_insn_od case.
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         */
233 999b53ec Claudio Fontana
#if defined(CONFIG_ARM_A64_DIS)
234 999b53ec Claudio Fontana
        print_insn = print_insn_arm_a64;
235 999b53ec Claudio Fontana
#endif
236 999b53ec Claudio Fontana
    } else if (flags & 1) {
237 d8fd2954 Paul Brook
        print_insn = print_insn_thumb1;
238 d8fd2954 Paul Brook
    } else {
239 d8fd2954 Paul Brook
        print_insn = print_insn_arm;
240 d8fd2954 Paul Brook
    }
241 d8fd2954 Paul Brook
    if (flags & 2) {
242 d8fd2954 Paul Brook
#ifdef TARGET_WORDS_BIGENDIAN
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        s.info.endian = BFD_ENDIAN_LITTLE;
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#else
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        s.info.endian = BFD_ENDIAN_BIG;
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#endif
247 d8fd2954 Paul Brook
    }
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#elif defined(TARGET_SPARC)
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    print_insn = print_insn_sparc;
250 3475187d bellard
#ifdef TARGET_SPARC64
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    s.info.mach = bfd_mach_sparc_v9b;
252 3b46e624 ths
#endif
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#elif defined(TARGET_PPC)
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    if (flags >> 16) {
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        s.info.endian = BFD_ENDIAN_LITTLE;
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    }
257 237c0af0 j_mayer
    if (flags & 0xFFFF) {
258 237c0af0 j_mayer
        /* If we have a precise definitions of the instructions set, use it */
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        s.info.mach = flags & 0xFFFF;
260 237c0af0 j_mayer
    } else {
261 a2458627 bellard
#ifdef TARGET_PPC64
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        s.info.mach = bfd_mach_ppc64;
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#else
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        s.info.mach = bfd_mach_ppc;
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#endif
266 237c0af0 j_mayer
    }
267 88770fec Aurelien Jarno
    s.info.disassembler_options = (char *)"any";
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    print_insn = print_insn_ppc;
269 e6e5906b pbrook
#elif defined(TARGET_M68K)
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    print_insn = print_insn_m68k;
271 6af0bf9c bellard
#elif defined(TARGET_MIPS)
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#ifdef TARGET_WORDS_BIGENDIAN
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    print_insn = print_insn_big_mips;
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#else
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    print_insn = print_insn_little_mips;
276 76b3030c bellard
#endif
277 fdf9b3e8 bellard
#elif defined(TARGET_SH4)
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    s.info.mach = bfd_mach_sh4;
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    print_insn = print_insn_sh;
280 eddf68a6 j_mayer
#elif defined(TARGET_ALPHA)
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    s.info.mach = bfd_mach_alpha_ev6;
282 eddf68a6 j_mayer
    print_insn = print_insn_alpha;
283 a25fd137 ths
#elif defined(TARGET_CRIS)
284 b09cd072 Edgar E. Iglesias
    if (flags != 32) {
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        s.info.mach = bfd_mach_cris_v0_v10;
286 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv10;
287 b09cd072 Edgar E. Iglesias
    } else {
288 f4359b9f Blue Swirl
        s.info.mach = bfd_mach_cris_v32;
289 b09cd072 Edgar E. Iglesias
        print_insn = print_insn_crisv32;
290 b09cd072 Edgar E. Iglesias
    }
291 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
292 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_s390_64;
293 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
294 e90e390c Edgar E. Iglesias
#elif defined(TARGET_MICROBLAZE)
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    s.info.mach = bfd_arch_microblaze;
296 e90e390c Edgar E. Iglesias
    print_insn = print_insn_microblaze;
297 bd86a88e Anthony Green
#elif defined(TARGET_MOXIE)
298 bd86a88e Anthony Green
    s.info.mach = bfd_arch_moxie;
299 bd86a88e Anthony Green
    print_insn = print_insn_moxie;
300 79368f49 Michael Walle
#elif defined(TARGET_LM32)
301 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_lm32;
302 79368f49 Michael Walle
    print_insn = print_insn_lm32;
303 c6105c0a bellard
#endif
304 c46ffd57 Richard Henderson
    if (print_insn == NULL) {
305 c46ffd57 Richard Henderson
        print_insn = print_insn_od_target;
306 c46ffd57 Richard Henderson
    }
307 c6105c0a bellard
308 7e000c2e blueswir1
    for (pc = code; size > 0; pc += count, size -= count) {
309 fa15e030 bellard
        fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
310 f4359b9f Blue Swirl
        count = print_insn(pc, &s.info);
311 c27004ec bellard
#if 0
312 c27004ec bellard
        {
313 c27004ec bellard
            int i;
314 c27004ec bellard
            uint8_t b;
315 c27004ec bellard
            fprintf(out, " {");
316 c27004ec bellard
            for(i = 0; i < count; i++) {
317 f4359b9f Blue Swirl
                target_read_memory(pc + i, &b, 1, &s.info);
318 c27004ec bellard
                fprintf(out, " %02x", b);
319 c27004ec bellard
            }
320 c27004ec bellard
            fprintf(out, " }");
321 c27004ec bellard
        }
322 c27004ec bellard
#endif
323 c27004ec bellard
        fprintf(out, "\n");
324 c27004ec bellard
        if (count < 0)
325 c27004ec bellard
            break;
326 754d00ae malc
        if (size < count) {
327 754d00ae malc
            fprintf(out,
328 754d00ae malc
                    "Disassembler disagrees with translator over instruction "
329 754d00ae malc
                    "decoding\n"
330 754d00ae malc
                    "Please report this to qemu-devel@nongnu.org\n");
331 754d00ae malc
            break;
332 754d00ae malc
        }
333 c27004ec bellard
    }
334 c27004ec bellard
}
335 c27004ec bellard
336 c27004ec bellard
/* Disassemble this for me please... (debugging). */
337 c27004ec bellard
void disas(FILE *out, void *code, unsigned long size)
338 c27004ec bellard
{
339 b0b0f1c9 Stefan Weil
    uintptr_t pc;
340 c27004ec bellard
    int count;
341 f4359b9f Blue Swirl
    CPUDebug s;
342 c46ffd57 Richard Henderson
    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
343 c27004ec bellard
344 f4359b9f Blue Swirl
    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
345 f4359b9f Blue Swirl
    s.info.print_address_func = generic_print_host_address;
346 c27004ec bellard
347 f4359b9f Blue Swirl
    s.info.buffer = code;
348 f4359b9f Blue Swirl
    s.info.buffer_vma = (uintptr_t)code;
349 f4359b9f Blue Swirl
    s.info.buffer_length = size;
350 b9adb4a6 bellard
351 e2542fe2 Juan Quintela
#ifdef HOST_WORDS_BIGENDIAN
352 f4359b9f Blue Swirl
    s.info.endian = BFD_ENDIAN_BIG;
353 b9adb4a6 bellard
#else
354 f4359b9f Blue Swirl
    s.info.endian = BFD_ENDIAN_LITTLE;
355 b9adb4a6 bellard
#endif
356 5826e519 Stefan Weil
#if defined(CONFIG_TCG_INTERPRETER)
357 5826e519 Stefan Weil
    print_insn = print_insn_tci;
358 5826e519 Stefan Weil
#elif defined(__i386__)
359 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_i386_i386;
360 c27004ec bellard
    print_insn = print_insn_i386;
361 bc51c5c9 bellard
#elif defined(__x86_64__)
362 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_x86_64;
363 c27004ec bellard
    print_insn = print_insn_i386;
364 e58ffeb3 malc
#elif defined(_ARCH_PPC)
365 66d4f6a3 Richard Henderson
    s.info.disassembler_options = (char *)"any";
366 c27004ec bellard
    print_insn = print_insn_ppc;
367 999b53ec Claudio Fontana
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
368 999b53ec Claudio Fontana
    print_insn = print_insn_arm_a64;
369 a993ba85 bellard
#elif defined(__alpha__)
370 c27004ec bellard
    print_insn = print_insn_alpha;
371 aa0aa4fa bellard
#elif defined(__sparc__)
372 c27004ec bellard
    print_insn = print_insn_sparc;
373 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_sparc_v9b;
374 5fafdf24 ths
#elif defined(__arm__)
375 c27004ec bellard
    print_insn = print_insn_arm;
376 6af0bf9c bellard
#elif defined(__MIPSEB__)
377 6af0bf9c bellard
    print_insn = print_insn_big_mips;
378 6af0bf9c bellard
#elif defined(__MIPSEL__)
379 6af0bf9c bellard
    print_insn = print_insn_little_mips;
380 48024e4a bellard
#elif defined(__m68k__)
381 48024e4a bellard
    print_insn = print_insn_m68k;
382 8f860bb8 ths
#elif defined(__s390__)
383 8f860bb8 ths
    print_insn = print_insn_s390;
384 f54b3f92 aurel32
#elif defined(__hppa__)
385 f54b3f92 aurel32
    print_insn = print_insn_hppa;
386 903ec55c Aurelien Jarno
#elif defined(__ia64__)
387 903ec55c Aurelien Jarno
    print_insn = print_insn_ia64;
388 b9adb4a6 bellard
#endif
389 c46ffd57 Richard Henderson
    if (print_insn == NULL) {
390 c46ffd57 Richard Henderson
        print_insn = print_insn_od_host;
391 c46ffd57 Richard Henderson
    }
392 b0b0f1c9 Stefan Weil
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
393 b0b0f1c9 Stefan Weil
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
394 f4359b9f Blue Swirl
        count = print_insn(pc, &s.info);
395 b9adb4a6 bellard
        fprintf(out, "\n");
396 b9adb4a6 bellard
        if (count < 0)
397 b9adb4a6 bellard
            break;
398 b9adb4a6 bellard
    }
399 b9adb4a6 bellard
}
400 b9adb4a6 bellard
401 b9adb4a6 bellard
/* Look up symbol for debugging purpose.  Returns "" if unknown. */
402 c27004ec bellard
const char *lookup_symbol(target_ulong orig_addr)
403 b9adb4a6 bellard
{
404 49918a75 pbrook
    const char *symbol = "";
405 e80cfcfc bellard
    struct syminfo *s;
406 3b46e624 ths
407 e80cfcfc bellard
    for (s = syminfos; s; s = s->next) {
408 49918a75 pbrook
        symbol = s->lookup_symbol(s, orig_addr);
409 49918a75 pbrook
        if (symbol[0] != '\0') {
410 49918a75 pbrook
            break;
411 49918a75 pbrook
        }
412 b9adb4a6 bellard
    }
413 49918a75 pbrook
414 49918a75 pbrook
    return symbol;
415 b9adb4a6 bellard
}
416 9307c4c1 bellard
417 9307c4c1 bellard
#if !defined(CONFIG_USER_ONLY)
418 9307c4c1 bellard
419 83c9089e Paolo Bonzini
#include "monitor/monitor.h"
420 3d2cfdf1 bellard
421 9307c4c1 bellard
static int monitor_disas_is_physical;
422 9307c4c1 bellard
423 9307c4c1 bellard
static int
424 a5f1b965 blueswir1
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
425 a5f1b965 blueswir1
                     struct disassemble_info *info)
426 9307c4c1 bellard
{
427 f4359b9f Blue Swirl
    CPUDebug *s = container_of(info, CPUDebug, info);
428 f4359b9f Blue Swirl
429 9307c4c1 bellard
    if (monitor_disas_is_physical) {
430 54f7b4a3 Stefan Weil
        cpu_physical_memory_read(memaddr, myaddr, length);
431 9307c4c1 bellard
    } else {
432 f17ec444 Andreas Färber
        cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
433 9307c4c1 bellard
    }
434 9307c4c1 bellard
    return 0;
435 9307c4c1 bellard
}
436 9307c4c1 bellard
437 8b7968f7 Stefan Weil
static int GCC_FMT_ATTR(2, 3)
438 8b7968f7 Stefan Weil
monitor_fprintf(FILE *stream, const char *fmt, ...)
439 3d2cfdf1 bellard
{
440 3d2cfdf1 bellard
    va_list ap;
441 3d2cfdf1 bellard
    va_start(ap, fmt);
442 376253ec aliguori
    monitor_vprintf((Monitor *)stream, fmt, ap);
443 3d2cfdf1 bellard
    va_end(ap);
444 3d2cfdf1 bellard
    return 0;
445 3d2cfdf1 bellard
}
446 3d2cfdf1 bellard
447 9349b4f9 Andreas Färber
void monitor_disas(Monitor *mon, CPUArchState *env,
448 6a00d601 bellard
                   target_ulong pc, int nb_insn, int is_physical, int flags)
449 9307c4c1 bellard
{
450 9307c4c1 bellard
    int count, i;
451 f4359b9f Blue Swirl
    CPUDebug s;
452 9307c4c1 bellard
    int (*print_insn)(bfd_vma pc, disassemble_info *info);
453 9307c4c1 bellard
454 f4359b9f Blue Swirl
    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
455 9307c4c1 bellard
456 f4359b9f Blue Swirl
    s.env = env;
457 9307c4c1 bellard
    monitor_disas_is_physical = is_physical;
458 f4359b9f Blue Swirl
    s.info.read_memory_func = monitor_read_memory;
459 f4359b9f Blue Swirl
    s.info.print_address_func = generic_print_target_address;
460 9307c4c1 bellard
461 f4359b9f Blue Swirl
    s.info.buffer_vma = pc;
462 9307c4c1 bellard
463 9307c4c1 bellard
#ifdef TARGET_WORDS_BIGENDIAN
464 f4359b9f Blue Swirl
    s.info.endian = BFD_ENDIAN_BIG;
465 9307c4c1 bellard
#else
466 f4359b9f Blue Swirl
    s.info.endian = BFD_ENDIAN_LITTLE;
467 9307c4c1 bellard
#endif
468 9307c4c1 bellard
#if defined(TARGET_I386)
469 f4359b9f Blue Swirl
    if (flags == 2) {
470 f4359b9f Blue Swirl
        s.info.mach = bfd_mach_x86_64;
471 f4359b9f Blue Swirl
    } else if (flags == 1) {
472 f4359b9f Blue Swirl
        s.info.mach = bfd_mach_i386_i8086;
473 f4359b9f Blue Swirl
    } else {
474 f4359b9f Blue Swirl
        s.info.mach = bfd_mach_i386_i386;
475 f4359b9f Blue Swirl
    }
476 9307c4c1 bellard
    print_insn = print_insn_i386;
477 9307c4c1 bellard
#elif defined(TARGET_ARM)
478 9307c4c1 bellard
    print_insn = print_insn_arm;
479 cbd669da ths
#elif defined(TARGET_ALPHA)
480 cbd669da ths
    print_insn = print_insn_alpha;
481 9307c4c1 bellard
#elif defined(TARGET_SPARC)
482 9307c4c1 bellard
    print_insn = print_insn_sparc;
483 682c4f15 blueswir1
#ifdef TARGET_SPARC64
484 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_sparc_v9b;
485 682c4f15 blueswir1
#endif
486 9307c4c1 bellard
#elif defined(TARGET_PPC)
487 a2458627 bellard
#ifdef TARGET_PPC64
488 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_ppc64;
489 a2458627 bellard
#else
490 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_ppc;
491 a2458627 bellard
#endif
492 9307c4c1 bellard
    print_insn = print_insn_ppc;
493 e6e5906b pbrook
#elif defined(TARGET_M68K)
494 e6e5906b pbrook
    print_insn = print_insn_m68k;
495 6af0bf9c bellard
#elif defined(TARGET_MIPS)
496 76b3030c bellard
#ifdef TARGET_WORDS_BIGENDIAN
497 6af0bf9c bellard
    print_insn = print_insn_big_mips;
498 76b3030c bellard
#else
499 76b3030c bellard
    print_insn = print_insn_little_mips;
500 76b3030c bellard
#endif
501 b4e1f077 Magnus Damm
#elif defined(TARGET_SH4)
502 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_sh4;
503 b4e1f077 Magnus Damm
    print_insn = print_insn_sh;
504 db500609 Ulrich Hecht
#elif defined(TARGET_S390X)
505 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_s390_64;
506 db500609 Ulrich Hecht
    print_insn = print_insn_s390;
507 bd86a88e Anthony Green
#elif defined(TARGET_MOXIE)
508 bd86a88e Anthony Green
    s.info.mach = bfd_arch_moxie;
509 bd86a88e Anthony Green
    print_insn = print_insn_moxie;
510 79368f49 Michael Walle
#elif defined(TARGET_LM32)
511 f4359b9f Blue Swirl
    s.info.mach = bfd_mach_lm32;
512 79368f49 Michael Walle
    print_insn = print_insn_lm32;
513 9307c4c1 bellard
#else
514 376253ec aliguori
    monitor_printf(mon, "0x" TARGET_FMT_lx
515 376253ec aliguori
                   ": Asm output not supported on this arch\n", pc);
516 9307c4c1 bellard
    return;
517 9307c4c1 bellard
#endif
518 9307c4c1 bellard
519 9307c4c1 bellard
    for(i = 0; i < nb_insn; i++) {
520 376253ec aliguori
        monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
521 f4359b9f Blue Swirl
        count = print_insn(pc, &s.info);
522 376253ec aliguori
        monitor_printf(mon, "\n");
523 9307c4c1 bellard
        if (count < 0)
524 9307c4c1 bellard
            break;
525 9307c4c1 bellard
        pc += count;
526 9307c4c1 bellard
    }
527 9307c4c1 bellard
}
528 9307c4c1 bellard
#endif