root / hw / cpu / arm11mpcore.c @ 216db403
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1 | f7c70325 | Paul Brook | /*
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2 | f7c70325 | Paul Brook | * ARM11MPCore internal peripheral emulation.
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3 | f7c70325 | Paul Brook | *
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4 | f7c70325 | Paul Brook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | f7c70325 | Paul Brook | * Written by Paul Brook
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6 | f7c70325 | Paul Brook | *
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7 | 8e31bf38 | Matthew Fernandez | * This code is licensed under the GPL.
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8 | f7c70325 | Paul Brook | */
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9 | f7c70325 | Paul Brook | |
10 | 7b960dc3 | Andreas Färber | #include "hw/cpu/arm11mpcore.h" |
11 | 306476ea | Andreas Färber | #include "hw/intc/realview_gic.h" |
12 | 2a6ab1e3 | Peter Maydell | |
13 | 2a6ab1e3 | Peter Maydell | |
14 | 2e9dfe20 | Peter Maydell | static void mpcore_priv_set_irq(void *opaque, int irq, int level) |
15 | 2a6ab1e3 | Peter Maydell | { |
16 | 845769fc | Peter Crosthwaite | ARM11MPCorePriveState *s = (ARM11MPCorePriveState *)opaque; |
17 | 08602ac5 | Andreas Färber | |
18 | 08602ac5 | Andreas Färber | qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); |
19 | 2a6ab1e3 | Peter Maydell | } |
20 | 2a6ab1e3 | Peter Maydell | |
21 | 845769fc | Peter Crosthwaite | static void mpcore_priv_map_setup(ARM11MPCorePriveState *s) |
22 | 2a6ab1e3 | Peter Maydell | { |
23 | 2a6ab1e3 | Peter Maydell | int i;
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24 | 53cb9a1c | Andreas Färber | SysBusDevice *scubusdev = SYS_BUS_DEVICE(&s->scu); |
25 | 08602ac5 | Andreas Färber | DeviceState *gicdev = DEVICE(&s->gic); |
26 | 08602ac5 | Andreas Färber | SysBusDevice *gicbusdev = SYS_BUS_DEVICE(&s->gic); |
27 | 08602ac5 | Andreas Färber | SysBusDevice *timerbusdev = SYS_BUS_DEVICE(&s->mptimer); |
28 | 08602ac5 | Andreas Färber | SysBusDevice *wdtbusdev = SYS_BUS_DEVICE(&s->wdtimer); |
29 | 53cb9a1c | Andreas Färber | |
30 | 53cb9a1c | Andreas Färber | memory_region_add_subregion(&s->container, 0,
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31 | 53cb9a1c | Andreas Färber | sysbus_mmio_get_region(scubusdev, 0));
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32 | 2a6ab1e3 | Peter Maydell | /* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs
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33 | 2a6ab1e3 | Peter Maydell | * at 0x200, 0x300...
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34 | 2a6ab1e3 | Peter Maydell | */
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35 | 2a6ab1e3 | Peter Maydell | for (i = 0; i < (s->num_cpu + 1); i++) { |
36 | a8170e5e | Avi Kivity | hwaddr offset = 0x100 + (i * 0x100); |
37 | 2e9dfe20 | Peter Maydell | memory_region_add_subregion(&s->container, offset, |
38 | 2e9dfe20 | Peter Maydell | sysbus_mmio_get_region(gicbusdev, i + 1));
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39 | 2a6ab1e3 | Peter Maydell | } |
40 | 2a6ab1e3 | Peter Maydell | /* Add the regions for timer and watchdog for "current CPU" and
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41 | 2a6ab1e3 | Peter Maydell | * for each specific CPU.
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42 | 2a6ab1e3 | Peter Maydell | */
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43 | cde4577f | Peter Crosthwaite | for (i = 0; i < (s->num_cpu + 1); i++) { |
44 | 2a6ab1e3 | Peter Maydell | /* Timers at 0x600, 0x700, ...; watchdogs at 0x620, 0x720, ... */
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45 | cde4577f | Peter Crosthwaite | hwaddr offset = 0x600 + i * 0x100; |
46 | 2a6ab1e3 | Peter Maydell | memory_region_add_subregion(&s->container, offset, |
47 | cde4577f | Peter Crosthwaite | sysbus_mmio_get_region(timerbusdev, i)); |
48 | cde4577f | Peter Crosthwaite | memory_region_add_subregion(&s->container, offset + 0x20,
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49 | cde4577f | Peter Crosthwaite | sysbus_mmio_get_region(wdtbusdev, i)); |
50 | 2a6ab1e3 | Peter Maydell | } |
51 | 2e9dfe20 | Peter Maydell | memory_region_add_subregion(&s->container, 0x1000,
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52 | 2e9dfe20 | Peter Maydell | sysbus_mmio_get_region(gicbusdev, 0));
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53 | 2e9dfe20 | Peter Maydell | /* Wire up the interrupt from each watchdog and timer.
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54 | 2e9dfe20 | Peter Maydell | * For each core the timer is PPI 29 and the watchdog PPI 30.
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55 | 2e9dfe20 | Peter Maydell | */
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56 | 2e9dfe20 | Peter Maydell | for (i = 0; i < s->num_cpu; i++) { |
57 | 2e9dfe20 | Peter Maydell | int ppibase = (s->num_irq - 32) + i * 32; |
58 | cde4577f | Peter Crosthwaite | sysbus_connect_irq(timerbusdev, i, |
59 | 08602ac5 | Andreas Färber | qdev_get_gpio_in(gicdev, ppibase + 29));
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60 | cde4577f | Peter Crosthwaite | sysbus_connect_irq(wdtbusdev, i, |
61 | 08602ac5 | Andreas Färber | qdev_get_gpio_in(gicdev, ppibase + 30));
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62 | 2a6ab1e3 | Peter Maydell | } |
63 | 2a6ab1e3 | Peter Maydell | } |
64 | 2a6ab1e3 | Peter Maydell | |
65 | 08602ac5 | Andreas Färber | static void mpcore_priv_realize(DeviceState *dev, Error **errp) |
66 | 2a6ab1e3 | Peter Maydell | { |
67 | 08602ac5 | Andreas Färber | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
68 | 56fc0281 | Andreas Färber | ARM11MPCorePriveState *s = ARM11MPCORE_PRIV(dev); |
69 | 53cb9a1c | Andreas Färber | DeviceState *scudev = DEVICE(&s->scu); |
70 | 08602ac5 | Andreas Färber | DeviceState *gicdev = DEVICE(&s->gic); |
71 | 08602ac5 | Andreas Färber | DeviceState *mptimerdev = DEVICE(&s->mptimer); |
72 | 08602ac5 | Andreas Färber | DeviceState *wdtimerdev = DEVICE(&s->wdtimer); |
73 | 08602ac5 | Andreas Färber | Error *err = NULL;
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74 | 53cb9a1c | Andreas Färber | |
75 | 53cb9a1c | Andreas Färber | qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu);
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76 | 08602ac5 | Andreas Färber | object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); |
77 | 08602ac5 | Andreas Färber | if (err != NULL) { |
78 | 08602ac5 | Andreas Färber | error_propagate(errp, err); |
79 | 08602ac5 | Andreas Färber | return;
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80 | 08602ac5 | Andreas Färber | } |
81 | 2e9dfe20 | Peter Maydell | |
82 | 08602ac5 | Andreas Färber | qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
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83 | 08602ac5 | Andreas Färber | qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
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84 | 08602ac5 | Andreas Färber | object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); |
85 | 08602ac5 | Andreas Färber | if (err != NULL) { |
86 | 08602ac5 | Andreas Färber | error_propagate(errp, err); |
87 | 08602ac5 | Andreas Färber | return;
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88 | 08602ac5 | Andreas Färber | } |
89 | 2e9dfe20 | Peter Maydell | |
90 | 2e9dfe20 | Peter Maydell | /* Pass through outbound IRQ lines from the GIC */
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91 | 08602ac5 | Andreas Färber | sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->gic)); |
92 | 2e9dfe20 | Peter Maydell | |
93 | 2e9dfe20 | Peter Maydell | /* Pass through inbound GPIO lines to the GIC */
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94 | 56fc0281 | Andreas Färber | qdev_init_gpio_in(dev, mpcore_priv_set_irq, s->num_irq - 32);
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95 | 2a6ab1e3 | Peter Maydell | |
96 | 08602ac5 | Andreas Färber | qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu);
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97 | 08602ac5 | Andreas Färber | object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err); |
98 | 08602ac5 | Andreas Färber | if (err != NULL) { |
99 | 08602ac5 | Andreas Färber | error_propagate(errp, err); |
100 | 08602ac5 | Andreas Färber | return;
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101 | 08602ac5 | Andreas Färber | } |
102 | cde4577f | Peter Crosthwaite | |
103 | 08602ac5 | Andreas Färber | qdev_prop_set_uint32(wdtimerdev, "num-cpu", s->num_cpu);
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104 | 08602ac5 | Andreas Färber | object_property_set_bool(OBJECT(&s->wdtimer), true, "realized", &err); |
105 | 08602ac5 | Andreas Färber | if (err != NULL) { |
106 | 08602ac5 | Andreas Färber | error_propagate(errp, err); |
107 | 08602ac5 | Andreas Färber | return;
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108 | 08602ac5 | Andreas Färber | } |
109 | cde4577f | Peter Crosthwaite | |
110 | 2a6ab1e3 | Peter Maydell | mpcore_priv_map_setup(s); |
111 | 2a6ab1e3 | Peter Maydell | } |
112 | f7c70325 | Paul Brook | |
113 | 2c42c3a0 | Andreas Färber | static void mpcore_priv_initfn(Object *obj) |
114 | 2c42c3a0 | Andreas Färber | { |
115 | 2c42c3a0 | Andreas Färber | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
116 | 2c42c3a0 | Andreas Färber | ARM11MPCorePriveState *s = ARM11MPCORE_PRIV(obj); |
117 | 2c42c3a0 | Andreas Färber | |
118 | 2c42c3a0 | Andreas Färber | memory_region_init(&s->container, OBJECT(s), |
119 | 2c42c3a0 | Andreas Färber | "mpcore-priv-container", 0x2000); |
120 | 2c42c3a0 | Andreas Färber | sysbus_init_mmio(sbd, &s->container); |
121 | 53cb9a1c | Andreas Färber | |
122 | 53cb9a1c | Andreas Färber | object_initialize(&s->scu, sizeof(s->scu), TYPE_ARM11_SCU);
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123 | 53cb9a1c | Andreas Färber | qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); |
124 | 08602ac5 | Andreas Färber | |
125 | 08602ac5 | Andreas Färber | object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
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126 | 08602ac5 | Andreas Färber | qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); |
127 | 08602ac5 | Andreas Färber | /* Request the legacy 11MPCore GIC behaviour: */
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128 | 08602ac5 | Andreas Färber | qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 0); |
129 | 08602ac5 | Andreas Färber | |
130 | 08602ac5 | Andreas Färber | object_initialize(&s->mptimer, sizeof(s->mptimer), TYPE_ARM_MPTIMER);
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131 | 08602ac5 | Andreas Färber | qdev_set_parent_bus(DEVICE(&s->mptimer), sysbus_get_default()); |
132 | 08602ac5 | Andreas Färber | |
133 | 08602ac5 | Andreas Färber | object_initialize(&s->wdtimer, sizeof(s->wdtimer), TYPE_ARM_MPTIMER);
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134 | 08602ac5 | Andreas Färber | qdev_set_parent_bus(DEVICE(&s->wdtimer), sysbus_get_default()); |
135 | 2c42c3a0 | Andreas Färber | } |
136 | 2c42c3a0 | Andreas Färber | |
137 | 999e12bb | Anthony Liguori | static Property mpcore_priv_properties[] = {
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138 | 845769fc | Peter Crosthwaite | DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1), |
139 | 0f58a188 | Peter Maydell | /* The ARM11 MPCORE TRM says the on-chip controller may have
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140 | 0f58a188 | Peter Maydell | * anything from 0 to 224 external interrupt IRQ lines (with another
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141 | 0f58a188 | Peter Maydell | * 32 internal). We default to 32+32, which is the number provided by
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142 | 0f58a188 | Peter Maydell | * the ARM11 MPCore test chip in the Realview Versatile Express
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143 | 0f58a188 | Peter Maydell | * coretile. Other boards may differ and should set this property
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144 | 0f58a188 | Peter Maydell | * appropriately. Some Linux kernels may not boot if the hardware
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145 | 0f58a188 | Peter Maydell | * has more IRQ lines than the kernel expects.
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146 | 0f58a188 | Peter Maydell | */
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147 | 845769fc | Peter Crosthwaite | DEFINE_PROP_UINT32("num-irq", ARM11MPCorePriveState, num_irq, 64), |
148 | 999e12bb | Anthony Liguori | DEFINE_PROP_END_OF_LIST(), |
149 | 999e12bb | Anthony Liguori | }; |
150 | 999e12bb | Anthony Liguori | |
151 | 999e12bb | Anthony Liguori | static void mpcore_priv_class_init(ObjectClass *klass, void *data) |
152 | 999e12bb | Anthony Liguori | { |
153 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
154 | 999e12bb | Anthony Liguori | |
155 | 08602ac5 | Andreas Färber | dc->realize = mpcore_priv_realize; |
156 | 39bffca2 | Anthony Liguori | dc->props = mpcore_priv_properties; |
157 | 999e12bb | Anthony Liguori | } |
158 | 999e12bb | Anthony Liguori | |
159 | 8c43a6f0 | Andreas Färber | static const TypeInfo mpcore_priv_info = { |
160 | 56fc0281 | Andreas Färber | .name = TYPE_ARM11MPCORE_PRIV, |
161 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
162 | 845769fc | Peter Crosthwaite | .instance_size = sizeof(ARM11MPCorePriveState),
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163 | 2c42c3a0 | Andreas Färber | .instance_init = mpcore_priv_initfn, |
164 | 39bffca2 | Anthony Liguori | .class_init = mpcore_priv_class_init, |
165 | f7c70325 | Paul Brook | }; |
166 | f7c70325 | Paul Brook | |
167 | 83f7d43a | Andreas Färber | static void arm11mpcore_register_types(void) |
168 | f7c70325 | Paul Brook | { |
169 | 39bffca2 | Anthony Liguori | type_register_static(&mpcore_priv_info); |
170 | f7c70325 | Paul Brook | } |
171 | f7c70325 | Paul Brook | |
172 | 83f7d43a | Andreas Färber | type_init(arm11mpcore_register_types) |