root / hw / pl061.c @ 21eea4b3
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1 | 9ee6e8bb | pbrook | /*
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2 | 9ee6e8bb | pbrook | * Arm PrimeCell PL061 General Purpose IO with additional
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3 | 9ee6e8bb | pbrook | * Luminary Micro Stellaris bits.
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4 | 9ee6e8bb | pbrook | *
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5 | 9ee6e8bb | pbrook | * Copyright (c) 2007 CodeSourcery.
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6 | 9ee6e8bb | pbrook | * Written by Paul Brook
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7 | 9ee6e8bb | pbrook | *
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8 | 9ee6e8bb | pbrook | * This code is licenced under the GPL.
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9 | 9ee6e8bb | pbrook | */
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10 | 9ee6e8bb | pbrook | |
11 | 40905a6a | Paul Brook | #include "sysbus.h" |
12 | 9ee6e8bb | pbrook | |
13 | 9ee6e8bb | pbrook | //#define DEBUG_PL061 1
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14 | 9ee6e8bb | pbrook | |
15 | 9ee6e8bb | pbrook | #ifdef DEBUG_PL061
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16 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) \
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17 | 001faf32 | Blue Swirl | do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0) |
18 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
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19 | 001faf32 | Blue Swirl | do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0) |
20 | 9ee6e8bb | pbrook | #else
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21 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) do {} while(0) |
22 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
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23 | 001faf32 | Blue Swirl | do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0) |
24 | 9ee6e8bb | pbrook | #endif
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25 | 9ee6e8bb | pbrook | |
26 | 9ee6e8bb | pbrook | static const uint8_t pl061_id[12] = |
27 | 9ee6e8bb | pbrook | { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; |
28 | 9ee6e8bb | pbrook | |
29 | 9ee6e8bb | pbrook | typedef struct { |
30 | 40905a6a | Paul Brook | SysBusDevice busdev; |
31 | 9ee6e8bb | pbrook | int locked;
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32 | 9ee6e8bb | pbrook | uint8_t data; |
33 | 9ee6e8bb | pbrook | uint8_t old_data; |
34 | 9ee6e8bb | pbrook | uint8_t dir; |
35 | 9ee6e8bb | pbrook | uint8_t isense; |
36 | 9ee6e8bb | pbrook | uint8_t ibe; |
37 | 9ee6e8bb | pbrook | uint8_t iev; |
38 | 9ee6e8bb | pbrook | uint8_t im; |
39 | 9ee6e8bb | pbrook | uint8_t istate; |
40 | 9ee6e8bb | pbrook | uint8_t afsel; |
41 | 9ee6e8bb | pbrook | uint8_t dr2r; |
42 | 9ee6e8bb | pbrook | uint8_t dr4r; |
43 | 9ee6e8bb | pbrook | uint8_t dr8r; |
44 | 9ee6e8bb | pbrook | uint8_t odr; |
45 | 9ee6e8bb | pbrook | uint8_t pur; |
46 | 9ee6e8bb | pbrook | uint8_t pdr; |
47 | 9ee6e8bb | pbrook | uint8_t slr; |
48 | 9ee6e8bb | pbrook | uint8_t den; |
49 | 9ee6e8bb | pbrook | uint8_t cr; |
50 | 775616c3 | pbrook | uint8_t float_high; |
51 | 9ee6e8bb | pbrook | qemu_irq irq; |
52 | 9ee6e8bb | pbrook | qemu_irq out[8];
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53 | 9ee6e8bb | pbrook | } pl061_state; |
54 | 9ee6e8bb | pbrook | |
55 | 9ee6e8bb | pbrook | static void pl061_update(pl061_state *s) |
56 | 9ee6e8bb | pbrook | { |
57 | 9ee6e8bb | pbrook | uint8_t changed; |
58 | 9ee6e8bb | pbrook | uint8_t mask; |
59 | 775616c3 | pbrook | uint8_t out; |
60 | 9ee6e8bb | pbrook | int i;
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61 | 9ee6e8bb | pbrook | |
62 | 775616c3 | pbrook | /* Outputs float high. */
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63 | 775616c3 | pbrook | /* FIXME: This is board dependent. */
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64 | 775616c3 | pbrook | out = (s->data & s->dir) | ~s->dir; |
65 | 775616c3 | pbrook | changed = s->old_data ^ out; |
66 | 9ee6e8bb | pbrook | if (!changed)
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67 | 9ee6e8bb | pbrook | return;
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68 | 9ee6e8bb | pbrook | |
69 | 775616c3 | pbrook | s->old_data = out; |
70 | 9ee6e8bb | pbrook | for (i = 0; i < 8; i++) { |
71 | 9ee6e8bb | pbrook | mask = 1 << i;
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72 | 775616c3 | pbrook | if ((changed & mask) && s->out) {
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73 | 775616c3 | pbrook | DPRINTF("Set output %d = %d\n", i, (out & mask) != 0); |
74 | 775616c3 | pbrook | qemu_set_irq(s->out[i], (out & mask) != 0);
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75 | 9ee6e8bb | pbrook | } |
76 | 9ee6e8bb | pbrook | } |
77 | 9ee6e8bb | pbrook | |
78 | 9ee6e8bb | pbrook | /* FIXME: Implement input interrupts. */
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79 | 9ee6e8bb | pbrook | } |
80 | 9ee6e8bb | pbrook | |
81 | c227f099 | Anthony Liguori | static uint32_t pl061_read(void *opaque, target_phys_addr_t offset) |
82 | 9ee6e8bb | pbrook | { |
83 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
84 | 9ee6e8bb | pbrook | |
85 | 9ee6e8bb | pbrook | if (offset >= 0xfd0 && offset < 0x1000) { |
86 | 9ee6e8bb | pbrook | return pl061_id[(offset - 0xfd0) >> 2]; |
87 | 9ee6e8bb | pbrook | } |
88 | 9ee6e8bb | pbrook | if (offset < 0x400) { |
89 | 9ee6e8bb | pbrook | return s->data & (offset >> 2); |
90 | 9ee6e8bb | pbrook | } |
91 | 9ee6e8bb | pbrook | switch (offset) {
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92 | 9ee6e8bb | pbrook | case 0x400: /* Direction */ |
93 | 9ee6e8bb | pbrook | return s->dir;
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94 | 9ee6e8bb | pbrook | case 0x404: /* Interrupt sense */ |
95 | 9ee6e8bb | pbrook | return s->isense;
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96 | 9ee6e8bb | pbrook | case 0x408: /* Interrupt both edges */ |
97 | 9ee6e8bb | pbrook | return s->ibe;
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98 | 9ee6e8bb | pbrook | case 0x40c: /* Interupt event */ |
99 | 9ee6e8bb | pbrook | return s->iev;
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100 | 9ee6e8bb | pbrook | case 0x410: /* Interrupt mask */ |
101 | 9ee6e8bb | pbrook | return s->im;
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102 | 9ee6e8bb | pbrook | case 0x414: /* Raw interrupt status */ |
103 | 9ee6e8bb | pbrook | return s->istate;
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104 | 9ee6e8bb | pbrook | case 0x418: /* Masked interrupt status */ |
105 | 9ee6e8bb | pbrook | return s->istate | s->im;
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106 | 9ee6e8bb | pbrook | case 0x420: /* Alternate function select */ |
107 | 9ee6e8bb | pbrook | return s->afsel;
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108 | 9ee6e8bb | pbrook | case 0x500: /* 2mA drive */ |
109 | 9ee6e8bb | pbrook | return s->dr2r;
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110 | 9ee6e8bb | pbrook | case 0x504: /* 4mA drive */ |
111 | 9ee6e8bb | pbrook | return s->dr4r;
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112 | 9ee6e8bb | pbrook | case 0x508: /* 8mA drive */ |
113 | 9ee6e8bb | pbrook | return s->dr8r;
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114 | 9ee6e8bb | pbrook | case 0x50c: /* Open drain */ |
115 | 9ee6e8bb | pbrook | return s->odr;
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116 | 9ee6e8bb | pbrook | case 0x510: /* Pull-up */ |
117 | 9ee6e8bb | pbrook | return s->pur;
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118 | 9ee6e8bb | pbrook | case 0x514: /* Pull-down */ |
119 | 9ee6e8bb | pbrook | return s->pdr;
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120 | 9ee6e8bb | pbrook | case 0x518: /* Slew rate control */ |
121 | 9ee6e8bb | pbrook | return s->slr;
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122 | 9ee6e8bb | pbrook | case 0x51c: /* Digital enable */ |
123 | 9ee6e8bb | pbrook | return s->den;
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124 | 9ee6e8bb | pbrook | case 0x520: /* Lock */ |
125 | 9ee6e8bb | pbrook | return s->locked;
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126 | 9ee6e8bb | pbrook | case 0x524: /* Commit */ |
127 | 9ee6e8bb | pbrook | return s->cr;
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128 | 9ee6e8bb | pbrook | default:
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129 | 2ac71179 | Paul Brook | hw_error("pl061_read: Bad offset %x\n", (int)offset); |
130 | 9ee6e8bb | pbrook | return 0; |
131 | 9ee6e8bb | pbrook | } |
132 | 9ee6e8bb | pbrook | } |
133 | 9ee6e8bb | pbrook | |
134 | c227f099 | Anthony Liguori | static void pl061_write(void *opaque, target_phys_addr_t offset, |
135 | 9ee6e8bb | pbrook | uint32_t value) |
136 | 9ee6e8bb | pbrook | { |
137 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
138 | 9ee6e8bb | pbrook | uint8_t mask; |
139 | 9ee6e8bb | pbrook | |
140 | 9ee6e8bb | pbrook | if (offset < 0x400) { |
141 | 9ee6e8bb | pbrook | mask = (offset >> 2) & s->dir;
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142 | 9ee6e8bb | pbrook | s->data = (s->data & ~mask) | (value & mask); |
143 | 9ee6e8bb | pbrook | pl061_update(s); |
144 | 9ee6e8bb | pbrook | return;
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145 | 9ee6e8bb | pbrook | } |
146 | 9ee6e8bb | pbrook | switch (offset) {
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147 | 9ee6e8bb | pbrook | case 0x400: /* Direction */ |
148 | 9ee6e8bb | pbrook | s->dir = value; |
149 | 9ee6e8bb | pbrook | break;
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150 | 9ee6e8bb | pbrook | case 0x404: /* Interrupt sense */ |
151 | 9ee6e8bb | pbrook | s->isense = value; |
152 | 9ee6e8bb | pbrook | break;
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153 | 9ee6e8bb | pbrook | case 0x408: /* Interrupt both edges */ |
154 | 9ee6e8bb | pbrook | s->ibe = value; |
155 | 9ee6e8bb | pbrook | break;
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156 | 9ee6e8bb | pbrook | case 0x40c: /* Interupt event */ |
157 | 9ee6e8bb | pbrook | s->iev = value; |
158 | 9ee6e8bb | pbrook | break;
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159 | 9ee6e8bb | pbrook | case 0x410: /* Interrupt mask */ |
160 | 9ee6e8bb | pbrook | s->im = value; |
161 | 9ee6e8bb | pbrook | break;
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162 | 9ee6e8bb | pbrook | case 0x41c: /* Interrupt clear */ |
163 | 9ee6e8bb | pbrook | s->istate &= ~value; |
164 | 9ee6e8bb | pbrook | break;
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165 | 9ee6e8bb | pbrook | case 0x420: /* Alternate function select */ |
166 | 9ee6e8bb | pbrook | mask = s->cr; |
167 | 9ee6e8bb | pbrook | s->afsel = (s->afsel & ~mask) | (value & mask); |
168 | 9ee6e8bb | pbrook | break;
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169 | 9ee6e8bb | pbrook | case 0x500: /* 2mA drive */ |
170 | 9ee6e8bb | pbrook | s->dr2r = value; |
171 | 9ee6e8bb | pbrook | break;
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172 | 9ee6e8bb | pbrook | case 0x504: /* 4mA drive */ |
173 | 9ee6e8bb | pbrook | s->dr4r = value; |
174 | 9ee6e8bb | pbrook | break;
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175 | 9ee6e8bb | pbrook | case 0x508: /* 8mA drive */ |
176 | 9ee6e8bb | pbrook | s->dr8r = value; |
177 | 9ee6e8bb | pbrook | break;
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178 | 9ee6e8bb | pbrook | case 0x50c: /* Open drain */ |
179 | 9ee6e8bb | pbrook | s->odr = value; |
180 | 9ee6e8bb | pbrook | break;
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181 | 9ee6e8bb | pbrook | case 0x510: /* Pull-up */ |
182 | 9ee6e8bb | pbrook | s->pur = value; |
183 | 9ee6e8bb | pbrook | break;
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184 | 9ee6e8bb | pbrook | case 0x514: /* Pull-down */ |
185 | 9ee6e8bb | pbrook | s->pdr = value; |
186 | 9ee6e8bb | pbrook | break;
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187 | 9ee6e8bb | pbrook | case 0x518: /* Slew rate control */ |
188 | 9ee6e8bb | pbrook | s->slr = value; |
189 | 9ee6e8bb | pbrook | break;
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190 | 9ee6e8bb | pbrook | case 0x51c: /* Digital enable */ |
191 | 9ee6e8bb | pbrook | s->den = value; |
192 | 9ee6e8bb | pbrook | break;
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193 | 9ee6e8bb | pbrook | case 0x520: /* Lock */ |
194 | 9ee6e8bb | pbrook | s->locked = (value != 0xacce551);
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195 | 9ee6e8bb | pbrook | break;
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196 | 9ee6e8bb | pbrook | case 0x524: /* Commit */ |
197 | 9ee6e8bb | pbrook | if (!s->locked)
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198 | 9ee6e8bb | pbrook | s->cr = value; |
199 | 9ee6e8bb | pbrook | break;
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200 | 9ee6e8bb | pbrook | default:
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201 | 2ac71179 | Paul Brook | hw_error("pl061_write: Bad offset %x\n", (int)offset); |
202 | 9ee6e8bb | pbrook | } |
203 | 9ee6e8bb | pbrook | pl061_update(s); |
204 | 9ee6e8bb | pbrook | } |
205 | 9ee6e8bb | pbrook | |
206 | 9ee6e8bb | pbrook | static void pl061_reset(pl061_state *s) |
207 | 9ee6e8bb | pbrook | { |
208 | 9ee6e8bb | pbrook | s->locked = 1;
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209 | 9ee6e8bb | pbrook | s->cr = 0xff;
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210 | 9ee6e8bb | pbrook | } |
211 | 9ee6e8bb | pbrook | |
212 | 9596ebb7 | pbrook | static void pl061_set_irq(void * opaque, int irq, int level) |
213 | 9ee6e8bb | pbrook | { |
214 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
215 | 9ee6e8bb | pbrook | uint8_t mask; |
216 | 9ee6e8bb | pbrook | |
217 | 9ee6e8bb | pbrook | mask = 1 << irq;
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218 | 9ee6e8bb | pbrook | if ((s->dir & mask) == 0) { |
219 | 9ee6e8bb | pbrook | s->data &= ~mask; |
220 | 9ee6e8bb | pbrook | if (level)
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221 | 9ee6e8bb | pbrook | s->data |= mask; |
222 | 9ee6e8bb | pbrook | pl061_update(s); |
223 | 9ee6e8bb | pbrook | } |
224 | 9ee6e8bb | pbrook | } |
225 | 9ee6e8bb | pbrook | |
226 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const pl061_readfn[] = { |
227 | 9ee6e8bb | pbrook | pl061_read, |
228 | 9ee6e8bb | pbrook | pl061_read, |
229 | 9ee6e8bb | pbrook | pl061_read |
230 | 9ee6e8bb | pbrook | }; |
231 | 9ee6e8bb | pbrook | |
232 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const pl061_writefn[] = { |
233 | 9ee6e8bb | pbrook | pl061_write, |
234 | 9ee6e8bb | pbrook | pl061_write, |
235 | 9ee6e8bb | pbrook | pl061_write |
236 | 9ee6e8bb | pbrook | }; |
237 | 9ee6e8bb | pbrook | |
238 | 23e39294 | pbrook | static void pl061_save(QEMUFile *f, void *opaque) |
239 | 23e39294 | pbrook | { |
240 | 23e39294 | pbrook | pl061_state *s = (pl061_state *)opaque; |
241 | 23e39294 | pbrook | |
242 | 23e39294 | pbrook | qemu_put_be32(f, s->locked); |
243 | 23e39294 | pbrook | qemu_put_be32(f, s->data); |
244 | 23e39294 | pbrook | qemu_put_be32(f, s->old_data); |
245 | 23e39294 | pbrook | qemu_put_be32(f, s->dir); |
246 | 23e39294 | pbrook | qemu_put_be32(f, s->isense); |
247 | 23e39294 | pbrook | qemu_put_be32(f, s->ibe); |
248 | 23e39294 | pbrook | qemu_put_be32(f, s->iev); |
249 | 23e39294 | pbrook | qemu_put_be32(f, s->im); |
250 | 23e39294 | pbrook | qemu_put_be32(f, s->istate); |
251 | 23e39294 | pbrook | qemu_put_be32(f, s->afsel); |
252 | 23e39294 | pbrook | qemu_put_be32(f, s->dr2r); |
253 | 23e39294 | pbrook | qemu_put_be32(f, s->dr4r); |
254 | 23e39294 | pbrook | qemu_put_be32(f, s->dr8r); |
255 | 23e39294 | pbrook | qemu_put_be32(f, s->odr); |
256 | 23e39294 | pbrook | qemu_put_be32(f, s->pur); |
257 | 23e39294 | pbrook | qemu_put_be32(f, s->pdr); |
258 | 23e39294 | pbrook | qemu_put_be32(f, s->slr); |
259 | 23e39294 | pbrook | qemu_put_be32(f, s->den); |
260 | 23e39294 | pbrook | qemu_put_be32(f, s->cr); |
261 | 23e39294 | pbrook | qemu_put_be32(f, s->float_high); |
262 | 23e39294 | pbrook | } |
263 | 23e39294 | pbrook | |
264 | 23e39294 | pbrook | static int pl061_load(QEMUFile *f, void *opaque, int version_id) |
265 | 23e39294 | pbrook | { |
266 | 23e39294 | pbrook | pl061_state *s = (pl061_state *)opaque; |
267 | 23e39294 | pbrook | if (version_id != 1) |
268 | 23e39294 | pbrook | return -EINVAL;
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269 | 23e39294 | pbrook | |
270 | 23e39294 | pbrook | s->locked = qemu_get_be32(f); |
271 | 23e39294 | pbrook | s->data = qemu_get_be32(f); |
272 | 23e39294 | pbrook | s->old_data = qemu_get_be32(f); |
273 | 23e39294 | pbrook | s->dir = qemu_get_be32(f); |
274 | 23e39294 | pbrook | s->isense = qemu_get_be32(f); |
275 | 23e39294 | pbrook | s->ibe = qemu_get_be32(f); |
276 | 23e39294 | pbrook | s->iev = qemu_get_be32(f); |
277 | 23e39294 | pbrook | s->im = qemu_get_be32(f); |
278 | 23e39294 | pbrook | s->istate = qemu_get_be32(f); |
279 | 23e39294 | pbrook | s->afsel = qemu_get_be32(f); |
280 | 23e39294 | pbrook | s->dr2r = qemu_get_be32(f); |
281 | 23e39294 | pbrook | s->dr4r = qemu_get_be32(f); |
282 | 23e39294 | pbrook | s->dr8r = qemu_get_be32(f); |
283 | 23e39294 | pbrook | s->odr = qemu_get_be32(f); |
284 | 23e39294 | pbrook | s->pur = qemu_get_be32(f); |
285 | 23e39294 | pbrook | s->pdr = qemu_get_be32(f); |
286 | 23e39294 | pbrook | s->slr = qemu_get_be32(f); |
287 | 23e39294 | pbrook | s->den = qemu_get_be32(f); |
288 | 23e39294 | pbrook | s->cr = qemu_get_be32(f); |
289 | 23e39294 | pbrook | s->float_high = qemu_get_be32(f); |
290 | 23e39294 | pbrook | |
291 | 23e39294 | pbrook | return 0; |
292 | 23e39294 | pbrook | } |
293 | 23e39294 | pbrook | |
294 | 81a322d4 | Gerd Hoffmann | static int pl061_init(SysBusDevice *dev) |
295 | 9ee6e8bb | pbrook | { |
296 | 9ee6e8bb | pbrook | int iomemtype;
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297 | 40905a6a | Paul Brook | pl061_state *s = FROM_SYSBUS(pl061_state, dev); |
298 | 9ee6e8bb | pbrook | |
299 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(pl061_readfn, |
300 | 9ee6e8bb | pbrook | pl061_writefn, s); |
301 | 40905a6a | Paul Brook | sysbus_init_mmio(dev, 0x1000, iomemtype);
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302 | 40905a6a | Paul Brook | sysbus_init_irq(dev, &s->irq); |
303 | 40905a6a | Paul Brook | qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
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304 | 40905a6a | Paul Brook | qdev_init_gpio_out(&dev->qdev, s->out, 8);
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305 | 9ee6e8bb | pbrook | pl061_reset(s); |
306 | 23e39294 | pbrook | register_savevm("pl061_gpio", -1, 1, pl061_save, pl061_load, s); |
307 | 81a322d4 | Gerd Hoffmann | return 0; |
308 | 9ee6e8bb | pbrook | } |
309 | 40905a6a | Paul Brook | |
310 | 40905a6a | Paul Brook | static void pl061_register_devices(void) |
311 | 40905a6a | Paul Brook | { |
312 | 40905a6a | Paul Brook | sysbus_register_dev("pl061", sizeof(pl061_state), |
313 | 40905a6a | Paul Brook | pl061_init); |
314 | 40905a6a | Paul Brook | } |
315 | 40905a6a | Paul Brook | |
316 | 40905a6a | Paul Brook | device_init(pl061_register_devices) |