Revision 2507c12a hw/e1000.c

b/hw/e1000.c
1131 1131 
    pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
1132 1132 

  		





  1133
  1133
  
    
    d->mmio_index = cpu_register_io_memory(e1000_mmio_read,


  		





  1134
  
  
    
            e1000_mmio_write, d);


  		





  
  1134
  
    
            e1000_mmio_write, d, DEVICE_NATIVE_ENDIAN);


  		





  1135
  1135
  
    

  		





  1136
  1136
  
    
    pci_register_bar(&d->dev, 0, PNPMMIO_SIZE,


  		





  1137
  1137
  
    
                           PCI_BASE_ADDRESS_SPACE_MEMORY, e1000_mmio_map);


  		












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