Revision 2507c12a hw/sm501.c
| b/hw/sm501.c | ||
|---|---|---|
| 1379 | 1379 |
/* map mmio */ |
| 1380 | 1380 |
sm501_system_config_index |
| 1381 | 1381 |
= cpu_register_io_memory(sm501_system_config_readfn, |
| 1382 |
sm501_system_config_writefn, s); |
|
| 1382 |
sm501_system_config_writefn, s, |
|
| 1383 |
DEVICE_NATIVE_ENDIAN); |
|
| 1383 | 1384 |
cpu_register_physical_memory(base + MMIO_BASE_OFFSET, |
| 1384 | 1385 |
0x6c, sm501_system_config_index); |
| 1385 | 1386 |
sm501_disp_ctrl_index = cpu_register_io_memory(sm501_disp_ctrl_readfn, |
| 1386 |
sm501_disp_ctrl_writefn, s); |
|
| 1387 |
sm501_disp_ctrl_writefn, s, |
|
| 1388 |
DEVICE_NATIVE_ENDIAN); |
|
| 1387 | 1389 |
cpu_register_physical_memory(base + MMIO_BASE_OFFSET + SM501_DC, |
| 1388 | 1390 |
0x1000, sm501_disp_ctrl_index); |
| 1389 | 1391 |
sm501_2d_engine_index = cpu_register_io_memory(sm501_2d_engine_readfn, |
| 1390 |
sm501_2d_engine_writefn, s); |
|
| 1392 |
sm501_2d_engine_writefn, s, |
|
| 1393 |
DEVICE_NATIVE_ENDIAN); |
|
| 1391 | 1394 |
cpu_register_physical_memory(base + MMIO_BASE_OFFSET + SM501_2D_ENGINE, |
| 1392 | 1395 |
0x54, sm501_2d_engine_index); |
| 1393 | 1396 |
|
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