root / hw / versatilepb.c @ 2558e0a6
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1 | 5fafdf24 | ths | /*
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2 | 16406950 | pbrook | * ARM Versatile Platform/Application Baseboard System emulation.
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3 | cdbdb648 | pbrook | *
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4 | a1bb27b1 | pbrook | * Copyright (c) 2005-2007 CodeSourcery.
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5 | cdbdb648 | pbrook | * Written by Paul Brook
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6 | cdbdb648 | pbrook | *
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7 | 8e31bf38 | Matthew Fernandez | * This code is licensed under the GPL.
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8 | cdbdb648 | pbrook | */
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9 | cdbdb648 | pbrook | |
10 | 2e9bdce5 | Paul Brook | #include "sysbus.h" |
11 | 87ecb68b | pbrook | #include "arm-misc.h" |
12 | 87ecb68b | pbrook | #include "primecell.h" |
13 | 87ecb68b | pbrook | #include "devices.h" |
14 | 87ecb68b | pbrook | #include "net.h" |
15 | 87ecb68b | pbrook | #include "sysemu.h" |
16 | 87ecb68b | pbrook | #include "pci.h" |
17 | 18e08a55 | Michael S. Tsirkin | #include "usb-ohci.h" |
18 | 87ecb68b | pbrook | #include "boards.h" |
19 | 2446333c | Blue Swirl | #include "blockdev.h" |
20 | 62ceeb2c | Avi Kivity | #include "exec-memory.h" |
21 | cdbdb648 | pbrook | |
22 | cdbdb648 | pbrook | /* Primary interrupt controller. */
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23 | cdbdb648 | pbrook | |
24 | cdbdb648 | pbrook | typedef struct vpb_sic_state |
25 | cdbdb648 | pbrook | { |
26 | 3950f18b | Paul Brook | SysBusDevice busdev; |
27 | 62ceeb2c | Avi Kivity | MemoryRegion iomem; |
28 | cdbdb648 | pbrook | uint32_t level; |
29 | cdbdb648 | pbrook | uint32_t mask; |
30 | cdbdb648 | pbrook | uint32_t pic_enable; |
31 | 97aff481 | Paul Brook | qemu_irq parent[32];
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32 | cdbdb648 | pbrook | int irq;
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33 | cdbdb648 | pbrook | } vpb_sic_state; |
34 | cdbdb648 | pbrook | |
35 | a796d0ac | Peter Maydell | static const VMStateDescription vmstate_vpb_sic = { |
36 | a796d0ac | Peter Maydell | .name = "versatilepb_sic",
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37 | a796d0ac | Peter Maydell | .version_id = 1,
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38 | a796d0ac | Peter Maydell | .minimum_version_id = 1,
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39 | a796d0ac | Peter Maydell | .fields = (VMStateField[]) { |
40 | a796d0ac | Peter Maydell | VMSTATE_UINT32(level, vpb_sic_state), |
41 | a796d0ac | Peter Maydell | VMSTATE_UINT32(mask, vpb_sic_state), |
42 | a796d0ac | Peter Maydell | VMSTATE_UINT32(pic_enable, vpb_sic_state), |
43 | a796d0ac | Peter Maydell | VMSTATE_END_OF_LIST() |
44 | a796d0ac | Peter Maydell | } |
45 | a796d0ac | Peter Maydell | }; |
46 | a796d0ac | Peter Maydell | |
47 | cdbdb648 | pbrook | static void vpb_sic_update(vpb_sic_state *s) |
48 | cdbdb648 | pbrook | { |
49 | cdbdb648 | pbrook | uint32_t flags; |
50 | cdbdb648 | pbrook | |
51 | cdbdb648 | pbrook | flags = s->level & s->mask; |
52 | d537cf6c | pbrook | qemu_set_irq(s->parent[s->irq], flags != 0);
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53 | cdbdb648 | pbrook | } |
54 | cdbdb648 | pbrook | |
55 | cdbdb648 | pbrook | static void vpb_sic_update_pic(vpb_sic_state *s) |
56 | cdbdb648 | pbrook | { |
57 | cdbdb648 | pbrook | int i;
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58 | cdbdb648 | pbrook | uint32_t mask; |
59 | cdbdb648 | pbrook | |
60 | cdbdb648 | pbrook | for (i = 21; i <= 30; i++) { |
61 | cdbdb648 | pbrook | mask = 1u << i;
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62 | cdbdb648 | pbrook | if (!(s->pic_enable & mask))
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63 | cdbdb648 | pbrook | continue;
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64 | d537cf6c | pbrook | qemu_set_irq(s->parent[i], (s->level & mask) != 0);
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65 | cdbdb648 | pbrook | } |
66 | cdbdb648 | pbrook | } |
67 | cdbdb648 | pbrook | |
68 | cdbdb648 | pbrook | static void vpb_sic_set_irq(void *opaque, int irq, int level) |
69 | cdbdb648 | pbrook | { |
70 | cdbdb648 | pbrook | vpb_sic_state *s = (vpb_sic_state *)opaque; |
71 | cdbdb648 | pbrook | if (level)
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72 | cdbdb648 | pbrook | s->level |= 1u << irq;
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73 | cdbdb648 | pbrook | else
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74 | cdbdb648 | pbrook | s->level &= ~(1u << irq);
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75 | cdbdb648 | pbrook | if (s->pic_enable & (1u << irq)) |
76 | d537cf6c | pbrook | qemu_set_irq(s->parent[irq], level); |
77 | cdbdb648 | pbrook | vpb_sic_update(s); |
78 | cdbdb648 | pbrook | } |
79 | cdbdb648 | pbrook | |
80 | 62ceeb2c | Avi Kivity | static uint64_t vpb_sic_read(void *opaque, target_phys_addr_t offset, |
81 | 62ceeb2c | Avi Kivity | unsigned size)
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82 | cdbdb648 | pbrook | { |
83 | cdbdb648 | pbrook | vpb_sic_state *s = (vpb_sic_state *)opaque; |
84 | cdbdb648 | pbrook | |
85 | cdbdb648 | pbrook | switch (offset >> 2) { |
86 | cdbdb648 | pbrook | case 0: /* STATUS */ |
87 | cdbdb648 | pbrook | return s->level & s->mask;
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88 | cdbdb648 | pbrook | case 1: /* RAWSTAT */ |
89 | cdbdb648 | pbrook | return s->level;
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90 | cdbdb648 | pbrook | case 2: /* ENABLE */ |
91 | cdbdb648 | pbrook | return s->mask;
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92 | cdbdb648 | pbrook | case 4: /* SOFTINT */ |
93 | cdbdb648 | pbrook | return s->level & 1; |
94 | cdbdb648 | pbrook | case 8: /* PICENABLE */ |
95 | cdbdb648 | pbrook | return s->pic_enable;
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96 | cdbdb648 | pbrook | default:
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97 | e69954b9 | pbrook | printf ("vpb_sic_read: Bad register offset 0x%x\n", (int)offset); |
98 | cdbdb648 | pbrook | return 0; |
99 | cdbdb648 | pbrook | } |
100 | cdbdb648 | pbrook | } |
101 | cdbdb648 | pbrook | |
102 | c227f099 | Anthony Liguori | static void vpb_sic_write(void *opaque, target_phys_addr_t offset, |
103 | 62ceeb2c | Avi Kivity | uint64_t value, unsigned size)
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104 | cdbdb648 | pbrook | { |
105 | cdbdb648 | pbrook | vpb_sic_state *s = (vpb_sic_state *)opaque; |
106 | cdbdb648 | pbrook | |
107 | cdbdb648 | pbrook | switch (offset >> 2) { |
108 | cdbdb648 | pbrook | case 2: /* ENSET */ |
109 | cdbdb648 | pbrook | s->mask |= value; |
110 | cdbdb648 | pbrook | break;
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111 | cdbdb648 | pbrook | case 3: /* ENCLR */ |
112 | cdbdb648 | pbrook | s->mask &= ~value; |
113 | cdbdb648 | pbrook | break;
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114 | cdbdb648 | pbrook | case 4: /* SOFTINTSET */ |
115 | cdbdb648 | pbrook | if (value)
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116 | cdbdb648 | pbrook | s->mask |= 1;
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117 | cdbdb648 | pbrook | break;
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118 | cdbdb648 | pbrook | case 5: /* SOFTINTCLR */ |
119 | cdbdb648 | pbrook | if (value)
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120 | cdbdb648 | pbrook | s->mask &= ~1u;
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121 | cdbdb648 | pbrook | break;
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122 | cdbdb648 | pbrook | case 8: /* PICENSET */ |
123 | cdbdb648 | pbrook | s->pic_enable |= (value & 0x7fe00000);
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124 | cdbdb648 | pbrook | vpb_sic_update_pic(s); |
125 | cdbdb648 | pbrook | break;
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126 | cdbdb648 | pbrook | case 9: /* PICENCLR */ |
127 | cdbdb648 | pbrook | s->pic_enable &= ~value; |
128 | cdbdb648 | pbrook | vpb_sic_update_pic(s); |
129 | cdbdb648 | pbrook | break;
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130 | cdbdb648 | pbrook | default:
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131 | e69954b9 | pbrook | printf ("vpb_sic_write: Bad register offset 0x%x\n", (int)offset); |
132 | cdbdb648 | pbrook | return;
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133 | cdbdb648 | pbrook | } |
134 | cdbdb648 | pbrook | vpb_sic_update(s); |
135 | cdbdb648 | pbrook | } |
136 | cdbdb648 | pbrook | |
137 | 62ceeb2c | Avi Kivity | static const MemoryRegionOps vpb_sic_ops = { |
138 | 62ceeb2c | Avi Kivity | .read = vpb_sic_read, |
139 | 62ceeb2c | Avi Kivity | .write = vpb_sic_write, |
140 | 62ceeb2c | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
141 | cdbdb648 | pbrook | }; |
142 | cdbdb648 | pbrook | |
143 | 81a322d4 | Gerd Hoffmann | static int vpb_sic_init(SysBusDevice *dev) |
144 | cdbdb648 | pbrook | { |
145 | 3950f18b | Paul Brook | vpb_sic_state *s = FROM_SYSBUS(vpb_sic_state, dev); |
146 | 97aff481 | Paul Brook | int i;
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147 | cdbdb648 | pbrook | |
148 | 067a3ddc | Paul Brook | qdev_init_gpio_in(&dev->qdev, vpb_sic_set_irq, 32);
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149 | 97aff481 | Paul Brook | for (i = 0; i < 32; i++) { |
150 | 3950f18b | Paul Brook | sysbus_init_irq(dev, &s->parent[i]); |
151 | 97aff481 | Paul Brook | } |
152 | 3950f18b | Paul Brook | s->irq = 31;
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153 | 62ceeb2c | Avi Kivity | memory_region_init_io(&s->iomem, &vpb_sic_ops, s, "vpb-sic", 0x1000); |
154 | 750ecd44 | Avi Kivity | sysbus_init_mmio(dev, &s->iomem); |
155 | 81a322d4 | Gerd Hoffmann | return 0; |
156 | cdbdb648 | pbrook | } |
157 | cdbdb648 | pbrook | |
158 | cdbdb648 | pbrook | /* Board init. */
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159 | cdbdb648 | pbrook | |
160 | 16406950 | pbrook | /* The AB and PB boards both use the same core, just with different
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161 | 16406950 | pbrook | peripherans and expansion busses. For now we emulate a subset of the
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162 | 16406950 | pbrook | PB peripherals and just change the board ID. */
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163 | cdbdb648 | pbrook | |
164 | f93eb9ff | balrog | static struct arm_boot_info versatile_binfo; |
165 | f93eb9ff | balrog | |
166 | c227f099 | Anthony Liguori | static void versatile_init(ram_addr_t ram_size, |
167 | 3023f332 | aliguori | const char *boot_device, |
168 | cdbdb648 | pbrook | const char *kernel_filename, const char *kernel_cmdline, |
169 | 3371d272 | pbrook | const char *initrd_filename, const char *cpu_model, |
170 | 3371d272 | pbrook | int board_id)
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171 | cdbdb648 | pbrook | { |
172 | cdbdb648 | pbrook | CPUState *env; |
173 | 62ceeb2c | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
174 | 62ceeb2c | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
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175 | 97aff481 | Paul Brook | qemu_irq *cpu_pic; |
176 | 97aff481 | Paul Brook | qemu_irq pic[32];
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177 | 3950f18b | Paul Brook | qemu_irq sic[32];
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178 | 242ea2c6 | Peter Maydell | DeviceState *dev, *sysctl; |
179 | 7d6e771f | Peter Maydell | SysBusDevice *busdev; |
180 | d028d02d | Mathieu Sonet | DeviceState *pl041; |
181 | 502a5395 | pbrook | PCIBus *pci_bus; |
182 | 502a5395 | pbrook | NICInfo *nd; |
183 | 502a5395 | pbrook | int n;
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184 | 502a5395 | pbrook | int done_smc = 0; |
185 | cdbdb648 | pbrook | |
186 | 3371d272 | pbrook | if (!cpu_model)
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187 | 3371d272 | pbrook | cpu_model = "arm926";
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188 | aaed909a | bellard | env = cpu_init(cpu_model); |
189 | aaed909a | bellard | if (!env) {
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190 | aaed909a | bellard | fprintf(stderr, "Unable to find CPU definition\n");
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191 | aaed909a | bellard | exit(1);
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192 | aaed909a | bellard | } |
193 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "versatile.ram", ram_size);
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194 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
195 | 1235fc06 | ths | /* ??? RAM should repeat to fill physical memory space. */
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196 | cdbdb648 | pbrook | /* SDRAM at address zero. */
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197 | 62ceeb2c | Avi Kivity | memory_region_add_subregion(sysmem, 0, ram);
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198 | cdbdb648 | pbrook | |
199 | 242ea2c6 | Peter Maydell | sysctl = qdev_create(NULL, "realview_sysctl"); |
200 | 242ea2c6 | Peter Maydell | qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); |
201 | 242ea2c6 | Peter Maydell | qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000); |
202 | 7a65c8cc | Peter Maydell | qdev_init_nofail(sysctl); |
203 | 242ea2c6 | Peter Maydell | sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000); |
204 | 242ea2c6 | Peter Maydell | |
205 | 97aff481 | Paul Brook | cpu_pic = arm_pic_init_cpu(env); |
206 | 97aff481 | Paul Brook | dev = sysbus_create_varargs("pl190", 0x10140000, |
207 | 97aff481 | Paul Brook | cpu_pic[0], cpu_pic[1], NULL); |
208 | 97aff481 | Paul Brook | for (n = 0; n < 32; n++) { |
209 | 067a3ddc | Paul Brook | pic[n] = qdev_get_gpio_in(dev, n); |
210 | 97aff481 | Paul Brook | } |
211 | 3950f18b | Paul Brook | dev = sysbus_create_simple("versatilepb_sic", 0x10003000, NULL); |
212 | 3950f18b | Paul Brook | for (n = 0; n < 32; n++) { |
213 | 3950f18b | Paul Brook | sysbus_connect_irq(sysbus_from_qdev(dev), n, pic[n]); |
214 | 067a3ddc | Paul Brook | sic[n] = qdev_get_gpio_in(dev, n); |
215 | 3950f18b | Paul Brook | } |
216 | 86394e96 | Paul Brook | |
217 | 86394e96 | Paul Brook | sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]); |
218 | 86394e96 | Paul Brook | sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]); |
219 | cdbdb648 | pbrook | |
220 | 7d6e771f | Peter Maydell | dev = qdev_create(NULL, "versatile_pci"); |
221 | 7d6e771f | Peter Maydell | busdev = sysbus_from_qdev(dev); |
222 | 7d6e771f | Peter Maydell | qdev_init_nofail(dev); |
223 | 7d6e771f | Peter Maydell | sysbus_mmio_map(busdev, 0, 0x41000000); /* PCI self-config */ |
224 | 7d6e771f | Peter Maydell | sysbus_mmio_map(busdev, 1, 0x42000000); /* PCI config */ |
225 | 7d6e771f | Peter Maydell | sysbus_connect_irq(busdev, 0, sic[27]); |
226 | 7d6e771f | Peter Maydell | sysbus_connect_irq(busdev, 1, sic[28]); |
227 | 7d6e771f | Peter Maydell | sysbus_connect_irq(busdev, 2, sic[29]); |
228 | 7d6e771f | Peter Maydell | sysbus_connect_irq(busdev, 3, sic[30]); |
229 | 02e2da45 | Paul Brook | pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
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230 | 0027b06d | Paul Brook | |
231 | 502a5395 | pbrook | /* The Versatile PCI bridge does not provide access to PCI IO space,
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232 | 502a5395 | pbrook | so many of the qemu PCI devices are not useable. */
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233 | 502a5395 | pbrook | for(n = 0; n < nb_nics; n++) { |
234 | 502a5395 | pbrook | nd = &nd_table[n]; |
235 | 0ae18cee | aliguori | |
236 | e6b3c8ca | Peter Maydell | if (!done_smc && (!nd->model || strcmp(nd->model, "smc91c111") == 0)) { |
237 | d537cf6c | pbrook | smc91c111_init(nd, 0x10010000, sic[25]); |
238 | 0ae18cee | aliguori | done_smc = 1;
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239 | cdbdb648 | pbrook | } else {
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240 | 07caea31 | Markus Armbruster | pci_nic_init_nofail(nd, "rtl8139", NULL); |
241 | cdbdb648 | pbrook | } |
242 | cdbdb648 | pbrook | } |
243 | 0d92ed30 | pbrook | if (usb_enabled) {
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244 | a67ba3b6 | Paul Brook | usb_ohci_init_pci(pci_bus, -1);
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245 | 0d92ed30 | pbrook | } |
246 | 9be5dafe | Paul Brook | n = drive_get_max_bus(IF_SCSI); |
247 | 9be5dafe | Paul Brook | while (n >= 0) { |
248 | 9be5dafe | Paul Brook | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
249 | 9be5dafe | Paul Brook | n--; |
250 | 7d8406be | pbrook | } |
251 | cdbdb648 | pbrook | |
252 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x101f1000, pic[12]); |
253 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x101f2000, pic[13]); |
254 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x101f3000, pic[14]); |
255 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x10009000, sic[6]); |
256 | cdbdb648 | pbrook | |
257 | b4496b13 | Paul Brook | sysbus_create_simple("pl080", 0x10130000, pic[17]); |
258 | 6a824ec3 | Paul Brook | sysbus_create_simple("sp804", 0x101e2000, pic[4]); |
259 | 6a824ec3 | Paul Brook | sysbus_create_simple("sp804", 0x101e3000, pic[5]); |
260 | cdbdb648 | pbrook | |
261 | cdbdb648 | pbrook | /* The versatile/PB actually has a modified Color LCD controller
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262 | cdbdb648 | pbrook | that includes hardware cursor support from the PL111. */
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263 | 242ea2c6 | Peter Maydell | dev = sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]); |
264 | 242ea2c6 | Peter Maydell | /* Wire up the mux control signals from the SYS_CLCD register */
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265 | 242ea2c6 | Peter Maydell | qdev_connect_gpio_out(sysctl, 0, qdev_get_gpio_in(dev, 0)); |
266 | cdbdb648 | pbrook | |
267 | aa9311d8 | Paul Brook | sysbus_create_varargs("pl181", 0x10005000, sic[22], sic[1], NULL); |
268 | aa9311d8 | Paul Brook | sysbus_create_varargs("pl181", 0x1000b000, sic[23], sic[2], NULL); |
269 | a1bb27b1 | pbrook | |
270 | 7e1543c2 | pbrook | /* Add PL031 Real Time Clock. */
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271 | a63bdb31 | Paul Brook | sysbus_create_simple("pl031", 0x101e8000, pic[10]); |
272 | 7e1543c2 | pbrook | |
273 | d028d02d | Mathieu Sonet | /* Add PL041 AACI Interface to the LM4549 codec */
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274 | d028d02d | Mathieu Sonet | pl041 = qdev_create(NULL, "pl041"); |
275 | d028d02d | Mathieu Sonet | qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); |
276 | d028d02d | Mathieu Sonet | qdev_init_nofail(pl041); |
277 | d028d02d | Mathieu Sonet | sysbus_mmio_map(sysbus_from_qdev(pl041), 0, 0x10004000); |
278 | d028d02d | Mathieu Sonet | sysbus_connect_irq(sysbus_from_qdev(pl041), 0, sic[24]); |
279 | d028d02d | Mathieu Sonet | |
280 | 16406950 | pbrook | /* Memory map for Versatile/PB: */
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281 | cdbdb648 | pbrook | /* 0x10000000 System registers. */
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282 | cdbdb648 | pbrook | /* 0x10001000 PCI controller config registers. */
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283 | cdbdb648 | pbrook | /* 0x10002000 Serial bus interface. */
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284 | cdbdb648 | pbrook | /* 0x10003000 Secondary interrupt controller. */
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285 | cdbdb648 | pbrook | /* 0x10004000 AACI (audio). */
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286 | a1bb27b1 | pbrook | /* 0x10005000 MMCI0. */
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287 | cdbdb648 | pbrook | /* 0x10006000 KMI0 (keyboard). */
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288 | cdbdb648 | pbrook | /* 0x10007000 KMI1 (mouse). */
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289 | cdbdb648 | pbrook | /* 0x10008000 Character LCD Interface. */
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290 | cdbdb648 | pbrook | /* 0x10009000 UART3. */
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291 | cdbdb648 | pbrook | /* 0x1000a000 Smart card 1. */
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292 | a1bb27b1 | pbrook | /* 0x1000b000 MMCI1. */
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293 | cdbdb648 | pbrook | /* 0x10010000 Ethernet. */
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294 | cdbdb648 | pbrook | /* 0x10020000 USB. */
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295 | cdbdb648 | pbrook | /* 0x10100000 SSMC. */
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296 | cdbdb648 | pbrook | /* 0x10110000 MPMC. */
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297 | cdbdb648 | pbrook | /* 0x10120000 CLCD Controller. */
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298 | cdbdb648 | pbrook | /* 0x10130000 DMA Controller. */
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299 | cdbdb648 | pbrook | /* 0x10140000 Vectored interrupt controller. */
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300 | cdbdb648 | pbrook | /* 0x101d0000 AHB Monitor Interface. */
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301 | cdbdb648 | pbrook | /* 0x101e0000 System Controller. */
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302 | cdbdb648 | pbrook | /* 0x101e1000 Watchdog Interface. */
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303 | cdbdb648 | pbrook | /* 0x101e2000 Timer 0/1. */
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304 | cdbdb648 | pbrook | /* 0x101e3000 Timer 2/3. */
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305 | cdbdb648 | pbrook | /* 0x101e4000 GPIO port 0. */
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306 | cdbdb648 | pbrook | /* 0x101e5000 GPIO port 1. */
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307 | cdbdb648 | pbrook | /* 0x101e6000 GPIO port 2. */
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308 | cdbdb648 | pbrook | /* 0x101e7000 GPIO port 3. */
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309 | cdbdb648 | pbrook | /* 0x101e8000 RTC. */
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310 | cdbdb648 | pbrook | /* 0x101f0000 Smart card 0. */
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311 | cdbdb648 | pbrook | /* 0x101f1000 UART0. */
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312 | cdbdb648 | pbrook | /* 0x101f2000 UART1. */
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313 | cdbdb648 | pbrook | /* 0x101f3000 UART2. */
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314 | cdbdb648 | pbrook | /* 0x101f4000 SSPI. */
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315 | cdbdb648 | pbrook | |
316 | f93eb9ff | balrog | versatile_binfo.ram_size = ram_size; |
317 | f93eb9ff | balrog | versatile_binfo.kernel_filename = kernel_filename; |
318 | f93eb9ff | balrog | versatile_binfo.kernel_cmdline = kernel_cmdline; |
319 | f93eb9ff | balrog | versatile_binfo.initrd_filename = initrd_filename; |
320 | f93eb9ff | balrog | versatile_binfo.board_id = board_id; |
321 | f93eb9ff | balrog | arm_load_kernel(env, &versatile_binfo); |
322 | 16406950 | pbrook | } |
323 | 16406950 | pbrook | |
324 | c227f099 | Anthony Liguori | static void vpb_init(ram_addr_t ram_size, |
325 | 3023f332 | aliguori | const char *boot_device, |
326 | 16406950 | pbrook | const char *kernel_filename, const char *kernel_cmdline, |
327 | 94fc95cd | j_mayer | const char *initrd_filename, const char *cpu_model) |
328 | 16406950 | pbrook | { |
329 | fbe1b595 | Paul Brook | versatile_init(ram_size, |
330 | 3023f332 | aliguori | boot_device, |
331 | 16406950 | pbrook | kernel_filename, kernel_cmdline, |
332 | 3371d272 | pbrook | initrd_filename, cpu_model, 0x183);
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333 | 16406950 | pbrook | } |
334 | 16406950 | pbrook | |
335 | c227f099 | Anthony Liguori | static void vab_init(ram_addr_t ram_size, |
336 | 3023f332 | aliguori | const char *boot_device, |
337 | 16406950 | pbrook | const char *kernel_filename, const char *kernel_cmdline, |
338 | 94fc95cd | j_mayer | const char *initrd_filename, const char *cpu_model) |
339 | 16406950 | pbrook | { |
340 | fbe1b595 | Paul Brook | versatile_init(ram_size, |
341 | 3023f332 | aliguori | boot_device, |
342 | 16406950 | pbrook | kernel_filename, kernel_cmdline, |
343 | 3371d272 | pbrook | initrd_filename, cpu_model, 0x25e);
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344 | cdbdb648 | pbrook | } |
345 | cdbdb648 | pbrook | |
346 | f80f9ec9 | Anthony Liguori | static QEMUMachine versatilepb_machine = {
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347 | c9b1ae2c | blueswir1 | .name = "versatilepb",
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348 | c9b1ae2c | blueswir1 | .desc = "ARM Versatile/PB (ARM926EJ-S)",
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349 | c9b1ae2c | blueswir1 | .init = vpb_init, |
350 | c9b1ae2c | blueswir1 | .use_scsi = 1,
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351 | cdbdb648 | pbrook | }; |
352 | 16406950 | pbrook | |
353 | f80f9ec9 | Anthony Liguori | static QEMUMachine versatileab_machine = {
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354 | c9b1ae2c | blueswir1 | .name = "versatileab",
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355 | c9b1ae2c | blueswir1 | .desc = "ARM Versatile/AB (ARM926EJ-S)",
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356 | c9b1ae2c | blueswir1 | .init = vab_init, |
357 | c9b1ae2c | blueswir1 | .use_scsi = 1,
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358 | 16406950 | pbrook | }; |
359 | 3950f18b | Paul Brook | |
360 | f80f9ec9 | Anthony Liguori | static void versatile_machine_init(void) |
361 | f80f9ec9 | Anthony Liguori | { |
362 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&versatilepb_machine); |
363 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&versatileab_machine); |
364 | f80f9ec9 | Anthony Liguori | } |
365 | f80f9ec9 | Anthony Liguori | |
366 | f80f9ec9 | Anthony Liguori | machine_init(versatile_machine_init); |
367 | f80f9ec9 | Anthony Liguori | |
368 | 999e12bb | Anthony Liguori | static void vpb_sic_class_init(ObjectClass *klass, void *data) |
369 | 999e12bb | Anthony Liguori | { |
370 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
371 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
372 | 999e12bb | Anthony Liguori | |
373 | 999e12bb | Anthony Liguori | k->init = vpb_sic_init; |
374 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
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375 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_vpb_sic; |
376 | 999e12bb | Anthony Liguori | } |
377 | 999e12bb | Anthony Liguori | |
378 | 39bffca2 | Anthony Liguori | static TypeInfo vpb_sic_info = {
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379 | 39bffca2 | Anthony Liguori | .name = "versatilepb_sic",
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380 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
381 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(vpb_sic_state),
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382 | 39bffca2 | Anthony Liguori | .class_init = vpb_sic_class_init, |
383 | a796d0ac | Peter Maydell | }; |
384 | a796d0ac | Peter Maydell | |
385 | 83f7d43a | Andreas Färber | static void versatilepb_register_types(void) |
386 | 3950f18b | Paul Brook | { |
387 | 39bffca2 | Anthony Liguori | type_register_static(&vpb_sic_info); |
388 | 3950f18b | Paul Brook | } |
389 | 3950f18b | Paul Brook | |
390 | 83f7d43a | Andreas Färber | type_init(versatilepb_register_types) |