Revision 25ba3a68

b/target-ppc/cpu.h
354 354
#define MSR_AP   23 /* Access privilege state on 602                  hflags */
355 355
#define MSR_SA   22 /* Supervisor access mode on 602                  hflags */
356 356
#define MSR_KEY  19 /* key bit on 603e                                       */
357
#define MSR_POW  18 /* Power management                             x        */
358
#define MSR_WE   18 /* Wait state enable on embedded PowerPC        x        */
357
#define MSR_POW  18 /* Power management                                      */
359 358
#define MSR_TGPR 17 /* TGPR usage on 602/603                        x        */
360 359
#define MSR_CE   17 /* Critical interrupt enable on embedded PowerPC x       */
361 360
#define MSR_ILE  16 /* Interrupt little-endian mode                          */
......
371 370
#define MSR_DE   9  /* Debug interrupts enable on embedded PowerPC  x        */
372 371
#define MSR_FE1  8  /* Floating point exception mode 1                hflags */
373 372
#define MSR_AL   7  /* AL bit on POWER                                       */
374
#define MSR_IP   6  /* Interrupt prefix                                      */
373
#define MSR_EP   3  /* Exception prefix on 601                               */
375 374
#define MSR_IR   5  /* Instruction relocate                                  */
376 375
#define MSR_DR   4  /* Data relocate                                         */
377
#define MSR_PE   3  /* Protection enable on 403                     x        */
378
#define MSR_EP   3  /* Exception prefix on 601                      x        */
376
#define MSR_PE   3  /* Protection enable on 403                              */
379 377
#define MSR_PX   2  /* Protection exclusive on 403                  x        */
380 378
#define MSR_PMM  2  /* Performance monitor mark on POWER            x        */
381 379
#define MSR_RI   1  /* Recoverable interrupt                        1        */
......
392 390
#define msr_sa   env->msr[MSR_SA]
393 391
#define msr_key  env->msr[MSR_KEY]
394 392
#define msr_pow  env->msr[MSR_POW]
395
#define msr_we   env->msr[MSR_WE]
396 393
#define msr_tgpr env->msr[MSR_TGPR]
397 394
#define msr_ce   env->msr[MSR_CE]
398 395
#define msr_ile  env->msr[MSR_ILE]
......
408 405
#define msr_de   env->msr[MSR_DE]
409 406
#define msr_fe1  env->msr[MSR_FE1]
410 407
#define msr_al   env->msr[MSR_AL]
411
#define msr_ip   env->msr[MSR_IP]
412 408
#define msr_ir   env->msr[MSR_IR]
413 409
#define msr_dr   env->msr[MSR_DR]
414 410
#define msr_pe   env->msr[MSR_PE]
......
419 415
#define msr_le   env->msr[MSR_LE]
420 416

  
421 417
enum {
422
    /* Beware that MSR bits are given using IBM standard (ie MSB is 0 !)     */
423 418
    POWERPC_FLAG_NONE = 0x00000000,
424 419
    /* Flag for MSR bit 25 signification (VRE/SPE)                           */
425 420
    POWERPC_FLAG_SPE  = 0x00000001,
426 421
    POWERPC_FLAG_VRE  = 0x00000002,
427
    /* Flag for MSR bit 18 may not be needed...                              */
428
    POWERPC_FLAG_POW  = 0x00000004,
429
    POWERPC_FLAG_WE   = 0x00000008,
430 422
    /* Flag for MSR bit 17 signification (TGPR/CE)                           */
431
    POWERPC_FLAG_TGPR = 0x00000010,
432
    POWERPC_FLAG_CE   = 0x00000020,
423
    POWERPC_FLAG_TGPR = 0x00000004,
424
    POWERPC_FLAG_CE   = 0x00000008,
433 425
    /* Flag for MSR bit 10 signification (SE/DWE/UBLE)                       */
434
    POWERPC_FLAG_SE   = 0x00000040,
435
    POWERPC_FLAG_DWE  = 0x00000080,
436
    POWERPC_FLAG_UBLE = 0x00000100,
426
    POWERPC_FLAG_SE   = 0x00000010,
427
    POWERPC_FLAG_DWE  = 0x00000020,
428
    POWERPC_FLAG_UBLE = 0x00000040,
437 429
    /* Flag for MSR bit 9 signification (BE/DE)                              */
438
    POWERPC_FLAG_BE   = 0x00000200,
439
    POWERPC_FLAG_DE   = 0x00000400,
440
    /* Flag for MSR bit 3 signification (PE/EP)                              */
441
    POWERPC_FLAG_PE   = 0x00000800,
442
    POWERPC_FLAG_EP   = 0x00001000,
430
    POWERPC_FLAG_BE   = 0x00000080,
431
    POWERPC_FLAG_DE   = 0x00000100,
443 432
    /* Flag for MSR but 2 signification (PX/PMM)                             */
444
    POWERPC_FLAG_PX   = 0x00002000,
445
    POWERPC_FLAG_PMM  = 0x00004000,
433
    POWERPC_FLAG_PX   = 0x00000200,
434
    POWERPC_FLAG_PMM  = 0x00000400,
446 435
};
447 436

  
448 437
/*****************************************************************************/
b/target-ppc/helper.c
1964 1964
        ((target_ulong)msr_ap   << MSR_AP)   |
1965 1965
        ((target_ulong)msr_sa   << MSR_SA)   |
1966 1966
        ((target_ulong)msr_key  << MSR_KEY)  |
1967
        ((target_ulong)msr_pow  << MSR_POW)  | /* POW / WE */
1967
        ((target_ulong)msr_pow  << MSR_POW)  |
1968 1968
        ((target_ulong)msr_tgpr << MSR_TGPR) | /* TGPR / CE */
1969 1969
        ((target_ulong)msr_ile  << MSR_ILE)  |
1970 1970
        ((target_ulong)msr_ee   << MSR_EE)   |
......
1976 1976
        ((target_ulong)msr_be   << MSR_BE)   | /* BE / DE */
1977 1977
        ((target_ulong)msr_fe1  << MSR_FE1)  |
1978 1978
        ((target_ulong)msr_al   << MSR_AL)   |
1979
        ((target_ulong)msr_ip   << MSR_IP)   |
1980
        ((target_ulong)msr_ir   << MSR_IR)   | /* IR / IS */
1981
        ((target_ulong)msr_dr   << MSR_DR)   | /* DR / DS */
1982
        ((target_ulong)msr_pe   << MSR_PE)   | /* PE / EP */
1979
        ((target_ulong)msr_ep   << MSR_EP)   |
1980
        ((target_ulong)msr_ir   << MSR_IR)   |
1981
        ((target_ulong)msr_dr   << MSR_DR)   |
1982
        ((target_ulong)msr_pe   << MSR_PE)   |
1983 1983
        ((target_ulong)msr_px   << MSR_PX)   | /* PX / PMM */
1984 1984
        ((target_ulong)msr_ri   << MSR_RI)   |
1985 1985
        ((target_ulong)msr_le   << MSR_LE);
......
2017 2017
    msr_ap   = (value >> MSR_AP)   & 1;
2018 2018
    msr_sa   = (value >> MSR_SA)   & 1;
2019 2019
    msr_key  = (value >> MSR_KEY)  & 1;
2020
    msr_pow  = (value >> MSR_POW)  & 1; /* POW / WE */
2020
    msr_pow  = (value >> MSR_POW)  & 1;
2021 2021
    msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */
2022 2022
    msr_ile  = (value >> MSR_ILE)  & 1;
2023 2023
    msr_ee   = (value >> MSR_EE)   & 1;
......
2029 2029
    msr_be   = (value >> MSR_BE)   & 1; /* BE / DE */
2030 2030
    msr_fe1  = (value >> MSR_FE1)  & 1;
2031 2031
    msr_al   = (value >> MSR_AL)   & 1;
2032
    msr_ip   = (value >> MSR_IP)   & 1;
2033
    msr_ir   = (value >> MSR_IR)   & 1; /* IR / IS */
2034
    msr_dr   = (value >> MSR_DR)   & 1; /* DR / DS */
2035
    msr_pe   = (value >> MSR_PE)   & 1; /* PE / EP */
2032
    msr_ep   = (value >> MSR_EP)   & 1;
2033
    msr_ir   = (value >> MSR_IR)   & 1;
2034
    msr_dr   = (value >> MSR_DR)   & 1;
2035
    msr_pe   = (value >> MSR_PE)   & 1;
2036 2036
    msr_px   = (value >> MSR_PX)   & 1; /* PX / PMM */
2037 2037
    msr_ri   = (value >> MSR_RI)   & 1;
2038 2038
    msr_le   = (value >> MSR_LE)   & 1;
b/target-ppc/translate_init.c
2620 2620
#define POWERPC_EXCP_401     (POWERPC_EXCP_40x)
2621 2621
#define POWERPC_INPUT_401    (PPC_FLAGS_INPUT_401)
2622 2622
#define POWERPC_BFDM_401     (bfd_mach_ppc_403)
2623
#define POWERPC_FLAG_401     (POWERPC_FLAG_NONE)
2623
#define POWERPC_FLAG_401     (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
2624 2624

  
2625 2625
static void init_proc_401 (CPUPPCState *env)
2626 2626
{
......
2645 2645
#define POWERPC_EXCP_401x2   (POWERPC_EXCP_40x)
2646 2646
#define POWERPC_INPUT_401x2  (PPC_FLAGS_INPUT_401)
2647 2647
#define POWERPC_BFDM_401x2   (bfd_mach_ppc_403)
2648
#define POWERPC_FLAG_401x2   (POWERPC_FLAG_NONE)
2648
#define POWERPC_FLAG_401x2   (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
2649 2649

  
2650 2650
static void init_proc_401x2 (CPUPPCState *env)
2651 2651
{
......
2677 2677
#define POWERPC_EXCP_401x3   (POWERPC_EXCP_40x)
2678 2678
#define POWERPC_INPUT_401x3  (PPC_FLAGS_INPUT_401)
2679 2679
#define POWERPC_BFDM_401x3   (bfd_mach_ppc_403)
2680
#define POWERPC_FLAG_401x3   (POWERPC_FLAG_NONE)
2680
#define POWERPC_FLAG_401x3   (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
2681 2681

  
2682 2682
__attribute__ (( unused ))
2683 2683
static void init_proc_401x3 (CPUPPCState *env)
......
2705 2705
#define POWERPC_EXCP_IOP480  (POWERPC_EXCP_40x)
2706 2706
#define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401)
2707 2707
#define POWERPC_BFDM_IOP480  (bfd_mach_ppc_403)
2708
#define POWERPC_FLAG_IOP480  (POWERPC_FLAG_NONE)
2708
#define POWERPC_FLAG_IOP480  (POWERPC_FLAG_CE | POWERPC_FLAG_DE)
2709 2709

  
2710 2710
static void init_proc_IOP480 (CPUPPCState *env)
2711 2711
{
......
2735 2735
#define POWERPC_EXCP_403     (POWERPC_EXCP_40x)
2736 2736
#define POWERPC_INPUT_403    (PPC_FLAGS_INPUT_401)
2737 2737
#define POWERPC_BFDM_403     (bfd_mach_ppc_403)
2738
#define POWERPC_FLAG_403     (POWERPC_FLAG_NONE)
2738
#define POWERPC_FLAG_403     (POWERPC_FLAG_CE | POWERPC_FLAG_PX)
2739 2739

  
2740 2740
static void init_proc_403 (CPUPPCState *env)
2741 2741
{
......
2764 2764
#define POWERPC_EXCP_403GCX  (POWERPC_EXCP_40x)
2765 2765
#define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401)
2766 2766
#define POWERPC_BFDM_403GCX  (bfd_mach_ppc_403)
2767
#define POWERPC_FLAG_403GCX  (POWERPC_FLAG_NONE)
2767
#define POWERPC_FLAG_403GCX  (POWERPC_FLAG_CE | POWERPC_FLAG_PX)
2768 2768

  
2769 2769
static void init_proc_403GCX (CPUPPCState *env)
2770 2770
{
......
2808 2808
#define POWERPC_EXCP_405     (POWERPC_EXCP_40x)
2809 2809
#define POWERPC_INPUT_405    (PPC_FLAGS_INPUT_405)
2810 2810
#define POWERPC_BFDM_405     (bfd_mach_ppc_403)
2811
#define POWERPC_FLAG_405     (POWERPC_FLAG_NONE)
2811
#define POWERPC_FLAG_405     (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
2812
                              POWERPC_FLAG_DE)
2812 2813

  
2813 2814
static void init_proc_405 (CPUPPCState *env)
2814 2815
{
......
2850 2851
#define POWERPC_EXCP_440EP   (POWERPC_EXCP_BOOKE)
2851 2852
#define POWERPC_INPUT_440EP  (PPC_FLAGS_INPUT_BookE)
2852 2853
#define POWERPC_BFDM_440EP   (bfd_mach_ppc_403)
2853
#define POWERPC_FLAG_440EP   (POWERPC_FLAG_NONE)
2854
#define POWERPC_FLAG_440EP   (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
2855
                              POWERPC_FLAG_DE)
2854 2856

  
2855 2857
static void init_proc_440EP (CPUPPCState *env)
2856 2858
{
......
2898 2900
#define POWERPC_EXCP_440GP   (POWERPC_EXCP_BOOKE)
2899 2901
#define POWERPC_INPUT_440GP  (PPC_FLAGS_INPUT_BookE)
2900 2902
#define POWERPC_BFDM_440GP   (bfd_mach_ppc_403)
2901
#define POWERPC_FLAG_440GP   (POWERPC_FLAG_NONE)
2903
#define POWERPC_FLAG_440GP   (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
2904
                              POWERPC_FLAG_DE)
2902 2905

  
2903 2906
static void init_proc_440GP (CPUPPCState *env)
2904 2907
{
......
2928 2931
#define POWERPC_EXCP_440x4   (POWERPC_EXCP_BOOKE)
2929 2932
#define POWERPC_INPUT_440x4  (PPC_FLAGS_INPUT_BookE)
2930 2933
#define POWERPC_BFDM_440x4   (bfd_mach_ppc_403)
2931
#define POWERPC_FLAG_440x4   (POWERPC_FLAG_NONE)
2934
#define POWERPC_FLAG_440x4   (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
2935
                              POWERPC_FLAG_DE)
2932 2936

  
2933 2937
__attribute__ (( unused ))
2934 2938
static void init_proc_440x4 (CPUPPCState *env)
......
2959 2963
#define POWERPC_EXCP_440x5   (POWERPC_EXCP_BOOKE)
2960 2964
#define POWERPC_INPUT_440x5  (PPC_FLAGS_INPUT_BookE)
2961 2965
#define POWERPC_BFDM_440x5   (bfd_mach_ppc_403)
2962
#define POWERPC_FLAG_440x5   (POWERPC_FLAG_NONE)
2966
#define POWERPC_FLAG_440x5   (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |           \
2967
                              POWERPC_FLAG_DE)
2963 2968

  
2964 2969
static void init_proc_440x5 (CPUPPCState *env)
2965 2970
{
......
3007 3012
#define POWERPC_EXCP_460     (POWERPC_EXCP_BOOKE)
3008 3013
#define POWERPC_INPUT_460    (PPC_FLAGS_INPUT_BookE)
3009 3014
#define POWERPC_BFDM_460     (bfd_mach_ppc_403)
3010
#define POWERPC_FLAG_460     (POWERPC_FLAG_NONE)
3015
#define POWERPC_FLAG_460     (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
3016
                              POWERPC_FLAG_DE)
3011 3017

  
3012 3018
__attribute__ (( unused ))
3013 3019
static void init_proc_460 (CPUPPCState *env)
......
3064 3070
#define POWERPC_EXCP_460F    (POWERPC_EXCP_BOOKE)
3065 3071
#define POWERPC_INPUT_460F   (PPC_FLAGS_INPUT_BookE)
3066 3072
#define POWERPC_BFDM_460F    (bfd_mach_ppc_403)
3067
#define POWERPC_FLAG_460F    (POWERPC_FLAG_NONE)
3073
#define POWERPC_FLAG_460F    (POWERPC_FLAG_CE | POWERPC_FLAG_DWE |            \
3074
                              POWERPC_FLAG_DE)
3068 3075

  
3069 3076
__attribute__ (( unused ))
3070 3077
static void init_proc_460F (CPUPPCState *env)
......
3188 3195
/* PowerPC 601                                                               */
3189 3196
#define POWERPC_INSNS_601    (POWERPC_INSNS_6xx | PPC_CACHE_DCBZ |            \
3190 3197
                              PPC_SEGMENT | PPC_EXTERN | PPC_POWER_BR)
3191
#define POWERPC_MSRM_601     (0x000000000000FE70ULL)
3198
#define POWERPC_MSRM_601     (0x000000000000FD70ULL)
3192 3199
//#define POWERPC_MMU_601      (POWERPC_MMU_601)
3193 3200
//#define POWERPC_EXCP_601     (POWERPC_EXCP_601)
3194 3201
#define POWERPC_INPUT_601    (PPC_FLAGS_INPUT_6xx)
3195 3202
#define POWERPC_BFDM_601     (bfd_mach_ppc_601)
3196
#define POWERPC_FLAG_601     (POWERPC_FLAG_NONE)
3203
#define POWERPC_FLAG_601     (POWERPC_FLAG_SE)
3197 3204

  
3198 3205
static void init_proc_601 (CPUPPCState *env)
3199 3206
{
......
3248 3255
//#define POWERPC_EXCP_602     (POWERPC_EXCP_602)
3249 3256
#define POWERPC_INPUT_602    (PPC_FLAGS_INPUT_6xx)
3250 3257
#define POWERPC_BFDM_602     (bfd_mach_ppc_602)
3251
#define POWERPC_FLAG_602     (POWERPC_FLAG_TGPR)
3258
#define POWERPC_FLAG_602     (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |           \
3259
                              POWERPC_FLAG_BE)
3252 3260

  
3253 3261
static void init_proc_602 (CPUPPCState *env)
3254 3262
{
......
3279 3287

  
3280 3288
/* PowerPC 603                                                               */
3281 3289
#define POWERPC_INSNS_603    (POWERPC_INSNS_WORKS | PPC_6xx_TLB | PPC_EXTERN)
3282
#define POWERPC_MSRM_603     (0x000000000001FF73ULL)
3290
#define POWERPC_MSRM_603     (0x000000000007FF73ULL)
3283 3291
#define POWERPC_MMU_603      (POWERPC_MMU_SOFT_6xx)
3284 3292
//#define POWERPC_EXCP_603     (POWERPC_EXCP_603)
3285 3293
#define POWERPC_INPUT_603    (PPC_FLAGS_INPUT_6xx)
3286 3294
#define POWERPC_BFDM_603     (bfd_mach_ppc_603)
3287
#define POWERPC_FLAG_603     (POWERPC_FLAG_TGPR)
3295
#define POWERPC_FLAG_603     (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |           \
3296
                              POWERPC_FLAG_BE)
3288 3297

  
3289 3298
static void init_proc_603 (CPUPPCState *env)
3290 3299
{
......
3320 3329
//#define POWERPC_EXCP_603E    (POWERPC_EXCP_603E)
3321 3330
#define POWERPC_INPUT_603E   (PPC_FLAGS_INPUT_6xx)
3322 3331
#define POWERPC_BFDM_603E    (bfd_mach_ppc_ec603e)
3323
#define POWERPC_FLAG_603E    (POWERPC_FLAG_TGPR)
3332
#define POWERPC_FLAG_603E    (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |           \
3333
                              POWERPC_FLAG_BE)
3324 3334

  
3325 3335
static void init_proc_603E (CPUPPCState *env)
3326 3336
{
......
3361 3371
//#define POWERPC_EXCP_G2      (POWERPC_EXCP_G2)
3362 3372
#define POWERPC_INPUT_G2     (PPC_FLAGS_INPUT_6xx)
3363 3373
#define POWERPC_BFDM_G2      (bfd_mach_ppc_ec603e)
3364
#define POWERPC_FLAG_G2      (POWERPC_FLAG_TGPR)
3374
#define POWERPC_FLAG_G2      (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |           \
3375
                              POWERPC_FLAG_BE)
3365 3376

  
3366 3377
static void init_proc_G2 (CPUPPCState *env)
3367 3378
{
......
3404 3415
#define POWERPC_EXCP_G2LE    (POWERPC_EXCP_G2)
3405 3416
#define POWERPC_INPUT_G2LE   (PPC_FLAGS_INPUT_6xx)
3406 3417
#define POWERPC_BFDM_G2LE    (bfd_mach_ppc_ec603e)
3407
#define POWERPC_FLAG_G2LE    (POWERPC_FLAG_TGPR)
3418
#define POWERPC_FLAG_G2LE    (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |           \
3419
                              POWERPC_FLAG_BE)
3408 3420

  
3409 3421
static void init_proc_G2LE (CPUPPCState *env)
3410 3422
{
......
3447 3459
//#define POWERPC_EXCP_604     (POWERPC_EXCP_604)
3448 3460
#define POWERPC_INPUT_604    (PPC_FLAGS_INPUT_6xx)
3449 3461
#define POWERPC_BFDM_604     (bfd_mach_ppc_604)
3450
#define POWERPC_FLAG_604     (POWERPC_FLAG_NONE)
3462
#define POWERPC_FLAG_604     (POWERPC_FLAG_SE | POWERPC_FLAG_BE |             \
3463
                              POWERPC_FLAG_PMM)
3451 3464

  
3452 3465
static void init_proc_604 (CPUPPCState *env)
3453 3466
{
......
3477 3490

  
3478 3491
/* PowerPC 740/750 (aka G3)                                                  */
3479 3492
#define POWERPC_INSNS_7x0    (POWERPC_INSNS_WORKS | PPC_EXTERN)
3480
#define POWERPC_MSRM_7x0     (0x000000000007FF77ULL)
3493
#define POWERPC_MSRM_7x0     (0x000000000005FF77ULL)
3481 3494
#define POWERPC_MMU_7x0      (POWERPC_MMU_32B)
3482 3495
//#define POWERPC_EXCP_7x0     (POWERPC_EXCP_7x0)
3483 3496
#define POWERPC_INPUT_7x0    (PPC_FLAGS_INPUT_6xx)
3484 3497
#define POWERPC_BFDM_7x0     (bfd_mach_ppc_750)
3485
#define POWERPC_FLAG_7x0     (POWERPC_FLAG_NONE)
3498
#define POWERPC_FLAG_7x0     (POWERPC_FLAG_SE | POWERPC_FLAG_BE |             \
3499
                              POWERPC_FLAG_PMM)
3486 3500

  
3487 3501
static void init_proc_7x0 (CPUPPCState *env)
3488 3502
{
......
3514 3528

  
3515 3529
/* PowerPC 750FX/GX                                                          */
3516 3530
#define POWERPC_INSNS_750fx  (POWERPC_INSNS_WORKS | PPC_EXTERN)
3517
#define POWERPC_MSRM_750fx   (0x000000000007FF77ULL)
3531
#define POWERPC_MSRM_750fx   (0x000000000005FF77ULL)
3518 3532
#define POWERPC_MMU_750fx    (POWERPC_MMU_32B)
3519 3533
#define POWERPC_EXCP_750fx   (POWERPC_EXCP_7x0)
3520 3534
#define POWERPC_INPUT_750fx  (PPC_FLAGS_INPUT_6xx)
3521 3535
#define POWERPC_BFDM_750fx   (bfd_mach_ppc_750)
3522
#define POWERPC_FLAG_750fx   (POWERPC_FLAG_NONE)
3536
#define POWERPC_FLAG_750fx   (POWERPC_FLAG_SE | POWERPC_FLAG_BE |             \
3537
                              POWERPC_FLAG_PMM)
3523 3538

  
3524 3539
static void init_proc_750fx (CPUPPCState *env)
3525 3540
{
......
3558 3573

  
3559 3574
/* PowerPC 745/755                                                           */
3560 3575
#define POWERPC_INSNS_7x5    (POWERPC_INSNS_WORKS | PPC_EXTERN | PPC_6xx_TLB)
3561
#define POWERPC_MSRM_7x5     (0x000000000007FF77ULL)
3576
#define POWERPC_MSRM_7x5     (0x000000000005FF77ULL)
3562 3577
#define POWERPC_MMU_7x5      (POWERPC_MMU_SOFT_6xx)
3563 3578
//#define POWERPC_EXCP_7x5     (POWERPC_EXCP_7x5)
3564 3579
#define POWERPC_INPUT_7x5    (PPC_FLAGS_INPUT_6xx)
3565 3580
#define POWERPC_BFDM_7x5     (bfd_mach_ppc_750)
3566
#define POWERPC_FLAG_7x5     (POWERPC_FLAG_NONE)
3581
#define POWERPC_FLAG_7x5     (POWERPC_FLAG_SE | POWERPC_FLAG_BE |             \
3582
                              POWERPC_FLAG_PMM)
3567 3583

  
3568 3584
static void init_proc_7x5 (CPUPPCState *env)
3569 3585
{
......
3622 3638
#define POWERPC_EXCP_7400    (POWERPC_EXCP_74xx)
3623 3639
#define POWERPC_INPUT_7400   (PPC_FLAGS_INPUT_6xx)
3624 3640
#define POWERPC_BFDM_7400    (bfd_mach_ppc_7400)
3625
#define POWERPC_FLAG_7400    (POWERPC_FLAG_VRE)
3641
#define POWERPC_FLAG_7400    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3642
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3626 3643

  
3627 3644
static void init_proc_7400 (CPUPPCState *env)
3628 3645
{
......
3652 3669
#define POWERPC_EXCP_7410    (POWERPC_EXCP_74xx)
3653 3670
#define POWERPC_INPUT_7410   (PPC_FLAGS_INPUT_6xx)
3654 3671
#define POWERPC_BFDM_7410    (bfd_mach_ppc_7400)
3655
#define POWERPC_FLAG_7410    (POWERPC_FLAG_VRE)
3672
#define POWERPC_FLAG_7410    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3673
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3656 3674

  
3657 3675
static void init_proc_7410 (CPUPPCState *env)
3658 3676
{
......
3694 3712
#define POWERPC_EXCP_7440    (POWERPC_EXCP_74xx)
3695 3713
#define POWERPC_INPUT_7440   (PPC_FLAGS_INPUT_6xx)
3696 3714
#define POWERPC_BFDM_7440    (bfd_mach_ppc_7400)
3697
#define POWERPC_FLAG_7440    (POWERPC_FLAG_VRE)
3715
#define POWERPC_FLAG_7440    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3716
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3698 3717

  
3699 3718
__attribute__ (( unused ))
3700 3719
static void init_proc_7440 (CPUPPCState *env)
......
3763 3782
#define POWERPC_EXCP_7450    (POWERPC_EXCP_74xx)
3764 3783
#define POWERPC_INPUT_7450   (PPC_FLAGS_INPUT_6xx)
3765 3784
#define POWERPC_BFDM_7450    (bfd_mach_ppc_7400)
3766
#define POWERPC_FLAG_7450    (POWERPC_FLAG_VRE)
3785
#define POWERPC_FLAG_7450    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3786
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3767 3787

  
3768 3788
__attribute__ (( unused ))
3769 3789
static void init_proc_7450 (CPUPPCState *env)
......
3834 3854
#define POWERPC_EXCP_7445    (POWERPC_EXCP_74xx)
3835 3855
#define POWERPC_INPUT_7445   (PPC_FLAGS_INPUT_6xx)
3836 3856
#define POWERPC_BFDM_7445    (bfd_mach_ppc_7400)
3837
#define POWERPC_FLAG_7445    (POWERPC_FLAG_VRE)
3857
#define POWERPC_FLAG_7445    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3858
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3838 3859

  
3839 3860
__attribute__ (( unused ))
3840 3861
static void init_proc_7445 (CPUPPCState *env)
......
3937 3958
#define POWERPC_EXCP_7455    (POWERPC_EXCP_74xx)
3938 3959
#define POWERPC_INPUT_7455   (PPC_FLAGS_INPUT_6xx)
3939 3960
#define POWERPC_BFDM_7455    (bfd_mach_ppc_7400)
3940
#define POWERPC_FLAG_7455    (POWERPC_FLAG_VRE)
3961
#define POWERPC_FLAG_7455    (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
3962
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
3941 3963

  
3942 3964
__attribute__ (( unused ))
3943 3965
static void init_proc_7455 (CPUPPCState *env)
......
4047 4069
//#define POWERPC_EXCP_970     (POWERPC_EXCP_970)
4048 4070
#define POWERPC_INPUT_970    (PPC_FLAGS_INPUT_970)
4049 4071
#define POWERPC_BFDM_970     (bfd_mach_ppc64)
4050
#define POWERPC_FLAG_970     (POWERPC_FLAG_VRE)
4072
#define POWERPC_FLAG_970     (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
4073
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
4051 4074

  
4052 4075
#if defined(CONFIG_USER_ONLY)
4053 4076
#define POWERPC970_HID5_INIT 0x00000080
......
4121 4144
#define POWERPC_EXCP_970FX   (POWERPC_EXCP_970)
4122 4145
#define POWERPC_INPUT_970FX  (PPC_FLAGS_INPUT_970)
4123 4146
#define POWERPC_BFDM_970FX   (bfd_mach_ppc64)
4124
#define POWERPC_FLAG_970FX   (POWERPC_FLAG_VRE)
4147
#define POWERPC_FLAG_970FX   (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
4148
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
4125 4149

  
4126 4150
static void init_proc_970FX (CPUPPCState *env)
4127 4151
{
......
4189 4213
#define POWERPC_EXCP_970GX   (POWERPC_EXCP_970)
4190 4214
#define POWERPC_INPUT_970GX  (PPC_FLAGS_INPUT_970)
4191 4215
#define POWERPC_BFDM_970GX   (bfd_mach_ppc64)
4192
#define POWERPC_FLAG_970GX   (POWERPC_FLAG_VRE)
4216
#define POWERPC_FLAG_970GX   (POWERPC_FLAG_VRE | POWERPC_FLAG_SE |            \
4217
                              POWERPC_FLAG_BE | POWERPC_FLAG_PMM)
4193 4218

  
4194 4219
static void init_proc_970GX (CPUPPCState *env)
4195 4220
{
......
4256 4281
#define POWERPC_EXCP_620     (POWERPC_EXCP_970)
4257 4282
#define POWERPC_INPUT_620    (PPC_FLAGS_INPUT_970)
4258 4283
#define POWERPC_BFDM_620     (bfd_mach_ppc64)
4259
#define POWERPC_FLAG_620     (POWERPC_FLAG_NONE)
4284
#define POWERPC_FLAG_620     (POWERPC_FLAG_SE | POWERPC_FLAG_BE)
4260 4285

  
4261 4286
__attribute__ (( unused ))
4262 4287
static void init_proc_620 (CPUPPCState *env)
......
5799 5824
                 def->pvr);
5800 5825
    /* PowerPC implementation specific initialisations (SPRs, timers, ...) */
5801 5826
    (*def->init_proc)(env);
5827
    /* MSR bits & flags consistency checks */
5828
    if (env->msr_mask & (1 << 25)) {
5829
        switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
5830
        case POWERPC_FLAG_SPE:
5831
        case POWERPC_FLAG_VRE:
5832
            break;
5833
        default:
5834
            fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5835
                    "Should define POWERPC_FLAG_SPE or POWERPC_FLAG_VRE\n");
5836
            exit(1);
5837
        }
5838
    } else if (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
5839
        fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5840
                "Should not define POWERPC_FLAG_SPE nor POWERPC_FLAG_VRE\n");
5841
        exit(1);
5842
    }
5843
    if (env->msr_mask & (1 << 17)) {
5844
        switch (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
5845
        case POWERPC_FLAG_TGPR:
5846
        case POWERPC_FLAG_CE:
5847
            break;
5848
        default:
5849
            fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5850
                    "Should define POWERPC_FLAG_TGPR or POWERPC_FLAG_CE\n");
5851
            exit(1);
5852
        }
5853
    } else if (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
5854
        fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5855
                "Should not define POWERPC_FLAG_TGPR nor POWERPC_FLAG_CE\n");
5856
        exit(1);
5857
    }
5858
    if (env->msr_mask & (1 << 10)) {
5859
        switch (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
5860
                              POWERPC_FLAG_UBLE)) {
5861
        case POWERPC_FLAG_SE:
5862
        case POWERPC_FLAG_DWE:
5863
        case POWERPC_FLAG_UBLE:
5864
            break;
5865
        default:
5866
            fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5867
                    "Should define POWERPC_FLAG_SE or POWERPC_FLAG_DWE or "
5868
                    "POWERPC_FLAG_UBLE\n");
5869
            exit(1);
5870
        }
5871
    } else if (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
5872
                             POWERPC_FLAG_UBLE)) {
5873
        fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5874
                "Should not define POWERPC_FLAG_SE nor POWERPC_FLAG_DWE nor "
5875
                "POWERPC_FLAG_UBLE\n");
5876
            exit(1);
5877
    }
5878
    if (env->msr_mask & (1 << 9)) {
5879
        switch (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
5880
        case POWERPC_FLAG_BE:
5881
        case POWERPC_FLAG_DE:
5882
            break;
5883
        default:
5884
            fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5885
                    "Should define POWERPC_FLAG_BE or POWERPC_FLAG_DE\n");
5886
            exit(1);
5887
        }
5888
    } else if (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
5889
        fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5890
                "Should not define POWERPC_FLAG_BE nor POWERPC_FLAG_DE\n");
5891
        exit(1);
5892
    }
5893
    if (env->msr_mask & (1 << 2)) {
5894
        switch (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
5895
        case POWERPC_FLAG_PX:
5896
        case POWERPC_FLAG_PMM:
5897
            break;
5898
        default:
5899
            fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5900
                    "Should define POWERPC_FLAG_PX or POWERPC_FLAG_PMM\n");
5901
            exit(1);
5902
        }
5903
    } else if (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
5904
        fprintf(stderr, "PowerPC MSR definition inconsistency\n"
5905
                "Should not define POWERPC_FLAG_PX nor POWERPC_FLAG_PMM\n");
5906
        exit(1);
5907
    }
5802 5908
    /* Allocate TLBs buffer when needed */
5803 5909
#if !defined(CONFIG_USER_ONLY)
5804 5910
    if (env->nb_tlb != 0) {
......
6063 6169
}
6064 6170

  
6065 6171
#if defined(PPC_DUMP_CPU)
6066
static int dump_ppc_insns (CPUPPCState *env)
6172
static void dump_ppc_insns (CPUPPCState *env)
6067 6173
{
6068 6174
    opc_handler_t **table, *handler;
6069 6175
    uint8_t opc1, opc2, opc3;
......
6238 6344
        printf("    Exceptions model : %s\n"
6239 6345
               "    Bus model        : %s\n",
6240 6346
               excp_model, bus_model);
6347
        printf("    MSR features     :\n");
6348
        if (env->flags & POWERPC_FLAG_SPE)
6349
            printf("                        signal processing engine enable"
6350
                   "\n");
6351
        else if (env->flags & POWERPC_FLAG_VRE)
6352
            printf("                        vector processor enable\n");
6353
        if (env->flags & POWERPC_FLAG_TGPR)
6354
            printf("                        temporary GPRs\n");
6355
        else if (env->flags & POWERPC_FLAG_CE)
6356
            printf("                        critical input enable\n");
6357
        if (env->flags & POWERPC_FLAG_SE)
6358
            printf("                        single-step trace mode\n");
6359
        else if (env->flags & POWERPC_FLAG_DWE)
6360
            printf("                        debug wait enable\n");
6361
        else if (env->flags & POWERPC_FLAG_UBLE)
6362
            printf("                        user BTB lock enable\n");
6363
        if (env->flags & POWERPC_FLAG_BE)
6364
            printf("                        branch-step trace mode\n");
6365
        else if (env->flags & POWERPC_FLAG_DE)
6366
            printf("                        debug interrupt enable\n");
6367
        if (env->flags & POWERPC_FLAG_PX)
6368
            printf("                        inclusive protection\n");
6369
        else if (env->flags & POWERPC_FLAG_PMM)
6370
            printf("                        performance monitor mark\n");
6371
        if (env->flags == POWERPC_FLAG_NONE)
6372
            printf("                        none\n");
6241 6373
    }
6242 6374
    dump_ppc_insns(env);
6243 6375
    dump_ppc_sprs(env);

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