Revision 2642cdb3

b/target-alpha/cpu.h
158 158 
    IPR_ITB_PTE      = 0x01,            /* 21264 */
159 159 
    IPR_ITB_IAP      = 0x02,
160 160 
    IPR_ITB_IA       = 0x03,            /* 21264 */
161 
    IPR_ITB_IS       = 0x04,
161 
    IPR_ITB_IS       = 0x04,            /* 21264 */
162 162 
    IPR_PMPC         = 0x05,
163 163 
    IPR_EXC_ADDR     = 0x06,            /* 21264 */
164 164 
    IPR_IVA_FORM     = 0x07,            /* 21264 */
......
221 221 
    IPR_M_CTL        = 0x28,            /* 21264 */
222 222 
#define IPR_M_CTL_SPE_SHIFT 1
223 223 
#define IPR_M_CTL_SPE_MASK 7
224 
    IPR_DC_CTL       = 0x29,
224 
    IPR_DC_CTL       = 0x29,            /* 21264 */
225 225 
    IPR_DC_STAT      = 0x2A,            /* 21264 */
226 226 
    /* Cbox IPRs */
227 227 
    IPR_C_DATA       = 0x2B,

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