root / hw / ide / ich.c @ 26d53979
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1 | 7fb6577b | Alexander Graf | /*
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2 | 7fb6577b | Alexander Graf | * QEMU ICH Emulation
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3 | 7fb6577b | Alexander Graf | *
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4 | 7fb6577b | Alexander Graf | * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
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5 | 7fb6577b | Alexander Graf | * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
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6 | 7fb6577b | Alexander Graf | *
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7 | 7fb6577b | Alexander Graf | * This library is free software; you can redistribute it and/or
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8 | 7fb6577b | Alexander Graf | * modify it under the terms of the GNU Lesser General Public
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9 | 7fb6577b | Alexander Graf | * License as published by the Free Software Foundation; either
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10 | 7fb6577b | Alexander Graf | * version 2 of the License, or (at your option) any later version.
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11 | 7fb6577b | Alexander Graf | *
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12 | 7fb6577b | Alexander Graf | * This library is distributed in the hope that it will be useful,
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13 | 7fb6577b | Alexander Graf | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 7fb6577b | Alexander Graf | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 7fb6577b | Alexander Graf | * Lesser General Public License for more details.
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16 | 7fb6577b | Alexander Graf | *
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17 | 7fb6577b | Alexander Graf | * You should have received a copy of the GNU Lesser General Public
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18 | 7fb6577b | Alexander Graf | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 7fb6577b | Alexander Graf | *
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20 | 7fb6577b | Alexander Graf | *
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21 | 7fb6577b | Alexander Graf | * lspci dump of a ICH-9 real device
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22 | 7fb6577b | Alexander Graf | *
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23 | 7fb6577b | Alexander Graf | * 00:1f.2 SATA controller [0106]: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [8086:2922] (rev 02) (prog-if 01 [AHCI 1.0])
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24 | 7fb6577b | Alexander Graf | * Subsystem: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [8086:2922]
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25 | 7fb6577b | Alexander Graf | * Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
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26 | 7fb6577b | Alexander Graf | * Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
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27 | 7fb6577b | Alexander Graf | * Latency: 0
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28 | 7fb6577b | Alexander Graf | * Interrupt: pin B routed to IRQ 222
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29 | 7fb6577b | Alexander Graf | * Region 0: I/O ports at d000 [size=8]
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30 | 7fb6577b | Alexander Graf | * Region 1: I/O ports at cc00 [size=4]
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31 | 7fb6577b | Alexander Graf | * Region 2: I/O ports at c880 [size=8]
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32 | 7fb6577b | Alexander Graf | * Region 3: I/O ports at c800 [size=4]
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33 | 7fb6577b | Alexander Graf | * Region 4: I/O ports at c480 [size=32]
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34 | 7fb6577b | Alexander Graf | * Region 5: Memory at febf9000 (32-bit, non-prefetchable) [size=2K]
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35 | 7fb6577b | Alexander Graf | * Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Count=1/16 Enable+
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36 | 7fb6577b | Alexander Graf | * Address: fee0f00c Data: 41d9
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37 | 7fb6577b | Alexander Graf | * Capabilities: [70] Power Management version 3
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38 | 7fb6577b | Alexander Graf | * Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
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39 | 7fb6577b | Alexander Graf | * Status: D0 PME-Enable- DSel=0 DScale=0 PME-
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40 | 7fb6577b | Alexander Graf | * Capabilities: [a8] SATA HBA <?>
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41 | 7fb6577b | Alexander Graf | * Capabilities: [b0] Vendor Specific Information <?>
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42 | 7fb6577b | Alexander Graf | * Kernel driver in use: ahci
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43 | 7fb6577b | Alexander Graf | * Kernel modules: ahci
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44 | 7fb6577b | Alexander Graf | * 00: 86 80 22 29 07 04 b0 02 02 01 06 01 00 00 00 00
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45 | 7fb6577b | Alexander Graf | * 10: 01 d0 00 00 01 cc 00 00 81 c8 00 00 01 c8 00 00
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46 | 7fb6577b | Alexander Graf | * 20: 81 c4 00 00 00 90 bf fe 00 00 00 00 86 80 22 29
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47 | 7fb6577b | Alexander Graf | * 30: 00 00 00 00 80 00 00 00 00 00 00 00 0f 02 00 00
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48 | 7fb6577b | Alexander Graf | * 40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00
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49 | 7fb6577b | Alexander Graf | * 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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50 | 7fb6577b | Alexander Graf | * 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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51 | 7fb6577b | Alexander Graf | * 70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00
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52 | 7fb6577b | Alexander Graf | * 80: 05 70 09 00 0c f0 e0 fe d9 41 00 00 00 00 00 00
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53 | 7fb6577b | Alexander Graf | * 90: 40 00 0f 82 93 01 00 00 00 00 00 00 00 00 00 00
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54 | 7fb6577b | Alexander Graf | * a0: ac 00 00 00 0a 00 12 00 12 b0 10 00 48 00 00 00
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55 | 7fb6577b | Alexander Graf | * b0: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00
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56 | 7fb6577b | Alexander Graf | * c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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57 | 7fb6577b | Alexander Graf | * d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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58 | 7fb6577b | Alexander Graf | * e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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59 | 7fb6577b | Alexander Graf | * f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00
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60 | 7fb6577b | Alexander Graf | *
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61 | 7fb6577b | Alexander Graf | */
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62 | 7fb6577b | Alexander Graf | |
63 | 03c7a6a8 | Sebastian Herbszt | #include <hw/hw.h> |
64 | 03c7a6a8 | Sebastian Herbszt | #include <hw/msi.h> |
65 | 03c7a6a8 | Sebastian Herbszt | #include <hw/pc.h> |
66 | 03c7a6a8 | Sebastian Herbszt | #include <hw/pci.h> |
67 | 03c7a6a8 | Sebastian Herbszt | #include <hw/isa.h> |
68 | 03c7a6a8 | Sebastian Herbszt | #include "block.h" |
69 | 03c7a6a8 | Sebastian Herbszt | #include "block_int.h" |
70 | 03c7a6a8 | Sebastian Herbszt | #include "dma.h" |
71 | 03c7a6a8 | Sebastian Herbszt | |
72 | 03c7a6a8 | Sebastian Herbszt | #include <hw/ide/pci.h> |
73 | 03c7a6a8 | Sebastian Herbszt | #include <hw/ide/ahci.h> |
74 | 03c7a6a8 | Sebastian Herbszt | |
75 | 7fb6577b | Alexander Graf | static int pci_ich9_ahci_init(PCIDevice *dev) |
76 | 03c7a6a8 | Sebastian Herbszt | { |
77 | 03c7a6a8 | Sebastian Herbszt | struct AHCIPCIState *d;
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78 | 03c7a6a8 | Sebastian Herbszt | d = DO_UPCAST(struct AHCIPCIState, card, dev);
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79 | 03c7a6a8 | Sebastian Herbszt | |
80 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_vendor_id(d->card.config, PCI_VENDOR_ID_INTEL); |
81 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_device_id(d->card.config, PCI_DEVICE_ID_INTEL_82801IR); |
82 | 03c7a6a8 | Sebastian Herbszt | |
83 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA); |
84 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_revision(d->card.config, 0x02);
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85 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1); |
86 | 03c7a6a8 | Sebastian Herbszt | |
87 | 03c7a6a8 | Sebastian Herbszt | d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */ |
88 | 03c7a6a8 | Sebastian Herbszt | d->card.config[PCI_LATENCY_TIMER] = 0x00; /* Latency timer */ |
89 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_interrupt_pin(d->card.config, 1);
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90 | 03c7a6a8 | Sebastian Herbszt | |
91 | 03c7a6a8 | Sebastian Herbszt | /* XXX Software should program this register */
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92 | 03c7a6a8 | Sebastian Herbszt | d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */ |
93 | 03c7a6a8 | Sebastian Herbszt | |
94 | 03c7a6a8 | Sebastian Herbszt | qemu_register_reset(ahci_reset, d); |
95 | 03c7a6a8 | Sebastian Herbszt | |
96 | 03c7a6a8 | Sebastian Herbszt | msi_init(dev, 0x50, 1, true, false); |
97 | 03c7a6a8 | Sebastian Herbszt | |
98 | 2c4b9d0e | Alexander Graf | ahci_init(&d->ahci, &dev->qdev, 6);
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99 | 03c7a6a8 | Sebastian Herbszt | d->ahci.irq = d->card.irq[0];
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100 | 03c7a6a8 | Sebastian Herbszt | |
101 | 96d19bcb | Jan Kiszka | /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
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102 | 96d19bcb | Jan Kiszka | pci_register_bar_simple(&d->card, 5, 0x1000, 0, d->ahci.mem); |
103 | 96d19bcb | Jan Kiszka | |
104 | 03c7a6a8 | Sebastian Herbszt | return 0; |
105 | 03c7a6a8 | Sebastian Herbszt | } |
106 | 03c7a6a8 | Sebastian Herbszt | |
107 | 7fb6577b | Alexander Graf | static int pci_ich9_uninit(PCIDevice *dev) |
108 | 7fb6577b | Alexander Graf | { |
109 | 7fb6577b | Alexander Graf | struct AHCIPCIState *d;
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110 | 7fb6577b | Alexander Graf | d = DO_UPCAST(struct AHCIPCIState, card, dev);
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111 | 7fb6577b | Alexander Graf | |
112 | 45fe15c2 | Jan Kiszka | msi_uninit(dev); |
113 | 7fb6577b | Alexander Graf | qemu_unregister_reset(ahci_reset, d); |
114 | 2c4b9d0e | Alexander Graf | ahci_uninit(&d->ahci); |
115 | 7fb6577b | Alexander Graf | |
116 | 7fb6577b | Alexander Graf | return 0; |
117 | 7fb6577b | Alexander Graf | } |
118 | 7fb6577b | Alexander Graf | |
119 | 7fb6577b | Alexander Graf | static void pci_ich9_write_config(PCIDevice *pci, uint32_t addr, |
120 | 7fb6577b | Alexander Graf | uint32_t val, int len)
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121 | 7fb6577b | Alexander Graf | { |
122 | 7fb6577b | Alexander Graf | pci_default_write_config(pci, addr, val, len); |
123 | 7fb6577b | Alexander Graf | msi_write_config(pci, addr, val, len); |
124 | 7fb6577b | Alexander Graf | } |
125 | 7fb6577b | Alexander Graf | |
126 | 03c7a6a8 | Sebastian Herbszt | static PCIDeviceInfo ich_ahci_info[] = {
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127 | 03c7a6a8 | Sebastian Herbszt | { |
128 | 03c7a6a8 | Sebastian Herbszt | .qdev.name = "ich9-ahci",
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129 | 7fb6577b | Alexander Graf | .qdev.alias = "ahci",
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130 | 03c7a6a8 | Sebastian Herbszt | .qdev.size = sizeof(AHCIPCIState),
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131 | 7fb6577b | Alexander Graf | .init = pci_ich9_ahci_init, |
132 | 7fb6577b | Alexander Graf | .exit = pci_ich9_uninit, |
133 | 7fb6577b | Alexander Graf | .config_write = pci_ich9_write_config, |
134 | 03c7a6a8 | Sebastian Herbszt | },{ |
135 | 03c7a6a8 | Sebastian Herbszt | /* end of list */
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136 | 03c7a6a8 | Sebastian Herbszt | } |
137 | 03c7a6a8 | Sebastian Herbszt | }; |
138 | 03c7a6a8 | Sebastian Herbszt | |
139 | 03c7a6a8 | Sebastian Herbszt | static void ich_ahci_register(void) |
140 | 03c7a6a8 | Sebastian Herbszt | { |
141 | 03c7a6a8 | Sebastian Herbszt | pci_qdev_register_many(ich_ahci_info); |
142 | 03c7a6a8 | Sebastian Herbszt | } |
143 | 03c7a6a8 | Sebastian Herbszt | device_init(ich_ahci_register); |