Archipelago » qemu

#include "trace.h"

#define EHCI_DEBUG   0

#define DPRINTF printf

#else

#define DPRINTF(...)

#endif

/* internal processing - reset HC to try and recover */

#define USB_RET_PROCERR   (-99)

    *data = val; \

    } while(0)

{

    } else {

    }

}

static void ehci_trace_usbsts(uint32_t mask, int state)

{

    /* interrupts */

    s->usbsts_pending = 0;

}

/* Attach or detach a device on root hub */

static void ehci_attach(USBPort *port)

/*  This state is the entry point for asynchronous schedule

 *  processing.  Entry here consitutes a EHCI start event state (4.8.5)

 */

{

    EHCIqh *qh = &ehci->qh;

    int i = 0;

    /*  Find the head of the list (4.9.1.1) */

    for(i = 0; i < MAX_QH; i++) {

        get_dwords(NLPTR_GET(entry), (uint32_t *) qh, sizeof(EHCIqh) >> 2);

        if (qh->epchar & QH_EPCHAR_H) {

            if (async) {

                entry |= (NLPTR_TYPE_QH << 1);

            }

            ehci->fetch_addr = entry;

            again = 1;

            goto out;

        }

        entry = qh->next;

        if (entry == ehci->asynclistaddr) {

            break;

        }

    }

    /* no head found for list. */

out:

    return again;

/*  This state is the entry point for periodic schedule processing as

 *  well as being a continuation state for async processing.

 */

{

    int again = 0;

    uint32_t entry = ehci->fetch_addr;

#endif

    if (entry < 0x1000) {

        DPRINTF("fetchentry: entry invalid (0x%08x)\n", entry);

        goto out;

    }

    switch (NLPTR_TYPE_GET(entry)) {

    case NLPTR_TYPE_QH:

        ehci->qhaddr = entry;

        again = 1;

        break;

    case NLPTR_TYPE_ITD:

        ehci->itdaddr = entry;

        again = 1;

        break;

    return again;

}

{

    EHCIqh *qh = &ehci->qh;

    int reload;

    int again = 0;

    get_dwords(NLPTR_GET(ehci->qhaddr), (uint32_t *) qh, sizeof(EHCIqh) >> 2);

    if (async && (qh->epchar & QH_EPCHAR_H)) {

        } else {

            DPRINTF("FETCHQH:  QH 0x%08x. H-bit set, reclamation status reset"

                       " - done processing\n", ehci->qhaddr);

            goto out;

        }

    }

    reload = get_field(qh->epchar, QH_EPCHAR_RL);

    if (reload) {

        set_field(&qh->altnext_qtd, reload, QH_ALTNEXT_NAKCNT);

    }

    if (qh->token & QTD_TOKEN_HALT) {

        again = 1;

    } else if ((qh->token & QTD_TOKEN_ACTIVE) && (qh->current_qtd > 0x1000)) {

        ehci->qtdaddr = qh->current_qtd;

        again = 1;

    } else {

        /*  EHCI spec version 1.0 Section 4.10.2 */

        again = 1;

    }

    return again;

}

{

    EHCIitd itd;

    get_dwords(NLPTR_GET(ehci->itdaddr),(uint32_t *) &itd,

               sizeof(EHCIitd) >> 2);

    if (ehci_process_itd(ehci, &itd) != 0) {

        return -1;

    put_dwords(NLPTR_GET(ehci->itdaddr), (uint32_t *) &itd,

                sizeof(EHCIitd) >> 2);

    ehci->fetch_addr = itd.next;

    return 1;

}

/* Section 4.10.2 - paragraph 3 */

{

#if 0

    /* TO-DO: 4.10.2 - paragraph 2

     * go to horizontal QH

     */

    if (I-bit set) {

        goto out;

    }

#endif

    if (((ehci->qh.token & QTD_TOKEN_TBYTES_MASK) != 0) &&

        (ehci->qh.altnext_qtd > 0x1000) &&

        (NLPTR_TBIT(ehci->qh.altnext_qtd) == 0)) {

        ehci->qtdaddr = ehci->qh.altnext_qtd;

    /*

     *  next qTD is valid

     */

    } else if ((ehci->qh.next_qtd > 0x1000) &&

               (NLPTR_TBIT(ehci->qh.next_qtd) == 0)) {

        ehci->qtdaddr = ehci->qh.next_qtd;

    /*

     *  no valid qTD, try next QH

     */

    } else {

    }

    return 1;

}

/* Section 4.10.2 - paragraph 4 */

{

    EHCIqtd *qtd = &ehci->qtd;

    int again = 0;

    get_dwords(NLPTR_GET(ehci->qtdaddr),(uint32_t *) qtd, sizeof(EHCIqtd) >> 2);

    if (qtd->token & QTD_TOKEN_ACTIVE) {

        again = 1;

    } else {

        again = 1;

    }

    return again;

}

{

    int again = 0;

    if (ehci->fetch_addr != ehci->qh.next) {

        ehci->fetch_addr = ehci->qh.next;

        again = 1;

    } else {

    }

    return again;

}

{

    EHCIqh *qh = &ehci->qh;

    EHCIqtd *qtd = &ehci->qtd;

    int reload, nakcnt;

    int smask;

    if (ehci_qh_do_overlay(ehci, qh, qtd) != 0) {

        return -1;

    }

        reload = get_field(qh->epchar, QH_EPCHAR_RL);

        nakcnt = get_field(qh->altnext_qtd, QH_ALTNEXT_NAKCNT);

        if (reload && !nakcnt) {

            again = 1;

            goto out;

        }

    if (!async) {

        int transactCtr = get_field(qh->epcap, QH_EPCAP_MULT);

        if (!transactCtr) {

            again = 1;

            goto out;

        }

        again = -1;

        goto out;

    }

    if (ehci->exec_status != USB_RET_ASYNC) {

        again = 1;

    return again;

}

{

    EHCIqh *qh = &ehci->qh;

    int again = 0;

            if (nakcnt) {

                nakcnt--;

            }

        } else {

            nakcnt = reload;

        }

        set_field(&qh->altnext_qtd, nakcnt, QH_ALTNEXT_NAKCNT);

    }

     *  in the EHCI spec but we need to do it since we don't share

     *  physical memory with our guest VM.

     */

    put_dwords(NLPTR_GET(ehci->qhaddr), (uint32_t *) qh, sizeof(EHCIqh) >> 2);

    /* 4.10.5 */

    if ((ehci->exec_status == USB_RET_NAK) || (qh->token & QTD_TOKEN_ACTIVE)) {

    } else {

    }

    again = 1;

}

{

    EHCIqh *qh = &ehci->qh;

    int again = 0;

    /*  Write back the QTD from the QH area */

    put_dwords(NLPTR_GET(ehci->qtdaddr),(uint32_t *) &qh->next_qtd,

                sizeof(EHCIqtd) >> 2);

     * but stop after one qtd if periodic

     */

    //if (async) {

        again = 1;

    //} else {

    //}

    return again;

}

 * This is the state machine that is common to both async and periodic

 */

{

    int again;

    int iter = 0;

    do {

            iter++;

            /* if we are roaming a lot of QH without executing a qTD

             * something is wrong with the linked list. TO-DO: why is

             */

            if (iter > MAX_ITERATIONS) {

                DPRINTF("\n*** advance_state: bailing on MAX ITERATIONS***\n");

                break;

            }

        }

        case EST_WAITLISTHEAD:

            break;

        case EST_FETCHENTRY:

            break;

        case EST_FETCHQH:

            break;

        case EST_FETCHITD:

            break;

        case EST_ADVANCEQUEUE:

            break;

        case EST_FETCHQTD:

            break;

        case EST_HORIZONTALQH:

            break;

        case EST_EXECUTE:

            iter = 0;

            break;

        case EST_EXECUTING:

            break;

        case EST_WRITEBACK:

            break;

        default:

    while (again);

    ehci_commit_interrupt(ehci);

}

static void ehci_advance_async_state(EHCIState *ehci)

{

    EHCIqh qh;

    case EST_INACTIVE:

        if (!(ehci->usbcmd & USBCMD_ASE)) {

            break;

        }

        ehci_set_usbsts(ehci, USBSTS_ASS);

        // No break, fall through to ACTIVE

    case EST_ACTIVE:

        if ( !(ehci->usbcmd & USBCMD_ASE)) {

            ehci_clear_usbsts(ehci, USBSTS_ASS);

            break;

        }

            break;

        }

        /* check that address register has been set */

        if (ehci->asynclistaddr == 0) {

            break;

        }

        /* fall through */

    case EST_FETCHENTRY:

    case EST_EXECUTING:

        get_dwords(NLPTR_GET(ehci->qhaddr), (uint32_t *) &qh,

                   sizeof(EHCIqh) >> 2);

        break;

    default:

        /* this should only be due to a developer mistake */

        fprintf(stderr, "ehci: Bad asynchronous state %d. "

                "Resetting to active\n", ehci->astate);

    }

}

{

    uint32_t entry;

    uint32_t list;

    // 4.6

    case EST_INACTIVE:

        if ( !(ehci->frindex & 7) && (ehci->usbcmd & USBCMD_PSE)) {

            ehci_set_usbsts(ehci, USBSTS_PSS);

            // No break, fall through to ACTIVE

        } else

            break;

    case EST_ACTIVE:

        if ( !(ehci->frindex & 7) && !(ehci->usbcmd & USBCMD_PSE)) {

            ehci_clear_usbsts(ehci, USBSTS_PSS);

            break;

        }

        DPRINTF("PERIODIC state adv fr=%d.  [%08X] -> %08X\n",

                ehci->frindex / 8, list, entry);

        ehci->fetch_addr = entry;

        break;

    case EST_EXECUTING:

        DPRINTF("PERIODIC state adv for executing\n");

        break;

    default:

        /* this should only be due to a developer mistake */

        fprintf(stderr, "ehci: Bad periodic state %d. "

                "Resetting to active\n", ehci->pstate);

    }

}

        } else {

            // TODO could this cause periodic frames to get skipped if async

            // active?

                ehci_advance_periodic_state(ehci);

            }

        }

    /*  Async is not inside loop since it executes everything it can once

     *  called

     */

        ehci_advance_async_state(ehci);

    }

disable usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"

disable usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val, uint32_t oldval) "wr mmio %04x [%s] = %x (old: %x)"

disable usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"

# hw/usb-desc.c

disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"