Revision 273a2142 hw/eepro100.c
| b/hw/eepro100.c | ||
|---|---|---|
| 181 | 181 |
} ru_state_t; |
| 182 | 182 |
|
| 183 | 183 |
typedef struct {
|
| 184 |
PCIDevice dev; |
|
| 184 | 185 |
#if 1 |
| 185 | 186 |
uint8_t cmd; |
| 186 | 187 |
uint32_t start; |
| ... | ... | |
| 200 | 201 |
uint8_t curpag; |
| 201 | 202 |
uint8_t mult[8]; /* multicast mask array */ |
| 202 | 203 |
int mmio_index; |
| 203 |
PCIDevice *pci_dev; |
|
| 204 | 204 |
VLANClientState *vc; |
| 205 | 205 |
#endif |
| 206 | 206 |
uint8_t scb_stat; /* SCB stat/ack byte */ |
| ... | ... | |
| 304 | 304 |
{
|
| 305 | 305 |
if (s->int_stat) {
|
| 306 | 306 |
logout("interrupt disabled\n");
|
| 307 |
qemu_irq_lower(s->pci_dev->irq[0]);
|
|
| 307 |
qemu_irq_lower(s->dev.irq[0]);
|
|
| 308 | 308 |
s->int_stat = 0; |
| 309 | 309 |
} |
| 310 | 310 |
} |
| ... | ... | |
| 313 | 313 |
{
|
| 314 | 314 |
if (!s->int_stat) {
|
| 315 | 315 |
logout("interrupt enabled\n");
|
| 316 |
qemu_irq_raise(s->pci_dev->irq[0]);
|
|
| 316 |
qemu_irq_raise(s->dev.irq[0]);
|
|
| 317 | 317 |
s->int_stat = 1; |
| 318 | 318 |
} |
| 319 | 319 |
} |
| ... | ... | |
| 392 | 392 |
static void pci_reset(EEPRO100State * s) |
| 393 | 393 |
{
|
| 394 | 394 |
uint32_t device = s->device; |
| 395 |
uint8_t *pci_conf = s->pci_dev->config;
|
|
| 395 |
uint8_t *pci_conf = s->dev.config;
|
|
| 396 | 396 |
|
| 397 | 397 |
logout("%p\n", s);
|
| 398 | 398 |
|
| ... | ... | |
| 1342 | 1342 |
/***********************************************************/ |
| 1343 | 1343 |
/* PCI EEPRO100 definitions */ |
| 1344 | 1344 |
|
| 1345 |
typedef struct PCIEEPRO100State {
|
|
| 1346 |
PCIDevice dev; |
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| 1347 |
EEPRO100State eepro100; |
|
| 1348 |
} PCIEEPRO100State; |
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| 1349 |
|
|
| 1350 | 1345 |
static void pci_map(PCIDevice * pci_dev, int region_num, |
| 1351 | 1346 |
uint32_t addr, uint32_t size, int type) |
| 1352 | 1347 |
{
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| 1353 |
PCIEEPRO100State *d = DO_UPCAST(PCIEEPRO100State, dev, pci_dev); |
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| 1354 |
EEPRO100State *s = &d->eepro100; |
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| 1348 |
EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); |
|
| 1355 | 1349 |
|
| 1356 | 1350 |
logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n",
|
| 1357 | 1351 |
region_num, addr, size, type); |
| ... | ... | |
| 1424 | 1418 |
static void pci_mmio_map(PCIDevice * pci_dev, int region_num, |
| 1425 | 1419 |
uint32_t addr, uint32_t size, int type) |
| 1426 | 1420 |
{
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| 1427 |
PCIEEPRO100State *d = DO_UPCAST(PCIEEPRO100State, dev, pci_dev);
|
|
| 1421 |
EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev);
|
|
| 1428 | 1422 |
|
| 1429 | 1423 |
logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n",
|
| 1430 | 1424 |
region_num, addr, size, type); |
| 1431 | 1425 |
|
| 1432 | 1426 |
if (region_num == 0) {
|
| 1433 | 1427 |
/* Map control / status registers. */ |
| 1434 |
cpu_register_physical_memory(addr, size, d->eepro100.mmio_index);
|
|
| 1435 |
d->eepro100.region[region_num] = addr;
|
|
| 1428 |
cpu_register_physical_memory(addr, size, s->mmio_index);
|
|
| 1429 |
s->region[region_num] = addr;
|
|
| 1436 | 1430 |
} |
| 1437 | 1431 |
} |
| 1438 | 1432 |
|
| ... | ... | |
| 1555 | 1549 |
if (version_id > 3) |
| 1556 | 1550 |
return -EINVAL; |
| 1557 | 1551 |
|
| 1558 |
if (s->pci_dev && version_id >= 3) {
|
|
| 1559 |
ret = pci_device_load(s->pci_dev, f);
|
|
| 1552 |
if (version_id >= 3) {
|
|
| 1553 |
ret = pci_device_load(&s->dev, f);
|
|
| 1560 | 1554 |
if (ret < 0) |
| 1561 | 1555 |
return ret; |
| 1562 | 1556 |
} |
| ... | ... | |
| 1641 | 1635 |
EEPRO100State *s = opaque; |
| 1642 | 1636 |
int i; |
| 1643 | 1637 |
|
| 1644 |
if (s->pci_dev) |
|
| 1645 |
pci_device_save(s->pci_dev, f); |
|
| 1638 |
pci_device_save(&s->dev, f); |
|
| 1646 | 1639 |
|
| 1647 | 1640 |
qemu_put_8s(f, &s->rxcr); |
| 1648 | 1641 |
|
| ... | ... | |
| 1724 | 1717 |
|
| 1725 | 1718 |
static int pci_nic_uninit(PCIDevice *dev) |
| 1726 | 1719 |
{
|
| 1727 |
PCIEEPRO100State *d = DO_UPCAST(PCIEEPRO100State, dev, dev); |
|
| 1728 |
EEPRO100State *s = &d->eepro100; |
|
| 1720 |
EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, dev); |
|
| 1729 | 1721 |
|
| 1730 | 1722 |
cpu_unregister_io_memory(s->mmio_index); |
| 1731 | 1723 |
|
| ... | ... | |
| 1734 | 1726 |
|
| 1735 | 1727 |
static int nic_init(PCIDevice *pci_dev, uint32_t device) |
| 1736 | 1728 |
{
|
| 1737 |
PCIEEPRO100State *d = DO_UPCAST(PCIEEPRO100State, dev, pci_dev); |
|
| 1738 |
EEPRO100State *s; |
|
| 1729 |
EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); |
|
| 1739 | 1730 |
|
| 1740 | 1731 |
logout("\n");
|
| 1741 | 1732 |
|
| 1742 |
d->dev.unregister = pci_nic_uninit;
|
|
| 1733 |
s->dev.unregister = pci_nic_uninit;
|
|
| 1743 | 1734 |
|
| 1744 |
s = &d->eepro100; |
|
| 1745 | 1735 |
s->device = device; |
| 1746 |
s->pci_dev = &d->dev; |
|
| 1747 | 1736 |
|
| 1748 | 1737 |
pci_reset(s); |
| 1749 | 1738 |
|
| ... | ... | |
| 1752 | 1741 |
s->eeprom = eeprom93xx_new(EEPROM_SIZE); |
| 1753 | 1742 |
|
| 1754 | 1743 |
/* Handler for memory-mapped I/O */ |
| 1755 |
d->eepro100.mmio_index =
|
|
| 1744 |
s->mmio_index =
|
|
| 1756 | 1745 |
cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s); |
| 1757 | 1746 |
|
| 1758 |
pci_register_bar(&d->dev, 0, PCI_MEM_SIZE,
|
|
| 1747 |
pci_register_bar(&s->dev, 0, PCI_MEM_SIZE,
|
|
| 1759 | 1748 |
PCI_ADDRESS_SPACE_MEM | |
| 1760 | 1749 |
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_mmio_map); |
| 1761 |
pci_register_bar(&d->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO,
|
|
| 1750 |
pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO,
|
|
| 1762 | 1751 |
pci_map); |
| 1763 |
pci_register_bar(&d->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM,
|
|
| 1752 |
pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM,
|
|
| 1764 | 1753 |
pci_mmio_map); |
| 1765 | 1754 |
|
| 1766 |
qdev_get_macaddr(&d->dev.qdev, s->macaddr);
|
|
| 1755 |
qdev_get_macaddr(&s->dev.qdev, s->macaddr);
|
|
| 1767 | 1756 |
logout("macaddr: %s\n", nic_dump(&s->macaddr[0], 6));
|
| 1768 | 1757 |
assert(s->region[1] == 0); |
| 1769 | 1758 |
|
| 1770 | 1759 |
nic_reset(s); |
| 1771 | 1760 |
|
| 1772 |
s->vc = qdev_get_vlan_client(&d->dev.qdev,
|
|
| 1761 |
s->vc = qdev_get_vlan_client(&s->dev.qdev,
|
|
| 1773 | 1762 |
nic_can_receive, nic_receive, NULL, |
| 1774 | 1763 |
nic_cleanup, s); |
| 1775 | 1764 |
|
| ... | ... | |
| 1799 | 1788 |
static PCIDeviceInfo eepro100_info[] = {
|
| 1800 | 1789 |
{
|
| 1801 | 1790 |
.qdev.name = "i82551", |
| 1802 |
.qdev.size = sizeof(PCIEEPRO100State),
|
|
| 1791 |
.qdev.size = sizeof(EEPRO100State), |
|
| 1803 | 1792 |
.init = pci_i82551_init, |
| 1804 | 1793 |
},{
|
| 1805 | 1794 |
.qdev.name = "i82557b", |
| 1806 |
.qdev.size = sizeof(PCIEEPRO100State),
|
|
| 1795 |
.qdev.size = sizeof(EEPRO100State), |
|
| 1807 | 1796 |
.init = pci_i82557b_init, |
| 1808 | 1797 |
},{
|
| 1809 | 1798 |
.qdev.name = "i82559er", |
| 1810 |
.qdev.size = sizeof(PCIEEPRO100State),
|
|
| 1799 |
.qdev.size = sizeof(EEPRO100State), |
|
| 1811 | 1800 |
.init = pci_i82559er_init, |
| 1812 | 1801 |
},{
|
| 1813 | 1802 |
/* end of list */ |
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