root / tests / cris / check_movmp.s @ 2917dce4
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1 | dd43edf4 | ths | # mach: crisv3 crisv8 crisv10 crisv32 |
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2 | dd43edf4 | ths | # output: ffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n |
3 | dd43edf4 | ths | |
4 | dd43edf4 | ths | # Test generic "move Ps,[]" and "move [],Pd" insns; the ones with |
5 | dd43edf4 | ths | # functionality common to all models. |
6 | dd43edf4 | ths | |
7 | dd43edf4 | ths | .include "testutils.inc" |
8 | dd43edf4 | ths | start |
9 | dd43edf4 | ths | |
10 | dd43edf4 | ths | .data |
11 | dd43edf4 | ths | filler: |
12 | dd43edf4 | ths | .byte 0xaa |
13 | dd43edf4 | ths | .word 0x4433 |
14 | dd43edf4 | ths | .dword 0x55778866 |
15 | dd43edf4 | ths | .byte 0xcc |
16 | dd43edf4 | ths | |
17 | dd43edf4 | ths | .text |
18 | dd43edf4 | ths | ; Test that writing to zero-registers is a nop |
19 | dd43edf4 | ths | .if 0 |
20 | dd43edf4 | ths | ; We used to just ignore the writes, but now an error is emitted. We |
21 | dd43edf4 | ths | ; keep the test-code but disabled, in case we need to change this again. |
22 | dd43edf4 | ths | move 0xaa,p0 |
23 | dd43edf4 | ths | move 0x4433,p4 |
24 | dd43edf4 | ths | move 0x55774433,p8 |
25 | dd43edf4 | ths | .endif |
26 | dd43edf4 | ths | |
27 | dd43edf4 | ths | moveq -1,r3 |
28 | dd43edf4 | ths | setf zcvn |
29 | dd43edf4 | ths | clear.b r3 |
30 | dd43edf4 | ths | test_cc 1 1 1 1 |
31 | dd43edf4 | ths | checkr3 ffffff00 |
32 | dd43edf4 | ths | |
33 | dd43edf4 | ths | moveq -1,r3 |
34 | dd43edf4 | ths | clearf zcvn |
35 | dd43edf4 | ths | clear.w r3 |
36 | dd43edf4 | ths | test_cc 0 0 0 0 |
37 | dd43edf4 | ths | checkr3 ffff0000 |
38 | dd43edf4 | ths | |
39 | dd43edf4 | ths | moveq -1,r3 |
40 | dd43edf4 | ths | clear.d r3 |
41 | dd43edf4 | ths | checkr3 0 |
42 | dd43edf4 | ths | |
43 | dd43edf4 | ths | ; "Write" using ordinary memory references too. |
44 | dd43edf4 | ths | .if 0 ; See ".if 0" above. |
45 | dd43edf4 | ths | move.d filler,r6 |
46 | dd43edf4 | ths | move [r6],p0 |
47 | dd43edf4 | ths | move [r6],p4 |
48 | dd43edf4 | ths | move [r6],p8 |
49 | dd43edf4 | ths | .endif |
50 | dd43edf4 | ths | |
51 | dd43edf4 | ths | # ffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n |
52 | dd43edf4 | ths | |
53 | dd43edf4 | ths | moveq -1,r3 |
54 | dd43edf4 | ths | clear.b r3 |
55 | dd43edf4 | ths | checkr3 ffffff00 |
56 | dd43edf4 | ths | |
57 | dd43edf4 | ths | moveq -1,r3 |
58 | dd43edf4 | ths | clear.w r3 |
59 | dd43edf4 | ths | checkr3 ffff0000 |
60 | dd43edf4 | ths | |
61 | dd43edf4 | ths | moveq -1,r3 |
62 | dd43edf4 | ths | clear.d r3 |
63 | dd43edf4 | ths | checkr3 0 |
64 | dd43edf4 | ths | |
65 | dd43edf4 | ths | ; And postincremented. |
66 | dd43edf4 | ths | .if 0 ; See ".if 0" above. |
67 | dd43edf4 | ths | move [r6+],p0 |
68 | dd43edf4 | ths | move [r6+],p4 |
69 | dd43edf4 | ths | move [r6+],p8 |
70 | dd43edf4 | ths | .endif |
71 | dd43edf4 | ths | |
72 | dd43edf4 | ths | # ffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n |
73 | dd43edf4 | ths | |
74 | dd43edf4 | ths | moveq -1,r3 |
75 | dd43edf4 | ths | clear.b r3 |
76 | dd43edf4 | ths | checkr3 ffffff00 |
77 | dd43edf4 | ths | |
78 | dd43edf4 | ths | moveq -1,r3 |
79 | dd43edf4 | ths | clear.w r3 |
80 | dd43edf4 | ths | checkr3 ffff0000 |
81 | dd43edf4 | ths | |
82 | dd43edf4 | ths | moveq -1,r3 |
83 | dd43edf4 | ths | clear.d r3 |
84 | dd43edf4 | ths | checkr3 0 |
85 | dd43edf4 | ths | |
86 | dd43edf4 | ths | ; Now see that we can write to the registers too. |
87 | dd43edf4 | ths | # bb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n |
88 | dd43edf4 | ths | ; [PC+] |
89 | dd43edf4 | ths | move.d filler,r9 |
90 | dd43edf4 | ths | move 0xbb113344,srp |
91 | dd43edf4 | ths | move srp,r3 |
92 | dd43edf4 | ths | checkr3 bb113344 |
93 | dd43edf4 | ths | |
94 | dd43edf4 | ths | ; [R+] |
95 | dd43edf4 | ths | move [r9+],srp |
96 | dd43edf4 | ths | move srp,r3 |
97 | dd43edf4 | ths | checkr3 664433aa |
98 | dd43edf4 | ths | |
99 | dd43edf4 | ths | ; [R] |
100 | dd43edf4 | ths | move [r9],srp |
101 | dd43edf4 | ths | move srp,r3 |
102 | dd43edf4 | ths | checkr3 cc557788 |
103 | dd43edf4 | ths | |
104 | dd43edf4 | ths | ; And check writing to memory, clear and srp. |
105 | dd43edf4 | ths | |
106 | dd43edf4 | ths | move.d filler,r9 |
107 | dd43edf4 | ths | move 0xabcde012,srp |
108 | dd43edf4 | ths | setf zcvn |
109 | dd43edf4 | ths | move srp,[r9+] |
110 | dd43edf4 | ths | test_cc 1 1 1 1 |
111 | dd43edf4 | ths | subq 4,r9 |
112 | dd43edf4 | ths | move.d [r9],r3 |
113 | dd43edf4 | ths | checkr3 abcde012 |
114 | dd43edf4 | ths | |
115 | dd43edf4 | ths | clearf zcvn |
116 | dd43edf4 | ths | clear.b [r9] |
117 | dd43edf4 | ths | test_cc 0 0 0 0 |
118 | dd43edf4 | ths | move.d [r9],r3 |
119 | dd43edf4 | ths | checkr3 abcde000 |
120 | dd43edf4 | ths | |
121 | dd43edf4 | ths | addq 2,r9 |
122 | dd43edf4 | ths | clear.w [r9+] |
123 | dd43edf4 | ths | subq 2,r9 |
124 | dd43edf4 | ths | move.d [r9],r3 |
125 | dd43edf4 | ths | checkr3 77880000 |
126 | dd43edf4 | ths | |
127 | dd43edf4 | ths | clear.d [r9] |
128 | dd43edf4 | ths | move.d [r9],r3 |
129 | dd43edf4 | ths | checkr3 0 |
130 | dd43edf4 | ths | |
131 | dd43edf4 | ths | quit |