Statistics
| Branch: | Revision:

root / hw / pc.c @ 298e01b6

History | View | Annotate | Download (29.2 kB)

1
/*
2
 * QEMU PC System Emulator
3
 *
4
 * Copyright (c) 2003-2004 Fabrice Bellard
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7
 * of this software and associated documentation files (the "Software"), to deal
8
 * in the Software without restriction, including without limitation the rights
9
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10
 * copies of the Software, and to permit persons to whom the Software is
11
 * furnished to do so, subject to the following conditions:
12
 *
13
 * The above copyright notice and this permission notice shall be included in
14
 * all copies or substantial portions of the Software.
15
 *
16
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22
 * THE SOFTWARE.
23
 */
24
#include "hw.h"
25
#include "pc.h"
26
#include "fdc.h"
27
#include "pci.h"
28
#include "block.h"
29
#include "sysemu.h"
30
#include "audio/audio.h"
31
#include "net.h"
32
#include "smbus.h"
33
#include "boards.h"
34

    
35
/* output Bochs bios info messages */
36
//#define DEBUG_BIOS
37

    
38
#define BIOS_FILENAME "bios.bin"
39
#define VGABIOS_FILENAME "vgabios.bin"
40
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
41

    
42
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
43
#define ACPI_DATA_SIZE       0x10000
44

    
45
#define MAX_IDE_BUS 2
46

    
47
static fdctrl_t *floppy_controller;
48
static RTCState *rtc_state;
49
static PITState *pit;
50
static IOAPICState *ioapic;
51
static PCIDevice *i440fx_state;
52

    
53
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
54
{
55
}
56

    
57
/* MSDOS compatibility mode FPU exception support */
58
static qemu_irq ferr_irq;
59
/* XXX: add IGNNE support */
60
void cpu_set_ferr(CPUX86State *s)
61
{
62
    qemu_irq_raise(ferr_irq);
63
}
64

    
65
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
66
{
67
    qemu_irq_lower(ferr_irq);
68
}
69

    
70
/* TSC handling */
71
uint64_t cpu_get_tsc(CPUX86State *env)
72
{
73
    /* Note: when using kqemu, it is more logical to return the host TSC
74
       because kqemu does not trap the RDTSC instruction for
75
       performance reasons */
76
#if USE_KQEMU
77
    if (env->kqemu_enabled) {
78
        return cpu_get_real_ticks();
79
    } else
80
#endif
81
    {
82
        return cpu_get_ticks();
83
    }
84
}
85

    
86
/* SMM support */
87
void cpu_smm_update(CPUState *env)
88
{
89
    if (i440fx_state && env == first_cpu)
90
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
91
}
92

    
93

    
94
/* IRQ handling */
95
int cpu_get_pic_interrupt(CPUState *env)
96
{
97
    int intno;
98

    
99
    intno = apic_get_interrupt(env);
100
    if (intno >= 0) {
101
        /* set irq request if a PIC irq is still pending */
102
        /* XXX: improve that */
103
        pic_update_irq(isa_pic);
104
        return intno;
105
    }
106
    /* read the irq from the PIC */
107
    if (!apic_accept_pic_intr(env))
108
        return -1;
109

    
110
    intno = pic_read_irq(isa_pic);
111
    return intno;
112
}
113

    
114
static void pic_irq_request(void *opaque, int irq, int level)
115
{
116
    CPUState *env = opaque;
117
    if (level && apic_accept_pic_intr(env))
118
        cpu_interrupt(env, CPU_INTERRUPT_HARD);
119
}
120

    
121
/* PC cmos mappings */
122

    
123
#define REG_EQUIPMENT_BYTE          0x14
124

    
125
static int cmos_get_fd_drive_type(int fd0)
126
{
127
    int val;
128

    
129
    switch (fd0) {
130
    case 0:
131
        /* 1.44 Mb 3"5 drive */
132
        val = 4;
133
        break;
134
    case 1:
135
        /* 2.88 Mb 3"5 drive */
136
        val = 5;
137
        break;
138
    case 2:
139
        /* 1.2 Mb 5"5 drive */
140
        val = 2;
141
        break;
142
    default:
143
        val = 0;
144
        break;
145
    }
146
    return val;
147
}
148

    
149
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
150
{
151
    RTCState *s = rtc_state;
152
    int cylinders, heads, sectors;
153
    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
154
    rtc_set_memory(s, type_ofs, 47);
155
    rtc_set_memory(s, info_ofs, cylinders);
156
    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
157
    rtc_set_memory(s, info_ofs + 2, heads);
158
    rtc_set_memory(s, info_ofs + 3, 0xff);
159
    rtc_set_memory(s, info_ofs + 4, 0xff);
160
    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
161
    rtc_set_memory(s, info_ofs + 6, cylinders);
162
    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
163
    rtc_set_memory(s, info_ofs + 8, sectors);
164
}
165

    
166
/* convert boot_device letter to something recognizable by the bios */
167
static int boot_device2nibble(char boot_device)
168
{
169
    switch(boot_device) {
170
    case 'a':
171
    case 'b':
172
        return 0x01; /* floppy boot */
173
    case 'c':
174
        return 0x02; /* hard drive boot */
175
    case 'd':
176
        return 0x03; /* CD-ROM boot */
177
    case 'n':
178
        return 0x04; /* Network boot */
179
    }
180
    return 0;
181
}
182

    
183
/* hd_table must contain 4 block drivers */
184
static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table)
185
{
186
    RTCState *s = rtc_state;
187
    int nbds, bds[3] = { 0, };
188
    int val;
189
    int fd0, fd1, nb;
190
    int i;
191

    
192
    /* various important CMOS locations needed by PC/Bochs bios */
193

    
194
    /* memory size */
195
    val = 640; /* base memory in K */
196
    rtc_set_memory(s, 0x15, val);
197
    rtc_set_memory(s, 0x16, val >> 8);
198

    
199
    val = (ram_size / 1024) - 1024;
200
    if (val > 65535)
201
        val = 65535;
202
    rtc_set_memory(s, 0x17, val);
203
    rtc_set_memory(s, 0x18, val >> 8);
204
    rtc_set_memory(s, 0x30, val);
205
    rtc_set_memory(s, 0x31, val >> 8);
206

    
207
    if (ram_size > (16 * 1024 * 1024))
208
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
209
    else
210
        val = 0;
211
    if (val > 65535)
212
        val = 65535;
213
    rtc_set_memory(s, 0x34, val);
214
    rtc_set_memory(s, 0x35, val >> 8);
215

    
216
    /* set the number of CPU */
217
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
218

    
219
    /* set boot devices, and disable floppy signature check if requested */
220
#define PC_MAX_BOOT_DEVICES 3
221
    nbds = strlen(boot_device);
222
    if (nbds > PC_MAX_BOOT_DEVICES) {
223
        fprintf(stderr, "Too many boot devices for PC\n");
224
        exit(1);
225
    }
226
    for (i = 0; i < nbds; i++) {
227
        bds[i] = boot_device2nibble(boot_device[i]);
228
        if (bds[i] == 0) {
229
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
230
                    boot_device[i]);
231
            exit(1);
232
        }
233
    }
234
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
235
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
236

    
237
    /* floppy type */
238

    
239
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
240
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
241

    
242
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
243
    rtc_set_memory(s, 0x10, val);
244

    
245
    val = 0;
246
    nb = 0;
247
    if (fd0 < 3)
248
        nb++;
249
    if (fd1 < 3)
250
        nb++;
251
    switch (nb) {
252
    case 0:
253
        break;
254
    case 1:
255
        val |= 0x01; /* 1 drive, ready for boot */
256
        break;
257
    case 2:
258
        val |= 0x41; /* 2 drives, ready for boot */
259
        break;
260
    }
261
    val |= 0x02; /* FPU is there */
262
    val |= 0x04; /* PS/2 mouse installed */
263
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
264

    
265
    /* hard drives */
266

    
267
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
268
    if (hd_table[0])
269
        cmos_init_hd(0x19, 0x1b, hd_table[0]);
270
    if (hd_table[1])
271
        cmos_init_hd(0x1a, 0x24, hd_table[1]);
272

    
273
    val = 0;
274
    for (i = 0; i < 4; i++) {
275
        if (hd_table[i]) {
276
            int cylinders, heads, sectors, translation;
277
            /* NOTE: bdrv_get_geometry_hint() returns the physical
278
                geometry.  It is always such that: 1 <= sects <= 63, 1
279
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
280
                geometry can be different if a translation is done. */
281
            translation = bdrv_get_translation_hint(hd_table[i]);
282
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
283
                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
284
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
285
                    /* No translation. */
286
                    translation = 0;
287
                } else {
288
                    /* LBA translation. */
289
                    translation = 1;
290
                }
291
            } else {
292
                translation--;
293
            }
294
            val |= translation << (i * 2);
295
        }
296
    }
297
    rtc_set_memory(s, 0x39, val);
298
}
299

    
300
void ioport_set_a20(int enable)
301
{
302
    /* XXX: send to all CPUs ? */
303
    cpu_x86_set_a20(first_cpu, enable);
304
}
305

    
306
int ioport_get_a20(void)
307
{
308
    return ((first_cpu->a20_mask >> 20) & 1);
309
}
310

    
311
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
312
{
313
    ioport_set_a20((val >> 1) & 1);
314
    /* XXX: bit 0 is fast reset */
315
}
316

    
317
static uint32_t ioport92_read(void *opaque, uint32_t addr)
318
{
319
    return ioport_get_a20() << 1;
320
}
321

    
322
/***********************************************************/
323
/* Bochs BIOS debug ports */
324

    
325
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
326
{
327
    static const char shutdown_str[8] = "Shutdown";
328
    static int shutdown_index = 0;
329

    
330
    switch(addr) {
331
        /* Bochs BIOS messages */
332
    case 0x400:
333
    case 0x401:
334
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
335
        exit(1);
336
    case 0x402:
337
    case 0x403:
338
#ifdef DEBUG_BIOS
339
        fprintf(stderr, "%c", val);
340
#endif
341
        break;
342
    case 0x8900:
343
        /* same as Bochs power off */
344
        if (val == shutdown_str[shutdown_index]) {
345
            shutdown_index++;
346
            if (shutdown_index == 8) {
347
                shutdown_index = 0;
348
                qemu_system_shutdown_request();
349
            }
350
        } else {
351
            shutdown_index = 0;
352
        }
353
        break;
354

    
355
        /* LGPL'ed VGA BIOS messages */
356
    case 0x501:
357
    case 0x502:
358
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
359
        exit(1);
360
    case 0x500:
361
    case 0x503:
362
#ifdef DEBUG_BIOS
363
        fprintf(stderr, "%c", val);
364
#endif
365
        break;
366
    }
367
}
368

    
369
static void bochs_bios_init(void)
370
{
371
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
372
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
373
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
374
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
375
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
376

    
377
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
378
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
379
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
380
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
381
}
382

    
383
/* Generate an initial boot sector which sets state and jump to
384
   a specified vector */
385
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
386
{
387
    uint8_t bootsect[512], *p;
388
    int i;
389
    int hda;
390

    
391
    hda = drive_get_index(IF_IDE, 0, 0);
392
    if (hda == -1) {
393
        fprintf(stderr, "A disk image must be given for 'hda' when booting "
394
                "a Linux kernel\n");
395
        exit(1);
396
    }
397

    
398
    memset(bootsect, 0, sizeof(bootsect));
399

    
400
    /* Copy the MSDOS partition table if possible */
401
    bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
402

    
403
    /* Make sure we have a partition signature */
404
    bootsect[510] = 0x55;
405
    bootsect[511] = 0xaa;
406

    
407
    /* Actual code */
408
    p = bootsect;
409
    *p++ = 0xfa;                /* CLI */
410
    *p++ = 0xfc;                /* CLD */
411

    
412
    for (i = 0; i < 6; i++) {
413
        if (i == 1)                /* Skip CS */
414
            continue;
415

    
416
        *p++ = 0xb8;                /* MOV AX,imm16 */
417
        *p++ = segs[i];
418
        *p++ = segs[i] >> 8;
419
        *p++ = 0x8e;                /* MOV <seg>,AX */
420
        *p++ = 0xc0 + (i << 3);
421
    }
422

    
423
    for (i = 0; i < 8; i++) {
424
        *p++ = 0x66;                /* 32-bit operand size */
425
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
426
        *p++ = gpr[i];
427
        *p++ = gpr[i] >> 8;
428
        *p++ = gpr[i] >> 16;
429
        *p++ = gpr[i] >> 24;
430
    }
431

    
432
    *p++ = 0xea;                /* JMP FAR */
433
    *p++ = ip;                        /* IP */
434
    *p++ = ip >> 8;
435
    *p++ = segs[1];                /* CS */
436
    *p++ = segs[1] >> 8;
437

    
438
    bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
439
}
440

    
441
static int load_kernel(const char *filename, uint8_t *addr,
442
                       uint8_t *real_addr)
443
{
444
    int fd, size;
445
    int setup_sects;
446

    
447
    fd = open(filename, O_RDONLY | O_BINARY);
448
    if (fd < 0)
449
        return -1;
450

    
451
    /* load 16 bit code */
452
    if (read(fd, real_addr, 512) != 512)
453
        goto fail;
454
    setup_sects = real_addr[0x1F1];
455
    if (!setup_sects)
456
        setup_sects = 4;
457
    if (read(fd, real_addr + 512, setup_sects * 512) !=
458
        setup_sects * 512)
459
        goto fail;
460

    
461
    /* load 32 bit code */
462
    size = read(fd, addr, 16 * 1024 * 1024);
463
    if (size < 0)
464
        goto fail;
465
    close(fd);
466
    return size;
467
 fail:
468
    close(fd);
469
    return -1;
470
}
471

    
472
static long get_file_size(FILE *f)
473
{
474
    long where, size;
475

    
476
    /* XXX: on Unix systems, using fstat() probably makes more sense */
477

    
478
    where = ftell(f);
479
    fseek(f, 0, SEEK_END);
480
    size = ftell(f);
481
    fseek(f, where, SEEK_SET);
482

    
483
    return size;
484
}
485

    
486
static void load_linux(const char *kernel_filename,
487
                       const char *initrd_filename,
488
                       const char *kernel_cmdline)
489
{
490
    uint16_t protocol;
491
    uint32_t gpr[8];
492
    uint16_t seg[6];
493
    uint16_t real_seg;
494
    int setup_size, kernel_size, initrd_size, cmdline_size;
495
    uint32_t initrd_max;
496
    uint8_t header[1024];
497
    uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
498
    FILE *f, *fi;
499

    
500
    /* Align to 16 bytes as a paranoia measure */
501
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
502

    
503
    /* load the kernel header */
504
    f = fopen(kernel_filename, "rb");
505
    if (!f || !(kernel_size = get_file_size(f)) ||
506
        fread(header, 1, 1024, f) != 1024) {
507
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
508
                kernel_filename);
509
        exit(1);
510
    }
511

    
512
    /* kernel protocol version */
513
#if 0
514
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
515
#endif
516
    if (ldl_p(header+0x202) == 0x53726448)
517
        protocol = lduw_p(header+0x206);
518
    else
519
        protocol = 0;
520

    
521
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
522
        /* Low kernel */
523
        real_addr    = phys_ram_base + 0x90000;
524
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
525
        prot_addr    = phys_ram_base + 0x10000;
526
    } else if (protocol < 0x202) {
527
        /* High but ancient kernel */
528
        real_addr    = phys_ram_base + 0x90000;
529
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
530
        prot_addr    = phys_ram_base + 0x100000;
531
    } else {
532
        /* High and recent kernel */
533
        real_addr    = phys_ram_base + 0x10000;
534
        cmdline_addr = phys_ram_base + 0x20000;
535
        prot_addr    = phys_ram_base + 0x100000;
536
    }
537

    
538
#if 0
539
    fprintf(stderr,
540
            "qemu: real_addr     = %#zx\n"
541
            "qemu: cmdline_addr  = %#zx\n"
542
            "qemu: prot_addr     = %#zx\n",
543
            real_addr-phys_ram_base,
544
            cmdline_addr-phys_ram_base,
545
            prot_addr-phys_ram_base);
546
#endif
547

    
548
    /* highest address for loading the initrd */
549
    if (protocol >= 0x203)
550
        initrd_max = ldl_p(header+0x22c);
551
    else
552
        initrd_max = 0x37ffffff;
553

    
554
    if (initrd_max >= ram_size-ACPI_DATA_SIZE)
555
        initrd_max = ram_size-ACPI_DATA_SIZE-1;
556

    
557
    /* kernel command line */
558
    pstrcpy((char*)cmdline_addr, 4096, kernel_cmdline);
559

    
560
    if (protocol >= 0x202) {
561
        stl_p(header+0x228, cmdline_addr-phys_ram_base);
562
    } else {
563
        stw_p(header+0x20, 0xA33F);
564
        stw_p(header+0x22, cmdline_addr-real_addr);
565
    }
566

    
567
    /* loader type */
568
    /* High nybble = B reserved for Qemu; low nybble is revision number.
569
       If this code is substantially changed, you may want to consider
570
       incrementing the revision. */
571
    if (protocol >= 0x200)
572
        header[0x210] = 0xB0;
573

    
574
    /* heap */
575
    if (protocol >= 0x201) {
576
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
577
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
578
    }
579

    
580
    /* load initrd */
581
    if (initrd_filename) {
582
        if (protocol < 0x200) {
583
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
584
            exit(1);
585
        }
586

    
587
        fi = fopen(initrd_filename, "rb");
588
        if (!fi) {
589
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
590
                    initrd_filename);
591
            exit(1);
592
        }
593

    
594
        initrd_size = get_file_size(fi);
595
        initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
596

    
597
        fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
598
                initrd_size, initrd_addr-phys_ram_base);
599

    
600
        if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
601
            fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
602
                    initrd_filename);
603
            exit(1);
604
        }
605
        fclose(fi);
606

    
607
        stl_p(header+0x218, initrd_addr-phys_ram_base);
608
        stl_p(header+0x21c, initrd_size);
609
    }
610

    
611
    /* store the finalized header and load the rest of the kernel */
612
    memcpy(real_addr, header, 1024);
613

    
614
    setup_size = header[0x1f1];
615
    if (setup_size == 0)
616
        setup_size = 4;
617

    
618
    setup_size = (setup_size+1)*512;
619
    kernel_size -= setup_size;        /* Size of protected-mode code */
620

    
621
    if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
622
        fread(prot_addr, 1, kernel_size, f) != kernel_size) {
623
        fprintf(stderr, "qemu: read error on kernel '%s'\n",
624
                kernel_filename);
625
        exit(1);
626
    }
627
    fclose(f);
628

    
629
    /* generate bootsector to set up the initial register state */
630
    real_seg = (real_addr-phys_ram_base) >> 4;
631
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
632
    seg[1] = real_seg+0x20;        /* CS */
633
    memset(gpr, 0, sizeof gpr);
634
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
635

    
636
    generate_bootsect(gpr, seg, 0);
637
}
638

    
639
static void main_cpu_reset(void *opaque)
640
{
641
    CPUState *env = opaque;
642
    cpu_reset(env);
643
}
644

    
645
static const int ide_iobase[2] = { 0x1f0, 0x170 };
646
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
647
static const int ide_irq[2] = { 14, 15 };
648

    
649
#define NE2000_NB_MAX 6
650

    
651
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
652
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
653

    
654
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
655
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
656

    
657
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
658
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
659

    
660
#ifdef HAS_AUDIO
661
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
662
{
663
    struct soundhw *c;
664
    int audio_enabled = 0;
665

    
666
    for (c = soundhw; !audio_enabled && c->name; ++c) {
667
        audio_enabled = c->enabled;
668
    }
669

    
670
    if (audio_enabled) {
671
        AudioState *s;
672

    
673
        s = AUD_init ();
674
        if (s) {
675
            for (c = soundhw; c->name; ++c) {
676
                if (c->enabled) {
677
                    if (c->isa) {
678
                        c->init.init_isa (s, pic);
679
                    }
680
                    else {
681
                        if (pci_bus) {
682
                            c->init.init_pci (pci_bus, s);
683
                        }
684
                    }
685
                }
686
            }
687
        }
688
    }
689
}
690
#endif
691

    
692
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
693
{
694
    static int nb_ne2k = 0;
695

    
696
    if (nb_ne2k == NE2000_NB_MAX)
697
        return;
698
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
699
    nb_ne2k++;
700
}
701

    
702
/* PC hardware initialisation */
703
static void pc_init1(int ram_size, int vga_ram_size,
704
                     const char *boot_device, DisplayState *ds,
705
                     const char *kernel_filename, const char *kernel_cmdline,
706
                     const char *initrd_filename,
707
                     int pci_enabled, const char *cpu_model)
708
{
709
    char buf[1024];
710
    int ret, linux_boot, i;
711
    ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
712
    int bios_size, isa_bios_size, vga_bios_size;
713
    PCIBus *pci_bus;
714
    int piix3_devfn = -1;
715
    CPUState *env;
716
    NICInfo *nd;
717
    qemu_irq *cpu_irq;
718
    qemu_irq *i8259;
719
    int index;
720
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
721
    BlockDriverState *fd[MAX_FD];
722

    
723
    linux_boot = (kernel_filename != NULL);
724

    
725
    /* init CPUs */
726
    if (cpu_model == NULL) {
727
#ifdef TARGET_X86_64
728
        cpu_model = "qemu64";
729
#else
730
        cpu_model = "qemu32";
731
#endif
732
    }
733
    
734
    for(i = 0; i < smp_cpus; i++) {
735
        env = cpu_init(cpu_model);
736
        if (!env) {
737
            fprintf(stderr, "Unable to find x86 CPU definition\n");
738
            exit(1);
739
        }
740
        if (i != 0)
741
            env->hflags |= HF_HALTED_MASK;
742
        if (smp_cpus > 1) {
743
            /* XXX: enable it in all cases */
744
            env->cpuid_features |= CPUID_APIC;
745
        }
746
        register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
747
        qemu_register_reset(main_cpu_reset, env);
748
        if (pci_enabled) {
749
            apic_init(env);
750
        }
751
        vmport_init(env);
752
    }
753

    
754
    /* allocate RAM */
755
    ram_addr = qemu_ram_alloc(ram_size);
756
    cpu_register_physical_memory(0, ram_size, ram_addr);
757

    
758
    /* allocate VGA RAM */
759
    vga_ram_addr = qemu_ram_alloc(vga_ram_size);
760

    
761
    /* BIOS load */
762
    if (bios_name == NULL)
763
        bios_name = BIOS_FILENAME;
764
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
765
    bios_size = get_image_size(buf);
766
    if (bios_size <= 0 ||
767
        (bios_size % 65536) != 0) {
768
        goto bios_error;
769
    }
770
    bios_offset = qemu_ram_alloc(bios_size);
771
    ret = load_image(buf, phys_ram_base + bios_offset);
772
    if (ret != bios_size) {
773
    bios_error:
774
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
775
        exit(1);
776
    }
777

    
778
    /* VGA BIOS load */
779
    if (cirrus_vga_enabled) {
780
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
781
    } else {
782
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
783
    }
784
    vga_bios_size = get_image_size(buf);
785
    if (vga_bios_size <= 0 || vga_bios_size > 65536)
786
        goto vga_bios_error;
787
    vga_bios_offset = qemu_ram_alloc(65536);
788

    
789
    ret = load_image(buf, phys_ram_base + vga_bios_offset);
790
    if (ret != vga_bios_size) {
791
    vga_bios_error:
792
        fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
793
        exit(1);
794
    }
795

    
796
    /* setup basic memory access */
797
    cpu_register_physical_memory(0xc0000, 0x10000,
798
                                 vga_bios_offset | IO_MEM_ROM);
799

    
800
    /* map the last 128KB of the BIOS in ISA space */
801
    isa_bios_size = bios_size;
802
    if (isa_bios_size > (128 * 1024))
803
        isa_bios_size = 128 * 1024;
804
    cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
805
                                 IO_MEM_UNASSIGNED);
806
    cpu_register_physical_memory(0x100000 - isa_bios_size,
807
                                 isa_bios_size,
808
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
809

    
810
    {
811
        ram_addr_t option_rom_offset;
812
        int size, offset;
813

    
814
        offset = 0;
815
        for (i = 0; i < nb_option_roms; i++) {
816
            size = get_image_size(option_rom[i]);
817
            if (size < 0) {
818
                fprintf(stderr, "Could not load option rom '%s'\n",
819
                        option_rom[i]);
820
                exit(1);
821
            }
822
            if (size > (0x10000 - offset))
823
                goto option_rom_error;
824
            option_rom_offset = qemu_ram_alloc(size);
825
            ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
826
            if (ret != size) {
827
            option_rom_error:
828
                fprintf(stderr, "Too many option ROMS\n");
829
                exit(1);
830
            }
831
            size = (size + 4095) & ~4095;
832
            cpu_register_physical_memory(0xd0000 + offset,
833
                                         size, option_rom_offset | IO_MEM_ROM);
834
            offset += size;
835
        }
836
    }
837

    
838
    /* map all the bios at the top of memory */
839
    cpu_register_physical_memory((uint32_t)(-bios_size),
840
                                 bios_size, bios_offset | IO_MEM_ROM);
841

    
842
    bochs_bios_init();
843

    
844
    if (linux_boot)
845
        load_linux(kernel_filename, initrd_filename, kernel_cmdline);
846

    
847
    cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
848
    i8259 = i8259_init(cpu_irq[0]);
849
    ferr_irq = i8259[13];
850

    
851
    if (pci_enabled) {
852
        pci_bus = i440fx_init(&i440fx_state, i8259);
853
        piix3_devfn = piix3_init(pci_bus, -1);
854
    } else {
855
        pci_bus = NULL;
856
    }
857

    
858
    /* init basic PC hardware */
859
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
860

    
861
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
862

    
863
    if (cirrus_vga_enabled) {
864
        if (pci_enabled) {
865
            pci_cirrus_vga_init(pci_bus,
866
                                ds, phys_ram_base + vga_ram_addr,
867
                                vga_ram_addr, vga_ram_size);
868
        } else {
869
            isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
870
                                vga_ram_addr, vga_ram_size);
871
        }
872
    } else if (vmsvga_enabled) {
873
        if (pci_enabled)
874
            pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
875
                            vga_ram_addr, vga_ram_size);
876
        else
877
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
878
    } else {
879
        if (pci_enabled) {
880
            pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
881
                         vga_ram_addr, vga_ram_size, 0, 0);
882
        } else {
883
            isa_vga_init(ds, phys_ram_base + vga_ram_addr,
884
                         vga_ram_addr, vga_ram_size);
885
        }
886
    }
887

    
888
    rtc_state = rtc_init(0x70, i8259[8]);
889

    
890
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
891
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
892

    
893
    if (pci_enabled) {
894
        ioapic = ioapic_init();
895
    }
896
    pit = pit_init(0x40, i8259[0]);
897
    pcspk_init(pit);
898
    if (pci_enabled) {
899
        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
900
    }
901

    
902
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
903
        if (serial_hds[i]) {
904
            serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
905
        }
906
    }
907

    
908
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
909
        if (parallel_hds[i]) {
910
            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
911
                          parallel_hds[i]);
912
        }
913
    }
914

    
915
    for(i = 0; i < nb_nics; i++) {
916
        nd = &nd_table[i];
917
        if (!nd->model) {
918
            if (pci_enabled) {
919
                nd->model = "ne2k_pci";
920
            } else {
921
                nd->model = "ne2k_isa";
922
            }
923
        }
924
        if (strcmp(nd->model, "ne2k_isa") == 0) {
925
            pc_init_ne2k_isa(nd, i8259);
926
        } else if (pci_enabled) {
927
            if (strcmp(nd->model, "?") == 0)
928
                fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
929
            pci_nic_init(pci_bus, nd, -1);
930
        } else if (strcmp(nd->model, "?") == 0) {
931
            fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
932
            exit(1);
933
        } else {
934
            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
935
            exit(1);
936
        }
937
    }
938

    
939
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
940
        fprintf(stderr, "qemu: too many IDE bus\n");
941
        exit(1);
942
    }
943

    
944
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
945
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
946
        if (index != -1)
947
            hd[i] = drives_table[index].bdrv;
948
        else
949
            hd[i] = NULL;
950
    }
951

    
952
    if (pci_enabled) {
953
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
954
    } else {
955
        for(i = 0; i < MAX_IDE_BUS; i++) {
956
            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
957
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
958
        }
959
    }
960

    
961
    i8042_init(i8259[1], i8259[12], 0x60);
962
    DMA_init(0);
963
#ifdef HAS_AUDIO
964
    audio_init(pci_enabled ? pci_bus : NULL, i8259);
965
#endif
966

    
967
    for(i = 0; i < MAX_FD; i++) {
968
        index = drive_get_index(IF_FLOPPY, 0, i);
969
        if (index != -1)
970
            fd[i] = drives_table[index].bdrv;
971
        else
972
            fd[i] = NULL;
973
    }
974
    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
975

    
976
    cmos_init(ram_size, boot_device, hd);
977

    
978
    if (pci_enabled && usb_enabled) {
979
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
980
    }
981

    
982
    if (pci_enabled && acpi_enabled) {
983
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
984
        i2c_bus *smbus;
985

    
986
        /* TODO: Populate SPD eeprom data.  */
987
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
988
        for (i = 0; i < 8; i++) {
989
            smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
990
        }
991
    }
992

    
993
    if (i440fx_state) {
994
        i440fx_init_memory_mappings(i440fx_state);
995
    }
996

    
997
    if (pci_enabled) {
998
        int max_bus;
999
        int bus, unit;
1000
        void *scsi;
1001

    
1002
        max_bus = drive_get_max_bus(IF_SCSI);
1003

    
1004
        for (bus = 0; bus <= max_bus; bus++) {
1005
            scsi = lsi_scsi_init(pci_bus, -1);
1006
            for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1007
                index = drive_get_index(IF_SCSI, bus, unit);
1008
                if (index == -1)
1009
                    continue;
1010
                lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1011
            }
1012
        }
1013
    }
1014
}
1015

    
1016
static void pc_init_pci(int ram_size, int vga_ram_size,
1017
                        const char *boot_device, DisplayState *ds,
1018
                        const char *kernel_filename,
1019
                        const char *kernel_cmdline,
1020
                        const char *initrd_filename,
1021
                        const char *cpu_model)
1022
{
1023
    pc_init1(ram_size, vga_ram_size, boot_device, ds,
1024
             kernel_filename, kernel_cmdline,
1025
             initrd_filename, 1, cpu_model);
1026
}
1027

    
1028
static void pc_init_isa(int ram_size, int vga_ram_size,
1029
                        const char *boot_device, DisplayState *ds,
1030
                        const char *kernel_filename,
1031
                        const char *kernel_cmdline,
1032
                        const char *initrd_filename,
1033
                        const char *cpu_model)
1034
{
1035
    pc_init1(ram_size, vga_ram_size, boot_device, ds,
1036
             kernel_filename, kernel_cmdline,
1037
             initrd_filename, 0, cpu_model);
1038
}
1039

    
1040
QEMUMachine pc_machine = {
1041
    "pc",
1042
    "Standard PC",
1043
    pc_init_pci,
1044
};
1045

    
1046
QEMUMachine isapc_machine = {
1047
    "isapc",
1048
    "ISA-only PC",
1049
    pc_init_isa,
1050
};