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1 | 3ef693a0 | bellard | /*
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2 | 3ef693a0 | bellard | * i386 execution defines
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3 | 3ef693a0 | bellard | *
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4 | 3ef693a0 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 3ef693a0 | bellard | *
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6 | 3ef693a0 | bellard | * This library is free software; you can redistribute it and/or
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7 | 3ef693a0 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 3ef693a0 | bellard | * License as published by the Free Software Foundation; either
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9 | 3ef693a0 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 3ef693a0 | bellard | *
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11 | 3ef693a0 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 3ef693a0 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 3ef693a0 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 3ef693a0 | bellard | * Lesser General Public License for more details.
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15 | 3ef693a0 | bellard | *
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16 | 3ef693a0 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 3ef693a0 | bellard | * License along with this library; if not, write to the Free Software
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18 | 3ef693a0 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 3ef693a0 | bellard | */
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20 | 7d13299d | bellard | typedef unsigned char uint8_t; |
21 | 7d13299d | bellard | typedef unsigned short uint16_t; |
22 | 7d13299d | bellard | typedef unsigned int uint32_t; |
23 | 7d13299d | bellard | typedef unsigned long long uint64_t; |
24 | 7d13299d | bellard | |
25 | 7d13299d | bellard | typedef signed char int8_t; |
26 | 7d13299d | bellard | typedef signed short int16_t; |
27 | 7d13299d | bellard | typedef signed int int32_t; |
28 | 7d13299d | bellard | typedef signed long long int64_t; |
29 | 7d13299d | bellard | |
30 | 7d13299d | bellard | #define bswap32(x) \
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31 | 7d13299d | bellard | ({ \ |
32 | 7d13299d | bellard | uint32_t __x = (x); \ |
33 | 7d13299d | bellard | ((uint32_t)( \ |
34 | 7d13299d | bellard | (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ |
35 | 7d13299d | bellard | (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ |
36 | 7d13299d | bellard | (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ |
37 | 7d13299d | bellard | (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )); \ |
38 | 7d13299d | bellard | }) |
39 | 7d13299d | bellard | |
40 | 7d13299d | bellard | #define NULL 0 |
41 | 7d13299d | bellard | #include <fenv.h> |
42 | 7d13299d | bellard | |
43 | 7d13299d | bellard | typedef struct FILE FILE; |
44 | 7d13299d | bellard | extern FILE *logfile;
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45 | 7d13299d | bellard | extern int loglevel; |
46 | 7d13299d | bellard | extern int fprintf(FILE *, const char *, ...); |
47 | 6dbad63e | bellard | extern int printf(const char *, ...); |
48 | 7d13299d | bellard | |
49 | 7d13299d | bellard | #ifdef __i386__
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50 | 7d13299d | bellard | register unsigned int T0 asm("ebx"); |
51 | 7d13299d | bellard | register unsigned int T1 asm("esi"); |
52 | 7d13299d | bellard | register unsigned int A0 asm("edi"); |
53 | 7d13299d | bellard | register struct CPUX86State *env asm("ebp"); |
54 | 7d13299d | bellard | #endif
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55 | 7d13299d | bellard | #ifdef __powerpc__
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56 | 04369ff2 | bellard | register unsigned int EAX asm("r16"); |
57 | 04369ff2 | bellard | register unsigned int ECX asm("r17"); |
58 | 04369ff2 | bellard | register unsigned int EDX asm("r18"); |
59 | 04369ff2 | bellard | register unsigned int EBX asm("r19"); |
60 | 04369ff2 | bellard | register unsigned int ESP asm("r20"); |
61 | 04369ff2 | bellard | register unsigned int EBP asm("r21"); |
62 | 04369ff2 | bellard | register unsigned int ESI asm("r22"); |
63 | 04369ff2 | bellard | register unsigned int EDI asm("r23"); |
64 | 7d13299d | bellard | register unsigned int T0 asm("r24"); |
65 | 7d13299d | bellard | register unsigned int T1 asm("r25"); |
66 | 7d13299d | bellard | register unsigned int A0 asm("r26"); |
67 | 7d13299d | bellard | register struct CPUX86State *env asm("r27"); |
68 | 04369ff2 | bellard | #define USE_INT_TO_FLOAT_HELPERS
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69 | d03cda59 | bellard | #define BUGGY_GCC_DIV64
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70 | 04369ff2 | bellard | #define reg_EAX
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71 | 04369ff2 | bellard | #define reg_ECX
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72 | 04369ff2 | bellard | #define reg_EDX
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73 | 04369ff2 | bellard | #define reg_EBX
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74 | 04369ff2 | bellard | #define reg_ESP
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75 | 04369ff2 | bellard | #define reg_EBP
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76 | 04369ff2 | bellard | #define reg_ESI
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77 | 04369ff2 | bellard | #define reg_EDI
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78 | 7d13299d | bellard | #endif
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79 | 7d13299d | bellard | #ifdef __arm__
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80 | 7d13299d | bellard | register unsigned int T0 asm("r4"); |
81 | 7d13299d | bellard | register unsigned int T1 asm("r5"); |
82 | 7d13299d | bellard | register unsigned int A0 asm("r6"); |
83 | 7d13299d | bellard | register struct CPUX86State *env asm("r7"); |
84 | 7d13299d | bellard | #endif
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85 | 7d13299d | bellard | #ifdef __mips__
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86 | 7d13299d | bellard | register unsigned int T0 asm("s0"); |
87 | 7d13299d | bellard | register unsigned int T1 asm("s1"); |
88 | 7d13299d | bellard | register unsigned int A0 asm("s2"); |
89 | 7d13299d | bellard | register struct CPUX86State *env asm("s3"); |
90 | 7d13299d | bellard | #endif
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91 | 7d13299d | bellard | #ifdef __sparc__
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92 | 7d13299d | bellard | register unsigned int T0 asm("l0"); |
93 | 7d13299d | bellard | register unsigned int T1 asm("l1"); |
94 | 7d13299d | bellard | register unsigned int A0 asm("l2"); |
95 | 7d13299d | bellard | register struct CPUX86State *env asm("l3"); |
96 | d014c98c | bellard | #define USE_FP_CONVERT
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97 | 7d13299d | bellard | #endif
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98 | fb3e5849 | bellard | #ifdef __s390__
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99 | fb3e5849 | bellard | register unsigned int T0 asm("r7"); |
100 | fb3e5849 | bellard | register unsigned int T1 asm("r8"); |
101 | fb3e5849 | bellard | register unsigned int A0 asm("r9"); |
102 | fb3e5849 | bellard | register struct CPUX86State *env asm("r10"); |
103 | fb3e5849 | bellard | #endif
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104 | d03cda59 | bellard | #ifdef __alpha__
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105 | d03cda59 | bellard | register unsigned int T0 asm("$9"); |
106 | d03cda59 | bellard | register unsigned int T1 asm("$10"); |
107 | d03cda59 | bellard | register unsigned int A0 asm("$11"); |
108 | 74c95119 | bellard | register unsigned int EAX asm("$12"); |
109 | 74c95119 | bellard | register unsigned int ESP asm("$13"); |
110 | 74c95119 | bellard | register unsigned int EBP asm("$14"); |
111 | 74c95119 | bellard | register struct CPUX86State *env asm("$15"); |
112 | 74c95119 | bellard | #define reg_EAX
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113 | 74c95119 | bellard | #define reg_ESP
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114 | 74c95119 | bellard | #define reg_EBP
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115 | d03cda59 | bellard | #endif
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116 | 0d330196 | bellard | #ifdef __ia64__
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117 | 0d330196 | bellard | register unsigned int T0 asm("r24"); |
118 | 0d330196 | bellard | register unsigned int T1 asm("r25"); |
119 | 0d330196 | bellard | register unsigned int A0 asm("r26"); |
120 | 0d330196 | bellard | register struct CPUX86State *env asm("r27"); |
121 | 0d330196 | bellard | #endif
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122 | 7d13299d | bellard | |
123 | 7d13299d | bellard | /* force GCC to generate only one epilog at the end of the function */
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124 | 7d13299d | bellard | #define FORCE_RET() asm volatile (""); |
125 | 7d13299d | bellard | |
126 | 7d13299d | bellard | #ifndef OPPROTO
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127 | 7d13299d | bellard | #define OPPROTO
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128 | 7d13299d | bellard | #endif
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129 | 7d13299d | bellard | |
130 | 7d13299d | bellard | #define xglue(x, y) x ## y |
131 | 7d13299d | bellard | #define glue(x, y) xglue(x, y)
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132 | 7d13299d | bellard | |
133 | 04369ff2 | bellard | #ifndef reg_EAX
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134 | 7d13299d | bellard | #define EAX (env->regs[R_EAX])
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135 | 04369ff2 | bellard | #endif
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136 | 04369ff2 | bellard | #ifndef reg_ECX
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137 | 7d13299d | bellard | #define ECX (env->regs[R_ECX])
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138 | 04369ff2 | bellard | #endif
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139 | 04369ff2 | bellard | #ifndef reg_EDX
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140 | 7d13299d | bellard | #define EDX (env->regs[R_EDX])
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141 | 04369ff2 | bellard | #endif
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142 | 04369ff2 | bellard | #ifndef reg_EBX
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143 | 7d13299d | bellard | #define EBX (env->regs[R_EBX])
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144 | 04369ff2 | bellard | #endif
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145 | 04369ff2 | bellard | #ifndef reg_ESP
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146 | 7d13299d | bellard | #define ESP (env->regs[R_ESP])
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147 | 04369ff2 | bellard | #endif
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148 | 04369ff2 | bellard | #ifndef reg_EBP
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149 | 7d13299d | bellard | #define EBP (env->regs[R_EBP])
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150 | 04369ff2 | bellard | #endif
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151 | 04369ff2 | bellard | #ifndef reg_ESI
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152 | 7d13299d | bellard | #define ESI (env->regs[R_ESI])
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153 | 04369ff2 | bellard | #endif
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154 | 04369ff2 | bellard | #ifndef reg_EDI
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155 | 7d13299d | bellard | #define EDI (env->regs[R_EDI])
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156 | 04369ff2 | bellard | #endif
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157 | dab2ed99 | bellard | #define EIP (env->eip)
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158 | 7d13299d | bellard | #define DF (env->df)
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159 | 7d13299d | bellard | |
160 | 7d13299d | bellard | #define CC_SRC (env->cc_src)
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161 | 7d13299d | bellard | #define CC_DST (env->cc_dst)
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162 | 7d13299d | bellard | #define CC_OP (env->cc_op)
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163 | 7d13299d | bellard | |
164 | 7d13299d | bellard | /* float macros */
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165 | 7d13299d | bellard | #define FT0 (env->ft0)
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166 | 7d13299d | bellard | #define ST0 (env->fpregs[env->fpstt])
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167 | 7d13299d | bellard | #define ST(n) (env->fpregs[(env->fpstt + (n)) & 7]) |
168 | 7d13299d | bellard | #define ST1 ST(1) |
169 | 7d13299d | bellard | |
170 | d014c98c | bellard | #ifdef USE_FP_CONVERT
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171 | d014c98c | bellard | #define FP_CONVERT (env->fp_convert)
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172 | d014c98c | bellard | #endif
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173 | d014c98c | bellard | |
174 | 74c95119 | bellard | #ifdef __alpha__
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175 | 74c95119 | bellard | /* Suggested by Richard Henderson. This will result in code like
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176 | 74c95119 | bellard | ldah $0,__op_param1($29) !gprelhigh
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177 | 74c95119 | bellard | lda $0,__op_param1($0) !gprellow
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178 | 74c95119 | bellard | We can then conveniently change $29 to $31 and adapt the offsets to
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179 | 74c95119 | bellard | emit the appropriate constant. */
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180 | 74c95119 | bellard | extern int __op_param1 __attribute__((visibility("hidden"))); |
181 | 74c95119 | bellard | extern int __op_param2 __attribute__((visibility("hidden"))); |
182 | 74c95119 | bellard | extern int __op_param3 __attribute__((visibility("hidden"))); |
183 | 74c95119 | bellard | #define PARAM1 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param1)); _r; }) |
184 | 74c95119 | bellard | #define PARAM2 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param2)); _r; }) |
185 | 74c95119 | bellard | #define PARAM3 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param3)); _r; }) |
186 | 74c95119 | bellard | #else
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187 | 7d13299d | bellard | extern int __op_param1, __op_param2, __op_param3; |
188 | 7d13299d | bellard | #define PARAM1 ((long)(&__op_param1)) |
189 | 7d13299d | bellard | #define PARAM2 ((long)(&__op_param2)) |
190 | 7d13299d | bellard | #define PARAM3 ((long)(&__op_param3)) |
191 | 74c95119 | bellard | #endif
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192 | 7d13299d | bellard | |
193 | 7d13299d | bellard | #include "cpu-i386.h" |
194 | 7d13299d | bellard | |
195 | 7d13299d | bellard | typedef struct CCTable { |
196 | 7d13299d | bellard | int (*compute_all)(void); /* return all the flags */ |
197 | 7d13299d | bellard | int (*compute_c)(void); /* return the C flag */ |
198 | 7d13299d | bellard | } CCTable; |
199 | 7d13299d | bellard | |
200 | 7d13299d | bellard | extern CCTable cc_table[];
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201 | 6dbad63e | bellard | |
202 | 6dbad63e | bellard | void load_seg(int seg_reg, int selector); |
203 | 1b6b029e | bellard | void cpu_lock(void); |
204 | 1b6b029e | bellard | void cpu_unlock(void); |
205 | 455b7619 | bellard | void raise_exception_err(int exception_index, int error_code); |
206 | 9de5e440 | bellard | void raise_exception(int exception_index); |
207 | 9de5e440 | bellard | |
208 | 9de5e440 | bellard | void OPPROTO op_movl_eflags_T0(void); |
209 | 9de5e440 | bellard | void OPPROTO op_movl_T0_eflags(void); |