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    MemoryRegion sysregmem;

    MemoryRegion gic_iomem_alias;

    MemoryRegion container;

static const uint8_t nvic_id[] = {

    0x00, 0xb0, 0x1b, 0x00, 0x0d, 0xe0, 0x05, 0xb1

};

    case 0xf00: /* Software Triggered Interrupt Register */

        if ((value & 0x1ff) < s->num_irq) {

            gic_set_pending_private(&s->gic, 0, value & 0x1ff);

        }

        break;

static uint64_t nvic_sysreg_read(void *opaque, target_phys_addr_t addr,

                                 unsigned size)

{

    /* At the moment we only support the ID registers for byte/word access.

     * This is not strictly correct as a few of the other registers also

     * allow byte access.

     */

    uint32_t offset = addr;

    if (offset >= 0xfe0) {

        if (offset & 3) {

            return 0;

        }

        return nvic_id[(offset - 0xfe0) >> 2];

    }

    if (size == 4) {

        return nvic_readl(opaque, offset);

    }

    hw_error("NVIC: Bad read of size %d at offset 0x%x\n", size, offset);

}

static void nvic_sysreg_write(void *opaque, target_phys_addr_t addr,

                              uint64_t value, unsigned size)

{

    uint32_t offset = addr;

    if (size == 4) {

        nvic_writel(opaque, offset, value);

        return;

    }

    hw_error("NVIC: Bad write of size %d at offset 0x%x\n", size, offset);

}

static const MemoryRegionOps nvic_sysreg_ops = {

    .read = nvic_sysreg_read,

    .write = nvic_sysreg_write,

    .endianness = DEVICE_NATIVE_ENDIAN,

};

    /* The NVIC and system controller register area looks like this:

     *  0..0xff : system control registers, including systick

     *  0x100..0xcff : GIC-like registers

     *  0xd00..0xfff : system control registers

     * We use overlaying to put the GIC like registers

     * over the top of the system control register region.

     */

    memory_region_init(&s->container, "nvic", 0x1000);

    /* The system register region goes at the bottom of the priority

     * stack as it covers the whole page.

     */

    memory_region_init_io(&s->sysregmem, &nvic_sysreg_ops, s,

                          "nvic_sysregs", 0x1000);

    memory_region_add_subregion(&s->container, 0, &s->sysregmem);

    /* Alias the GIC region so we can get only the section of it

     * we need, and layer it on top of the system register region.

     */

    memory_region_init_alias(&s->gic_iomem_alias, "nvic-gic", &s->gic.iomem,

                             0x100, 0xc00);

    memory_region_add_subregion_overlap(&s->container, 0x100, &s->gic.iomem, 1);

    /* Map the whole thing into system memory at the location required

     * by the v7M architecture.

     */

    memory_region_add_subregion(get_system_memory(), 0xe000e000, &s->container);