Revision 2ac71179 hw/arm_timer.c
| b/hw/arm_timer.c | ||
|---|---|---|
| 62 | 62 |
return 0; |
| 63 | 63 |
return s->int_level; |
| 64 | 64 |
default: |
| 65 |
cpu_abort (cpu_single_env, "arm_timer_read: Bad offset %x\n", |
|
| 66 |
(int)offset); |
|
| 65 |
hw_error("arm_timer_read: Bad offset %x\n", (int)offset);
|
|
| 67 | 66 |
return 0; |
| 68 | 67 |
} |
| 69 | 68 |
} |
| ... | ... | |
| 130 | 129 |
arm_timer_recalibrate(s, 0); |
| 131 | 130 |
break; |
| 132 | 131 |
default: |
| 133 |
cpu_abort (cpu_single_env, "arm_timer_write: Bad offset %x\n", |
|
| 134 |
(int)offset); |
|
| 132 |
hw_error("arm_timer_write: Bad offset %x\n", (int)offset);
|
|
| 135 | 133 |
} |
| 136 | 134 |
arm_timer_update(s); |
| 137 | 135 |
} |
| ... | ... | |
| 290 | 288 |
|
| 291 | 289 |
/* ??? Don't know the PrimeCell ID for this device. */ |
| 292 | 290 |
n = offset >> 8; |
| 293 |
if (n > 3) |
|
| 294 |
cpu_abort(cpu_single_env, "sp804_read: Bad timer %d\n", n); |
|
| 291 |
if (n > 3) {
|
|
| 292 |
hw_error("sp804_read: Bad timer %d\n", n);
|
|
| 293 |
} |
|
| 295 | 294 |
|
| 296 | 295 |
return arm_timer_read(s->timer[n], offset & 0xff); |
| 297 | 296 |
} |
| ... | ... | |
| 303 | 302 |
int n; |
| 304 | 303 |
|
| 305 | 304 |
n = offset >> 8; |
| 306 |
if (n > 3) |
|
| 307 |
cpu_abort(cpu_single_env, "sp804_write: Bad timer %d\n", n); |
|
| 305 |
if (n > 3) {
|
|
| 306 |
hw_error("sp804_write: Bad timer %d\n", n);
|
|
| 307 |
} |
|
| 308 | 308 |
|
| 309 | 309 |
arm_timer_write(s->timer[n], offset & 0xff, value); |
| 310 | 310 |
} |
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