Revision 2be17ebd hw/slavio_misc.c
| b/hw/slavio_misc.c | ||
|---|---|---|
| 51 | 51 |
uint32_t sysctrl; |
| 52 | 52 |
uint16_t leds; |
| 53 | 53 |
CPUState *env; |
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qemu_irq fdc_tc; |
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| 54 | 55 |
} MiscState; |
| 55 | 56 |
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| 56 | 57 |
#define MISC_SIZE 1 |
| ... | ... | |
| 66 | 67 |
#define MISC_MDM 0x01b00000 |
| 67 | 68 |
#define MISC_SYS 0x01f00000 |
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#define AUX1_TC 0x02 |
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| 69 | 72 |
#define AUX2_PWROFF 0x01 |
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#define AUX2_PWRINTCLR 0x02 |
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#define AUX2_PWRFAIL 0x20 |
| ... | ... | |
| 175 | 178 |
MiscState *s = opaque; |
| 176 | 179 |
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MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff);
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if (val & AUX1_TC) {
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// Send a pulse to floppy terminal count line |
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if (s->fdc_tc) {
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qemu_irq_raise(s->fdc_tc); |
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qemu_irq_lower(s->fdc_tc); |
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} |
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val &= ~AUX1_TC; |
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} |
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s->aux1 = val & 0xff; |
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} |
| 180 | 191 |
|
| ... | ... | |
| 407 | 418 |
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
| 408 | 419 |
target_phys_addr_t aux1_base, |
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target_phys_addr_t aux2_base, qemu_irq irq, |
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CPUState *env) |
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CPUState *env, qemu_irq **fdc_tc)
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{
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int io; |
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MiscState *s; |
| ... | ... | |
| 462 | 473 |
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s->irq = irq; |
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s->env = env; |
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*fdc_tc = &s->fdc_tc; |
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| 465 | 477 |
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| 466 | 478 |
register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load,
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| 467 | 479 |
s); |
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