Revision 2bf90458
| b/hw/pxa.h | ||
|---|---|---|
| 85 | 85 |
|
| 86 | 86 |
/* pxa2xx_mmci.c */ |
| 87 | 87 |
typedef struct PXA2xxMMCIState PXA2xxMMCIState; |
| 88 |
PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, |
|
| 88 |
PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem, |
|
| 89 |
target_phys_addr_t base, |
|
| 89 | 90 |
BlockDriverState *bd, qemu_irq irq, |
| 90 | 91 |
qemu_irq rx_dma, qemu_irq tx_dma); |
| 91 | 92 |
void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly, |
| b/hw/pxa2xx.c | ||
|---|---|---|
| 2072 | 2072 |
fprintf(stderr, "qemu: missing SecureDigital device\n"); |
| 2073 | 2073 |
exit(1); |
| 2074 | 2074 |
} |
| 2075 |
s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv, |
|
| 2075 |
s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
|
|
| 2076 | 2076 |
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC), |
| 2077 | 2077 |
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), |
| 2078 | 2078 |
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); |
| ... | ... | |
| 2201 | 2201 |
fprintf(stderr, "qemu: missing SecureDigital device\n"); |
| 2202 | 2202 |
exit(1); |
| 2203 | 2203 |
} |
| 2204 |
s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv, |
|
| 2204 |
s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
|
|
| 2205 | 2205 |
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC), |
| 2206 | 2206 |
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), |
| 2207 | 2207 |
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); |
| b/hw/pxa2xx_mmci.c | ||
|---|---|---|
| 13 | 13 |
#include "qdev.h" |
| 14 | 14 |
|
| 15 | 15 |
struct PXA2xxMMCIState {
|
| 16 |
MemoryRegion iomem; |
|
| 16 | 17 |
qemu_irq irq; |
| 17 | 18 |
qemu_irq rx_dma; |
| 18 | 19 |
qemu_irq tx_dma; |
| ... | ... | |
| 403 | 404 |
return pxa2xx_mmci_read(opaque, offset); |
| 404 | 405 |
} |
| 405 | 406 |
|
| 406 |
static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = {
|
|
| 407 |
pxa2xx_mmci_readb, |
|
| 408 |
pxa2xx_mmci_readh, |
|
| 409 |
pxa2xx_mmci_readw |
|
| 410 |
}; |
|
| 411 |
|
|
| 412 | 407 |
static void pxa2xx_mmci_writeb(void *opaque, |
| 413 | 408 |
target_phys_addr_t offset, uint32_t value) |
| 414 | 409 |
{
|
| ... | ... | |
| 433 | 428 |
pxa2xx_mmci_write(opaque, offset, value); |
| 434 | 429 |
} |
| 435 | 430 |
|
| 436 |
static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = {
|
|
| 437 |
pxa2xx_mmci_writeb, |
|
| 438 |
pxa2xx_mmci_writeh, |
|
| 439 |
pxa2xx_mmci_writew |
|
| 431 |
static const MemoryRegionOps pxa2xx_mmci_ops = {
|
|
| 432 |
.old_mmio = {
|
|
| 433 |
.read = { pxa2xx_mmci_readb,
|
|
| 434 |
pxa2xx_mmci_readh, |
|
| 435 |
pxa2xx_mmci_readw, }, |
|
| 436 |
.write = { pxa2xx_mmci_writeb,
|
|
| 437 |
pxa2xx_mmci_writeh, |
|
| 438 |
pxa2xx_mmci_writew, }, |
|
| 439 |
}, |
|
| 440 |
.endianness = DEVICE_NATIVE_ENDIAN, |
|
| 440 | 441 |
}; |
| 441 | 442 |
|
| 442 | 443 |
static void pxa2xx_mmci_save(QEMUFile *f, void *opaque) |
| ... | ... | |
| 517 | 518 |
return 0; |
| 518 | 519 |
} |
| 519 | 520 |
|
| 520 |
PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, |
|
| 521 |
PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem, |
|
| 522 |
target_phys_addr_t base, |
|
| 521 | 523 |
BlockDriverState *bd, qemu_irq irq, |
| 522 | 524 |
qemu_irq rx_dma, qemu_irq tx_dma) |
| 523 | 525 |
{
|
| 524 |
int iomemtype; |
|
| 525 | 526 |
PXA2xxMMCIState *s; |
| 526 | 527 |
|
| 527 | 528 |
s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState)); |
| ... | ... | |
| 529 | 530 |
s->rx_dma = rx_dma; |
| 530 | 531 |
s->tx_dma = tx_dma; |
| 531 | 532 |
|
| 532 |
iomemtype = cpu_register_io_memory(pxa2xx_mmci_readfn,
|
|
| 533 |
pxa2xx_mmci_writefn, s, DEVICE_NATIVE_ENDIAN);
|
|
| 534 |
cpu_register_physical_memory(base, 0x00100000, iomemtype);
|
|
| 533 |
memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s,
|
|
| 534 |
"pxa2xx-mmci", 0x00100000);
|
|
| 535 |
memory_region_add_subregion(sysmem, base, &s->iomem);
|
|
| 535 | 536 |
|
| 536 | 537 |
/* Instantiate the actual storage */ |
| 537 | 538 |
s->card = sd_init(bd, 0); |
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