root / cpu-arm.h @ 2c1794c4
History | View | Annotate | Download (2.1 kB)
1 | 5898e816 | bellard | /*
|
---|---|---|---|
2 | 5898e816 | bellard | * ARM virtual CPU header
|
3 | 5898e816 | bellard | *
|
4 | 5898e816 | bellard | * Copyright (c) 2003 Fabrice Bellard
|
5 | 5898e816 | bellard | *
|
6 | 5898e816 | bellard | * This library is free software; you can redistribute it and/or
|
7 | 5898e816 | bellard | * modify it under the terms of the GNU Lesser General Public
|
8 | 5898e816 | bellard | * License as published by the Free Software Foundation; either
|
9 | 5898e816 | bellard | * version 2 of the License, or (at your option) any later version.
|
10 | 5898e816 | bellard | *
|
11 | 5898e816 | bellard | * This library is distributed in the hope that it will be useful,
|
12 | 5898e816 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 | 5898e816 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 | 5898e816 | bellard | * Lesser General Public License for more details.
|
15 | 5898e816 | bellard | *
|
16 | 5898e816 | bellard | * You should have received a copy of the GNU Lesser General Public
|
17 | 5898e816 | bellard | * License along with this library; if not, write to the Free Software
|
18 | 5898e816 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
19 | 5898e816 | bellard | */
|
20 | 5898e816 | bellard | #ifndef CPU_ARM_H
|
21 | 5898e816 | bellard | #define CPU_ARM_H
|
22 | 5898e816 | bellard | |
23 | 5898e816 | bellard | #include "config.h" |
24 | 5898e816 | bellard | #include <setjmp.h> |
25 | 5898e816 | bellard | |
26 | 5898e816 | bellard | #define EXCP_UDEF 1 /* undefined instruction */ |
27 | 5898e816 | bellard | #define EXCP_SWI 2 /* software interrupt */ |
28 | 5898e816 | bellard | #define EXCP_INTERRUPT 256 /* async interruption */ |
29 | 5898e816 | bellard | |
30 | 5898e816 | bellard | typedef struct CPUARMState { |
31 | 5898e816 | bellard | uint32_t regs[16];
|
32 | 5898e816 | bellard | uint32_t cpsr; |
33 | 5898e816 | bellard | |
34 | 5898e816 | bellard | /* cpsr flag cache for faster execution */
|
35 | 5898e816 | bellard | uint32_t CF; /* 0 or 1 */
|
36 | 5898e816 | bellard | uint32_t VF; /* V is the bit 31. All other bits are undefined */
|
37 | 5898e816 | bellard | uint32_t NZF; /* N is bit 31. Z is computed from NZF */
|
38 | 5898e816 | bellard | |
39 | 5898e816 | bellard | /* exception/interrupt handling */
|
40 | 5898e816 | bellard | jmp_buf jmp_env; |
41 | 5898e816 | bellard | int exception_index;
|
42 | 5898e816 | bellard | int interrupt_request;
|
43 | e2f22898 | bellard | struct TranslationBlock *current_tb;
|
44 | e2f22898 | bellard | int user_mode_only;
|
45 | 5898e816 | bellard | |
46 | 5898e816 | bellard | /* user data */
|
47 | 5898e816 | bellard | void *opaque;
|
48 | 5898e816 | bellard | } CPUARMState; |
49 | 5898e816 | bellard | |
50 | 5898e816 | bellard | CPUARMState *cpu_arm_init(void);
|
51 | 5898e816 | bellard | int cpu_arm_exec(CPUARMState *s);
|
52 | 5898e816 | bellard | void cpu_arm_close(CPUARMState *s);
|
53 | 5898e816 | bellard | /* you can call this signal handler from your SIGBUS and SIGSEGV
|
54 | 5898e816 | bellard | signal handlers to inform the virtual CPU of exceptions. non zero
|
55 | 5898e816 | bellard | is returned if the signal was handled by the virtual CPU. */
|
56 | 5898e816 | bellard | struct siginfo;
|
57 | 5898e816 | bellard | int cpu_arm_signal_handler(int host_signum, struct siginfo *info, |
58 | 5898e816 | bellard | void *puc);
|
59 | 5898e816 | bellard | |
60 | 5898e816 | bellard | void cpu_arm_dump_state(CPUARMState *env, FILE *f, int flags); |
61 | 5898e816 | bellard | |
62 | 5898e816 | bellard | #define TARGET_PAGE_BITS 12 |
63 | 5898e816 | bellard | #include "cpu-all.h" |
64 | 5898e816 | bellard | |
65 | 5898e816 | bellard | #endif |