root / hw / display / g364fb.c @ 2c9b15ca
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/*
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* QEMU G364 framebuffer Emulator.
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*
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* Copyright (c) 2007-2011 Herve Poussineau
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/hw.h" |
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#include "ui/console.h" |
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#include "ui/pixel_ops.h" |
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#include "trace.h" |
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#include "hw/sysbus.h" |
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typedef struct G364State { |
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/* hardware */
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uint8_t *vram; |
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uint32_t vram_size; |
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qemu_irq irq; |
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MemoryRegion mem_vram; |
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MemoryRegion mem_ctrl; |
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/* registers */
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uint8_t color_palette[256][3]; |
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uint8_t cursor_palette[3][3]; |
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uint16_t cursor[512];
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uint32_t cursor_position; |
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uint32_t ctla; |
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uint32_t top_of_screen; |
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uint32_t width, height; /* in pixels */
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/* display refresh support */
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QemuConsole *con; |
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int depth;
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int blanked;
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} G364State; |
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#define REG_BOOT 0x000000 |
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#define REG_DISPLAY 0x000118 |
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#define REG_VDISPLAY 0x000150 |
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#define REG_CTLA 0x000300 |
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#define REG_TOP 0x000400 |
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#define REG_CURS_PAL 0x000508 |
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#define REG_CURS_POS 0x000638 |
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#define REG_CLR_PAL 0x000800 |
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#define REG_CURS_PAT 0x001000 |
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#define REG_RESET 0x100000 |
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#define CTLA_FORCE_BLANK 0x00000400 |
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#define CTLA_NO_CURSOR 0x00800000 |
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#define G364_PAGE_SIZE 4096 |
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static inline int check_dirty(G364State *s, ram_addr_t page) |
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{ |
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return memory_region_get_dirty(&s->mem_vram, page, G364_PAGE_SIZE,
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DIRTY_MEMORY_VGA); |
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} |
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static inline void reset_dirty(G364State *s, |
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ram_addr_t page_min, ram_addr_t page_max) |
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{ |
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memory_region_reset_dirty(&s->mem_vram, |
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page_min, |
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page_max + G364_PAGE_SIZE - page_min - 1,
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DIRTY_MEMORY_VGA); |
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} |
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static void g364fb_draw_graphic8(G364State *s) |
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{ |
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DisplaySurface *surface = qemu_console_surface(s->con); |
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int i, w;
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uint8_t *vram; |
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uint8_t *data_display, *dd; |
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ram_addr_t page, page_min, page_max; |
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int x, y;
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int xmin, xmax;
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int ymin, ymax;
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int xcursor, ycursor;
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unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b); |
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switch (surface_bits_per_pixel(surface)) {
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case 8: |
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rgb_to_pixel = rgb_to_pixel8; |
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w = 1;
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break;
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case 15: |
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rgb_to_pixel = rgb_to_pixel15; |
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w = 2;
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break;
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case 16: |
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rgb_to_pixel = rgb_to_pixel16; |
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w = 2;
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break;
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case 32: |
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rgb_to_pixel = rgb_to_pixel32; |
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w = 4;
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break;
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default:
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hw_error("g364: unknown host depth %d",
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surface_bits_per_pixel(surface)); |
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return;
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} |
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page = 0;
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page_min = (ram_addr_t)-1;
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page_max = 0;
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x = y = 0;
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xmin = s->width; |
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xmax = 0;
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ymin = s->height; |
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ymax = 0;
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if (!(s->ctla & CTLA_NO_CURSOR)) {
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xcursor = s->cursor_position >> 12;
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ycursor = s->cursor_position & 0xfff;
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} else {
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xcursor = ycursor = -65;
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} |
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vram = s->vram + s->top_of_screen; |
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/* XXX: out of range in vram? */
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data_display = dd = surface_data(surface); |
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while (y < s->height) {
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if (check_dirty(s, page)) {
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if (y < ymin)
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ymin = ymax = y; |
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if (page_min == (ram_addr_t)-1) |
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page_min = page; |
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page_max = page; |
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if (x < xmin)
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xmin = x; |
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for (i = 0; i < G364_PAGE_SIZE; i++) { |
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uint8_t index; |
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unsigned int color; |
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if (unlikely((y >= ycursor && y < ycursor + 64) && |
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(x >= xcursor && x < xcursor + 64))) {
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/* pointer area */
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int xdiff = x - xcursor;
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uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8]; |
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int op = (curs >> ((xdiff & 7) * 2)) & 3; |
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if (likely(op == 0)) { |
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/* transparent */
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index = *vram; |
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color = (*rgb_to_pixel)( |
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s->color_palette[index][0],
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s->color_palette[index][1],
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s->color_palette[index][2]);
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} else {
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/* get cursor color */
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index = op - 1;
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color = (*rgb_to_pixel)( |
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s->cursor_palette[index][0],
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s->cursor_palette[index][1],
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s->cursor_palette[index][2]);
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} |
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} else {
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/* normal area */
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index = *vram; |
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color = (*rgb_to_pixel)( |
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s->color_palette[index][0],
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s->color_palette[index][1],
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s->color_palette[index][2]);
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} |
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memcpy(dd, &color, w); |
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dd += w; |
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x++; |
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vram++; |
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if (x == s->width) {
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xmax = s->width - 1;
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y++; |
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if (y == s->height) {
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ymax = s->height - 1;
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goto done;
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} |
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data_display = dd = data_display + surface_stride(surface); |
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xmin = 0;
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x = 0;
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} |
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} |
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if (x > xmax)
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xmax = x; |
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if (y > ymax)
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ymax = y; |
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} else {
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int dy;
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if (page_min != (ram_addr_t)-1) { |
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reset_dirty(s, page_min, page_max); |
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page_min = (ram_addr_t)-1;
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page_max = 0;
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dpy_gfx_update(s->con, xmin, ymin, |
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xmax - xmin + 1, ymax - ymin + 1); |
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xmin = s->width; |
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xmax = 0;
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ymin = s->height; |
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ymax = 0;
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} |
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x += G364_PAGE_SIZE; |
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dy = x / s->width; |
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x = x % s->width; |
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y += dy; |
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vram += G364_PAGE_SIZE; |
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data_display += dy * surface_stride(surface); |
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dd = data_display + x * w; |
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} |
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page += G364_PAGE_SIZE; |
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} |
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done:
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if (page_min != (ram_addr_t)-1) { |
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dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); |
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reset_dirty(s, page_min, page_max); |
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} |
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} |
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static void g364fb_draw_blank(G364State *s) |
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{ |
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DisplaySurface *surface = qemu_console_surface(s->con); |
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int i, w;
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uint8_t *d; |
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if (s->blanked) {
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/* Screen is already blank. No need to redraw it */
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return;
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} |
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w = s->width * surface_bytes_per_pixel(surface); |
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d = surface_data(surface); |
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for (i = 0; i < s->height; i++) { |
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memset(d, 0, w);
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d += surface_stride(surface); |
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} |
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dpy_gfx_update(s->con, 0, 0, s->width, s->height); |
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s->blanked = 1;
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} |
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static void g364fb_update_display(void *opaque) |
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{ |
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G364State *s = opaque; |
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DisplaySurface *surface = qemu_console_surface(s->con); |
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qemu_flush_coalesced_mmio_buffer(); |
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if (s->width == 0 || s->height == 0) |
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return;
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if (s->width != surface_width(surface) ||
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s->height != surface_height(surface)) { |
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qemu_console_resize(s->con, s->width, s->height); |
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} |
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if (s->ctla & CTLA_FORCE_BLANK) {
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g364fb_draw_blank(s); |
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} else if (s->depth == 8) { |
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g364fb_draw_graphic8(s); |
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} else {
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error_report("g364: unknown guest depth %d", s->depth);
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} |
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qemu_irq_raise(s->irq); |
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} |
273 |
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static inline void g364fb_invalidate_display(void *opaque) |
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{ |
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G364State *s = opaque; |
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s->blanked = 0;
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memory_region_set_dirty(&s->mem_vram, 0, s->vram_size);
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} |
281 |
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static void g364fb_reset(G364State *s) |
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{ |
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qemu_irq_lower(s->irq); |
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memset(s->color_palette, 0, sizeof(s->color_palette)); |
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memset(s->cursor_palette, 0, sizeof(s->cursor_palette)); |
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memset(s->cursor, 0, sizeof(s->cursor)); |
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s->cursor_position = 0;
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s->ctla = 0;
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s->top_of_screen = 0;
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s->width = s->height = 0;
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memset(s->vram, 0, s->vram_size);
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g364fb_invalidate_display(s); |
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} |
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/* called for accesses to io ports */
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static uint64_t g364fb_ctrl_read(void *opaque, |
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hwaddr addr, |
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unsigned int size) |
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{ |
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G364State *s = opaque; |
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uint32_t val; |
304 |
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if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { |
306 |
/* cursor pattern */
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int idx = (addr - REG_CURS_PAT) >> 3; |
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val = s->cursor[idx]; |
309 |
} else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { |
310 |
/* cursor palette */
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int idx = (addr - REG_CURS_PAL) >> 3; |
312 |
val = ((uint32_t)s->cursor_palette[idx][0] << 16); |
313 |
val |= ((uint32_t)s->cursor_palette[idx][1] << 8); |
314 |
val |= ((uint32_t)s->cursor_palette[idx][2] << 0); |
315 |
} else {
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switch (addr) {
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case REG_DISPLAY:
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val = s->width / 4;
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break;
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case REG_VDISPLAY:
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val = s->height * 2;
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break;
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case REG_CTLA:
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val = s->ctla; |
325 |
break;
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default:
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{ |
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error_report("g364: invalid read at [" TARGET_FMT_plx "]", |
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addr); |
330 |
val = 0;
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break;
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} |
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} |
334 |
} |
335 |
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trace_g364fb_read(addr, val); |
337 |
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return val;
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} |
340 |
|
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static void g364fb_update_depth(G364State *s) |
342 |
{ |
343 |
static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 }; |
344 |
s->depth = depths[(s->ctla & 0x00700000) >> 20]; |
345 |
} |
346 |
|
347 |
static void g364_invalidate_cursor_position(G364State *s) |
348 |
{ |
349 |
DisplaySurface *surface = qemu_console_surface(s->con); |
350 |
int ymin, ymax, start, end;
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351 |
|
352 |
/* invalidate only near the cursor */
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ymin = s->cursor_position & 0xfff;
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ymax = MIN(s->height, ymin + 64);
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start = ymin * surface_stride(surface); |
356 |
end = (ymax + 1) * surface_stride(surface);
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357 |
|
358 |
memory_region_set_dirty(&s->mem_vram, start, end - start); |
359 |
} |
360 |
|
361 |
static void g364fb_ctrl_write(void *opaque, |
362 |
hwaddr addr, |
363 |
uint64_t val, |
364 |
unsigned int size) |
365 |
{ |
366 |
G364State *s = opaque; |
367 |
|
368 |
trace_g364fb_write(addr, val); |
369 |
|
370 |
if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) { |
371 |
/* color palette */
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372 |
int idx = (addr - REG_CLR_PAL) >> 3; |
373 |
s->color_palette[idx][0] = (val >> 16) & 0xff; |
374 |
s->color_palette[idx][1] = (val >> 8) & 0xff; |
375 |
s->color_palette[idx][2] = val & 0xff; |
376 |
g364fb_invalidate_display(s); |
377 |
} else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { |
378 |
/* cursor pattern */
|
379 |
int idx = (addr - REG_CURS_PAT) >> 3; |
380 |
s->cursor[idx] = val; |
381 |
g364fb_invalidate_display(s); |
382 |
} else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { |
383 |
/* cursor palette */
|
384 |
int idx = (addr - REG_CURS_PAL) >> 3; |
385 |
s->cursor_palette[idx][0] = (val >> 16) & 0xff; |
386 |
s->cursor_palette[idx][1] = (val >> 8) & 0xff; |
387 |
s->cursor_palette[idx][2] = val & 0xff; |
388 |
g364fb_invalidate_display(s); |
389 |
} else {
|
390 |
switch (addr) {
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391 |
case REG_BOOT: /* Boot timing */ |
392 |
case 0x00108: /* Line timing: half sync */ |
393 |
case 0x00110: /* Line timing: back porch */ |
394 |
case 0x00120: /* Line timing: short display */ |
395 |
case 0x00128: /* Frame timing: broad pulse */ |
396 |
case 0x00130: /* Frame timing: v sync */ |
397 |
case 0x00138: /* Frame timing: v preequalise */ |
398 |
case 0x00140: /* Frame timing: v postequalise */ |
399 |
case 0x00148: /* Frame timing: v blank */ |
400 |
case 0x00158: /* Line timing: line time */ |
401 |
case 0x00160: /* Frame store: line start */ |
402 |
case 0x00168: /* vram cycle: mem init */ |
403 |
case 0x00170: /* vram cycle: transfer delay */ |
404 |
case 0x00200: /* vram cycle: mask register */ |
405 |
/* ignore */
|
406 |
break;
|
407 |
case REG_TOP:
|
408 |
s->top_of_screen = val; |
409 |
g364fb_invalidate_display(s); |
410 |
break;
|
411 |
case REG_DISPLAY:
|
412 |
s->width = val * 4;
|
413 |
break;
|
414 |
case REG_VDISPLAY:
|
415 |
s->height = val / 2;
|
416 |
break;
|
417 |
case REG_CTLA:
|
418 |
s->ctla = val; |
419 |
g364fb_update_depth(s); |
420 |
g364fb_invalidate_display(s); |
421 |
break;
|
422 |
case REG_CURS_POS:
|
423 |
g364_invalidate_cursor_position(s); |
424 |
s->cursor_position = val; |
425 |
g364_invalidate_cursor_position(s); |
426 |
break;
|
427 |
case REG_RESET:
|
428 |
g364fb_reset(s); |
429 |
break;
|
430 |
default:
|
431 |
error_report("g364: invalid write of 0x%" PRIx64
|
432 |
" at [" TARGET_FMT_plx "]", val, addr); |
433 |
break;
|
434 |
} |
435 |
} |
436 |
qemu_irq_lower(s->irq); |
437 |
} |
438 |
|
439 |
static const MemoryRegionOps g364fb_ctrl_ops = { |
440 |
.read = g364fb_ctrl_read, |
441 |
.write = g364fb_ctrl_write, |
442 |
.endianness = DEVICE_LITTLE_ENDIAN, |
443 |
.impl.min_access_size = 4,
|
444 |
.impl.max_access_size = 4,
|
445 |
}; |
446 |
|
447 |
static int g364fb_post_load(void *opaque, int version_id) |
448 |
{ |
449 |
G364State *s = opaque; |
450 |
|
451 |
/* force refresh */
|
452 |
g364fb_update_depth(s); |
453 |
g364fb_invalidate_display(s); |
454 |
|
455 |
return 0; |
456 |
} |
457 |
|
458 |
static const VMStateDescription vmstate_g364fb = { |
459 |
.name = "g364fb",
|
460 |
.version_id = 1,
|
461 |
.minimum_version_id = 1,
|
462 |
.minimum_version_id_old = 1,
|
463 |
.post_load = g364fb_post_load, |
464 |
.fields = (VMStateField[]) { |
465 |
VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, 0, vram_size), |
466 |
VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3), |
467 |
VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9), |
468 |
VMSTATE_UINT16_ARRAY(cursor, G364State, 512),
|
469 |
VMSTATE_UINT32(cursor_position, G364State), |
470 |
VMSTATE_UINT32(ctla, G364State), |
471 |
VMSTATE_UINT32(top_of_screen, G364State), |
472 |
VMSTATE_UINT32(width, G364State), |
473 |
VMSTATE_UINT32(height, G364State), |
474 |
VMSTATE_END_OF_LIST() |
475 |
} |
476 |
}; |
477 |
|
478 |
static const GraphicHwOps g364fb_ops = { |
479 |
.invalidate = g364fb_invalidate_display, |
480 |
.gfx_update = g364fb_update_display, |
481 |
}; |
482 |
|
483 |
static void g364fb_init(DeviceState *dev, G364State *s) |
484 |
{ |
485 |
s->vram = g_malloc0(s->vram_size); |
486 |
|
487 |
s->con = graphic_console_init(dev, &g364fb_ops, s); |
488 |
|
489 |
memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000); |
490 |
memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram", |
491 |
s->vram_size, s->vram); |
492 |
vmstate_register_ram(&s->mem_vram, dev); |
493 |
memory_region_set_coalescing(&s->mem_vram); |
494 |
} |
495 |
|
496 |
typedef struct { |
497 |
SysBusDevice busdev; |
498 |
G364State g364; |
499 |
} G364SysBusState; |
500 |
|
501 |
static int g364fb_sysbus_init(SysBusDevice *dev) |
502 |
{ |
503 |
G364State *s = &FROM_SYSBUS(G364SysBusState, dev)->g364; |
504 |
|
505 |
g364fb_init(&dev->qdev, s); |
506 |
sysbus_init_irq(dev, &s->irq); |
507 |
sysbus_init_mmio(dev, &s->mem_ctrl); |
508 |
sysbus_init_mmio(dev, &s->mem_vram); |
509 |
|
510 |
return 0; |
511 |
} |
512 |
|
513 |
static void g364fb_sysbus_reset(DeviceState *d) |
514 |
{ |
515 |
G364SysBusState *s = DO_UPCAST(G364SysBusState, busdev.qdev, d); |
516 |
g364fb_reset(&s->g364); |
517 |
} |
518 |
|
519 |
static Property g364fb_sysbus_properties[] = {
|
520 |
DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
|
521 |
8 * 1024 * 1024), |
522 |
DEFINE_PROP_END_OF_LIST(), |
523 |
}; |
524 |
|
525 |
static void g364fb_sysbus_class_init(ObjectClass *klass, void *data) |
526 |
{ |
527 |
DeviceClass *dc = DEVICE_CLASS(klass); |
528 |
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
529 |
|
530 |
k->init = g364fb_sysbus_init; |
531 |
dc->desc = "G364 framebuffer";
|
532 |
dc->reset = g364fb_sysbus_reset; |
533 |
dc->vmsd = &vmstate_g364fb; |
534 |
dc->props = g364fb_sysbus_properties; |
535 |
} |
536 |
|
537 |
static const TypeInfo g364fb_sysbus_info = { |
538 |
.name = "sysbus-g364",
|
539 |
.parent = TYPE_SYS_BUS_DEVICE, |
540 |
.instance_size = sizeof(G364SysBusState),
|
541 |
.class_init = g364fb_sysbus_class_init, |
542 |
}; |
543 |
|
544 |
static void g364fb_register_types(void) |
545 |
{ |
546 |
type_register_static(&g364fb_sysbus_info); |
547 |
} |
548 |
|
549 |
type_init(g364fb_register_types) |