root / hw / arm_boot.c @ 2cae4119
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1 | 5fafdf24 | ths | /*
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2 | 16406950 | pbrook | * ARM kernel loader.
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3 | 16406950 | pbrook | *
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4 | 9ee6e8bb | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | 16406950 | pbrook | * Written by Paul Brook
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6 | 16406950 | pbrook | *
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7 | 8e31bf38 | Matthew Fernandez | * This code is licensed under the GPL.
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8 | 16406950 | pbrook | */
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9 | 16406950 | pbrook | |
10 | 412beee6 | Grant Likely | #include "config.h" |
11 | 87ecb68b | pbrook | #include "hw.h" |
12 | 87ecb68b | pbrook | #include "arm-misc.h" |
13 | 87ecb68b | pbrook | #include "sysemu.h" |
14 | 412beee6 | Grant Likely | #include "boards.h" |
15 | ca20cf32 | Blue Swirl | #include "loader.h" |
16 | ca20cf32 | Blue Swirl | #include "elf.h" |
17 | 412beee6 | Grant Likely | #include "device_tree.h" |
18 | 16406950 | pbrook | |
19 | 16406950 | pbrook | #define KERNEL_ARGS_ADDR 0x100 |
20 | 16406950 | pbrook | #define KERNEL_LOAD_ADDR 0x00010000 |
21 | 756ba3b0 | Peter Maydell | #define INITRD_LOAD_ADDR 0x00d00000 |
22 | 16406950 | pbrook | |
23 | 16406950 | pbrook | /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
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24 | 16406950 | pbrook | static uint32_t bootloader[] = {
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25 | 16406950 | pbrook | 0xe3a00000, /* mov r0, #0 */ |
26 | f8414cb5 | Peter Maydell | 0xe59f1004, /* ldr r1, [pc, #4] */ |
27 | f8414cb5 | Peter Maydell | 0xe59f2004, /* ldr r2, [pc, #4] */ |
28 | f8414cb5 | Peter Maydell | 0xe59ff004, /* ldr pc, [pc, #4] */ |
29 | f8414cb5 | Peter Maydell | 0, /* Board ID */ |
30 | 16406950 | pbrook | 0, /* Address of kernel args. Set by integratorcp_init. */ |
31 | 16406950 | pbrook | 0 /* Kernel entry point. Set by integratorcp_init. */ |
32 | 16406950 | pbrook | }; |
33 | 16406950 | pbrook | |
34 | 9d5ba9bf | Mark Langsdorf | /* Handling for secondary CPU boot in a multicore system.
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35 | 9d5ba9bf | Mark Langsdorf | * Unlike the uniprocessor/primary CPU boot, this is platform
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36 | 9d5ba9bf | Mark Langsdorf | * dependent. The default code here is based on the secondary
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37 | 9d5ba9bf | Mark Langsdorf | * CPU boot protocol used on realview/vexpress boards, with
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38 | 9d5ba9bf | Mark Langsdorf | * some parameterisation to increase its flexibility.
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39 | 9d5ba9bf | Mark Langsdorf | * QEMU platform models for which this code is not appropriate
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40 | 9d5ba9bf | Mark Langsdorf | * should override write_secondary_boot and secondary_cpu_reset_hook
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41 | 9d5ba9bf | Mark Langsdorf | * instead.
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42 | 9d5ba9bf | Mark Langsdorf | *
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43 | 9d5ba9bf | Mark Langsdorf | * This code enables the interrupt controllers for the secondary
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44 | 9d5ba9bf | Mark Langsdorf | * CPUs and then puts all the secondary CPUs into a loop waiting
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45 | 9d5ba9bf | Mark Langsdorf | * for an interprocessor interrupt and polling a configurable
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46 | 9d5ba9bf | Mark Langsdorf | * location for the kernel secondary CPU entry point.
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47 | 9d5ba9bf | Mark Langsdorf | */
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48 | 9ee6e8bb | pbrook | static uint32_t smpboot[] = {
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49 | 96eacf64 | Peter Maydell | 0xe59f201c, /* ldr r2, gic_cpu_if */ |
50 | 078758d0 | Evgeny Voevodin | 0xe59f001c, /* ldr r0, startaddr */ |
51 | 078758d0 | Evgeny Voevodin | 0xe3a01001, /* mov r1, #1 */ |
52 | 96eacf64 | Peter Maydell | 0xe5821000, /* str r1, [r2] */ |
53 | 9ee6e8bb | pbrook | 0xe320f003, /* wfi */ |
54 | 9ee6e8bb | pbrook | 0xe5901000, /* ldr r1, [r0] */ |
55 | be0f204a | Paul Brook | 0xe1110001, /* tst r1, r1 */ |
56 | be0f204a | Paul Brook | 0x0afffffb, /* beq <wfi> */ |
57 | f7c70325 | Paul Brook | 0xe12fff11, /* bx r1 */ |
58 | 96eacf64 | Peter Maydell | 0, /* gic_cpu_if: base address of GIC CPU interface */ |
59 | 078758d0 | Evgeny Voevodin | 0 /* bootreg: Boot register address is held here */ |
60 | 9ee6e8bb | pbrook | }; |
61 | 9ee6e8bb | pbrook | |
62 | 9543b0cd | Andreas Färber | static void default_write_secondary(ARMCPU *cpu, |
63 | 9d5ba9bf | Mark Langsdorf | const struct arm_boot_info *info) |
64 | 9d5ba9bf | Mark Langsdorf | { |
65 | 9d5ba9bf | Mark Langsdorf | int n;
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66 | 9d5ba9bf | Mark Langsdorf | smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
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67 | 96eacf64 | Peter Maydell | smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
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68 | 9d5ba9bf | Mark Langsdorf | for (n = 0; n < ARRAY_SIZE(smpboot); n++) { |
69 | 9d5ba9bf | Mark Langsdorf | smpboot[n] = tswap32(smpboot[n]); |
70 | 9d5ba9bf | Mark Langsdorf | } |
71 | 9d5ba9bf | Mark Langsdorf | rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), |
72 | 9d5ba9bf | Mark Langsdorf | info->smp_loader_start); |
73 | 9d5ba9bf | Mark Langsdorf | } |
74 | 9d5ba9bf | Mark Langsdorf | |
75 | 5d309320 | Andreas Färber | static void default_reset_secondary(ARMCPU *cpu, |
76 | 9d5ba9bf | Mark Langsdorf | const struct arm_boot_info *info) |
77 | 9d5ba9bf | Mark Langsdorf | { |
78 | 5d309320 | Andreas Färber | CPUARMState *env = &cpu->env; |
79 | 5d309320 | Andreas Färber | |
80 | 9d5ba9bf | Mark Langsdorf | stl_phys_notdirty(info->smp_bootreg_addr, 0);
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81 | 9d5ba9bf | Mark Langsdorf | env->regs[15] = info->smp_loader_start;
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82 | 9d5ba9bf | Mark Langsdorf | } |
83 | 9d5ba9bf | Mark Langsdorf | |
84 | 52b43737 | pbrook | #define WRITE_WORD(p, value) do { \ |
85 | 52b43737 | pbrook | stl_phys_notdirty(p, value); \ |
86 | 52b43737 | pbrook | p += 4; \
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87 | 52b43737 | pbrook | } while (0) |
88 | 52b43737 | pbrook | |
89 | 761c9eb0 | Stefan Weil | static void set_kernel_args(const struct arm_boot_info *info) |
90 | 16406950 | pbrook | { |
91 | 761c9eb0 | Stefan Weil | int initrd_size = info->initrd_size;
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92 | 761c9eb0 | Stefan Weil | target_phys_addr_t base = info->loader_start; |
93 | c227f099 | Anthony Liguori | target_phys_addr_t p; |
94 | 16406950 | pbrook | |
95 | 52b43737 | pbrook | p = base + KERNEL_ARGS_ADDR; |
96 | 16406950 | pbrook | /* ATAG_CORE */
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97 | 52b43737 | pbrook | WRITE_WORD(p, 5);
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98 | 52b43737 | pbrook | WRITE_WORD(p, 0x54410001);
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99 | 52b43737 | pbrook | WRITE_WORD(p, 1);
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100 | 52b43737 | pbrook | WRITE_WORD(p, 0x1000);
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101 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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102 | 16406950 | pbrook | /* ATAG_MEM */
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103 | f93eb9ff | balrog | /* TODO: handle multiple chips on one ATAG list */
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104 | 52b43737 | pbrook | WRITE_WORD(p, 4);
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105 | 52b43737 | pbrook | WRITE_WORD(p, 0x54410002);
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106 | 52b43737 | pbrook | WRITE_WORD(p, info->ram_size); |
107 | 52b43737 | pbrook | WRITE_WORD(p, info->loader_start); |
108 | 16406950 | pbrook | if (initrd_size) {
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109 | 16406950 | pbrook | /* ATAG_INITRD2 */
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110 | 52b43737 | pbrook | WRITE_WORD(p, 4);
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111 | 52b43737 | pbrook | WRITE_WORD(p, 0x54420005);
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112 | 52b43737 | pbrook | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); |
113 | 52b43737 | pbrook | WRITE_WORD(p, initrd_size); |
114 | 16406950 | pbrook | } |
115 | f93eb9ff | balrog | if (info->kernel_cmdline && *info->kernel_cmdline) {
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116 | 16406950 | pbrook | /* ATAG_CMDLINE */
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117 | 16406950 | pbrook | int cmdline_size;
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118 | 16406950 | pbrook | |
119 | f93eb9ff | balrog | cmdline_size = strlen(info->kernel_cmdline); |
120 | 52b43737 | pbrook | cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline, |
121 | 52b43737 | pbrook | cmdline_size + 1);
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122 | 16406950 | pbrook | cmdline_size = (cmdline_size >> 2) + 1; |
123 | 52b43737 | pbrook | WRITE_WORD(p, cmdline_size + 2);
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124 | 52b43737 | pbrook | WRITE_WORD(p, 0x54410009);
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125 | 52b43737 | pbrook | p += cmdline_size * 4;
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126 | 16406950 | pbrook | } |
127 | f93eb9ff | balrog | if (info->atag_board) {
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128 | f93eb9ff | balrog | /* ATAG_BOARD */
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129 | f93eb9ff | balrog | int atag_board_len;
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130 | 52b43737 | pbrook | uint8_t atag_board_buf[0x1000];
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131 | f93eb9ff | balrog | |
132 | 52b43737 | pbrook | atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3; |
133 | 52b43737 | pbrook | WRITE_WORD(p, (atag_board_len + 8) >> 2); |
134 | 52b43737 | pbrook | WRITE_WORD(p, 0x414f4d50);
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135 | 52b43737 | pbrook | cpu_physical_memory_write(p, atag_board_buf, atag_board_len); |
136 | f93eb9ff | balrog | p += atag_board_len; |
137 | f93eb9ff | balrog | } |
138 | 16406950 | pbrook | /* ATAG_END */
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139 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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140 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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141 | 16406950 | pbrook | } |
142 | 16406950 | pbrook | |
143 | 761c9eb0 | Stefan Weil | static void set_kernel_args_old(const struct arm_boot_info *info) |
144 | 2b8f2d41 | balrog | { |
145 | c227f099 | Anthony Liguori | target_phys_addr_t p; |
146 | 52b43737 | pbrook | const char *s; |
147 | 761c9eb0 | Stefan Weil | int initrd_size = info->initrd_size;
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148 | 761c9eb0 | Stefan Weil | target_phys_addr_t base = info->loader_start; |
149 | 2b8f2d41 | balrog | |
150 | 2b8f2d41 | balrog | /* see linux/include/asm-arm/setup.h */
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151 | 52b43737 | pbrook | p = base + KERNEL_ARGS_ADDR; |
152 | 2b8f2d41 | balrog | /* page_size */
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153 | 52b43737 | pbrook | WRITE_WORD(p, 4096);
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154 | 2b8f2d41 | balrog | /* nr_pages */
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155 | 52b43737 | pbrook | WRITE_WORD(p, info->ram_size / 4096);
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156 | 2b8f2d41 | balrog | /* ramdisk_size */
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157 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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158 | 2b8f2d41 | balrog | #define FLAG_READONLY 1 |
159 | 2b8f2d41 | balrog | #define FLAG_RDLOAD 4 |
160 | 2b8f2d41 | balrog | #define FLAG_RDPROMPT 8 |
161 | 2b8f2d41 | balrog | /* flags */
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162 | 52b43737 | pbrook | WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT); |
163 | 2b8f2d41 | balrog | /* rootdev */
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164 | 52b43737 | pbrook | WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */ |
165 | 2b8f2d41 | balrog | /* video_num_cols */
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166 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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167 | 2b8f2d41 | balrog | /* video_num_rows */
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168 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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169 | 2b8f2d41 | balrog | /* video_x */
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170 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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171 | 2b8f2d41 | balrog | /* video_y */
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172 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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173 | 2b8f2d41 | balrog | /* memc_control_reg */
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174 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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175 | 2b8f2d41 | balrog | /* unsigned char sounddefault */
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176 | 2b8f2d41 | balrog | /* unsigned char adfsdrives */
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177 | 2b8f2d41 | balrog | /* unsigned char bytes_per_char_h */
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178 | 2b8f2d41 | balrog | /* unsigned char bytes_per_char_v */
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179 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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180 | 2b8f2d41 | balrog | /* pages_in_bank[4] */
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181 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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182 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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183 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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184 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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185 | 2b8f2d41 | balrog | /* pages_in_vram */
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186 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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187 | 2b8f2d41 | balrog | /* initrd_start */
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188 | 2b8f2d41 | balrog | if (initrd_size)
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189 | 52b43737 | pbrook | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); |
190 | 2b8f2d41 | balrog | else
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191 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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192 | 2b8f2d41 | balrog | /* initrd_size */
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193 | 52b43737 | pbrook | WRITE_WORD(p, initrd_size); |
194 | 2b8f2d41 | balrog | /* rd_start */
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195 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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196 | 2b8f2d41 | balrog | /* system_rev */
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197 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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198 | 2b8f2d41 | balrog | /* system_serial_low */
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199 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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200 | 2b8f2d41 | balrog | /* system_serial_high */
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201 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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202 | 2b8f2d41 | balrog | /* mem_fclk_21285 */
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203 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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204 | 2b8f2d41 | balrog | /* zero unused fields */
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205 | 52b43737 | pbrook | while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) { |
206 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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207 | 52b43737 | pbrook | } |
208 | 52b43737 | pbrook | s = info->kernel_cmdline; |
209 | 52b43737 | pbrook | if (s) {
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210 | 52b43737 | pbrook | cpu_physical_memory_write(p, (void *)s, strlen(s) + 1); |
211 | 52b43737 | pbrook | } else {
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212 | 52b43737 | pbrook | WRITE_WORD(p, 0);
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213 | 52b43737 | pbrook | } |
214 | 2b8f2d41 | balrog | } |
215 | 2b8f2d41 | balrog | |
216 | 412beee6 | Grant Likely | static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo) |
217 | 412beee6 | Grant Likely | { |
218 | 412beee6 | Grant Likely | #ifdef CONFIG_FDT
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219 | 9bfa659e | Peter Maydell | uint32_t *mem_reg_property; |
220 | 9bfa659e | Peter Maydell | uint32_t mem_reg_propsize; |
221 | 412beee6 | Grant Likely | void *fdt = NULL; |
222 | 412beee6 | Grant Likely | char *filename;
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223 | 412beee6 | Grant Likely | int size, rc;
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224 | 9bfa659e | Peter Maydell | uint32_t acells, scells, hival; |
225 | 412beee6 | Grant Likely | |
226 | 412beee6 | Grant Likely | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename); |
227 | 412beee6 | Grant Likely | if (!filename) {
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228 | 412beee6 | Grant Likely | fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
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229 | 412beee6 | Grant Likely | return -1; |
230 | 412beee6 | Grant Likely | } |
231 | 412beee6 | Grant Likely | |
232 | 412beee6 | Grant Likely | fdt = load_device_tree(filename, &size); |
233 | 412beee6 | Grant Likely | if (!fdt) {
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234 | 412beee6 | Grant Likely | fprintf(stderr, "Couldn't open dtb file %s\n", filename);
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235 | 412beee6 | Grant Likely | g_free(filename); |
236 | 412beee6 | Grant Likely | return -1; |
237 | 412beee6 | Grant Likely | } |
238 | 412beee6 | Grant Likely | g_free(filename); |
239 | 412beee6 | Grant Likely | |
240 | 9bfa659e | Peter Maydell | acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells"); |
241 | 9bfa659e | Peter Maydell | scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells"); |
242 | 9bfa659e | Peter Maydell | if (acells == 0 || scells == 0) { |
243 | 9bfa659e | Peter Maydell | fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
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244 | 9bfa659e | Peter Maydell | return -1; |
245 | 9bfa659e | Peter Maydell | } |
246 | 9bfa659e | Peter Maydell | |
247 | 9bfa659e | Peter Maydell | mem_reg_propsize = acells + scells; |
248 | 9bfa659e | Peter Maydell | mem_reg_property = g_new0(uint32_t, mem_reg_propsize); |
249 | 9bfa659e | Peter Maydell | mem_reg_property[acells - 1] = cpu_to_be32(binfo->loader_start);
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250 | 9bfa659e | Peter Maydell | hival = cpu_to_be32(binfo->loader_start >> 32);
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251 | 9bfa659e | Peter Maydell | if (acells > 1) { |
252 | 9bfa659e | Peter Maydell | mem_reg_property[acells - 2] = hival;
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253 | 9bfa659e | Peter Maydell | } else if (hival != 0) { |
254 | 9bfa659e | Peter Maydell | fprintf(stderr, "qemu: dtb file not compatible with "
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255 | 9bfa659e | Peter Maydell | "RAM start address > 4GB\n");
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256 | 9bfa659e | Peter Maydell | exit(1);
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257 | 9bfa659e | Peter Maydell | } |
258 | 9bfa659e | Peter Maydell | mem_reg_property[acells + scells - 1] = cpu_to_be32(binfo->ram_size);
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259 | 9bfa659e | Peter Maydell | hival = cpu_to_be32(binfo->ram_size >> 32);
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260 | 9bfa659e | Peter Maydell | if (scells > 1) { |
261 | 9bfa659e | Peter Maydell | mem_reg_property[acells + scells - 2] = hival;
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262 | 9bfa659e | Peter Maydell | } else if (hival != 0) { |
263 | 9bfa659e | Peter Maydell | fprintf(stderr, "qemu: dtb file not compatible with "
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264 | 9bfa659e | Peter Maydell | "RAM size > 4GB\n");
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265 | 9bfa659e | Peter Maydell | exit(1);
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266 | 9bfa659e | Peter Maydell | } |
267 | 9bfa659e | Peter Maydell | |
268 | 412beee6 | Grant Likely | rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property, |
269 | 9bfa659e | Peter Maydell | mem_reg_propsize * sizeof(uint32_t));
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270 | 412beee6 | Grant Likely | if (rc < 0) { |
271 | 412beee6 | Grant Likely | fprintf(stderr, "couldn't set /memory/reg\n");
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272 | 412beee6 | Grant Likely | } |
273 | 412beee6 | Grant Likely | |
274 | 5e87975c | Peter A. G. Crosthwaite | if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
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275 | 5e87975c | Peter A. G. Crosthwaite | rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", |
276 | 5e87975c | Peter A. G. Crosthwaite | binfo->kernel_cmdline); |
277 | 5e87975c | Peter A. G. Crosthwaite | if (rc < 0) { |
278 | 5e87975c | Peter A. G. Crosthwaite | fprintf(stderr, "couldn't set /chosen/bootargs\n");
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279 | 5e87975c | Peter A. G. Crosthwaite | } |
280 | 412beee6 | Grant Likely | } |
281 | 412beee6 | Grant Likely | |
282 | 412beee6 | Grant Likely | if (binfo->initrd_size) {
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283 | 412beee6 | Grant Likely | rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start", |
284 | 412beee6 | Grant Likely | binfo->loader_start + INITRD_LOAD_ADDR); |
285 | 412beee6 | Grant Likely | if (rc < 0) { |
286 | 412beee6 | Grant Likely | fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
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287 | 412beee6 | Grant Likely | } |
288 | 412beee6 | Grant Likely | |
289 | 412beee6 | Grant Likely | rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end", |
290 | 412beee6 | Grant Likely | binfo->loader_start + INITRD_LOAD_ADDR + |
291 | 412beee6 | Grant Likely | binfo->initrd_size); |
292 | 412beee6 | Grant Likely | if (rc < 0) { |
293 | 412beee6 | Grant Likely | fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
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294 | 412beee6 | Grant Likely | } |
295 | 412beee6 | Grant Likely | } |
296 | 412beee6 | Grant Likely | |
297 | 412beee6 | Grant Likely | cpu_physical_memory_write(addr, fdt, size); |
298 | 412beee6 | Grant Likely | |
299 | 412beee6 | Grant Likely | return 0; |
300 | 412beee6 | Grant Likely | |
301 | 412beee6 | Grant Likely | #else
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302 | 412beee6 | Grant Likely | fprintf(stderr, "Device tree requested, "
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303 | 412beee6 | Grant Likely | "but qemu was compiled without fdt support\n");
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304 | 412beee6 | Grant Likely | return -1; |
305 | 412beee6 | Grant Likely | #endif
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306 | 412beee6 | Grant Likely | } |
307 | 412beee6 | Grant Likely | |
308 | 6ed221b6 | Adam Lackorzynski | static void do_cpu_reset(void *opaque) |
309 | f2d74978 | Paul Brook | { |
310 | 351d5666 | Andreas Färber | ARMCPU *cpu = opaque; |
311 | 351d5666 | Andreas Färber | CPUARMState *env = &cpu->env; |
312 | 462a8bc6 | Stefan Weil | const struct arm_boot_info *info = env->boot_info; |
313 | f2d74978 | Paul Brook | |
314 | 351d5666 | Andreas Färber | cpu_reset(CPU(cpu)); |
315 | f2d74978 | Paul Brook | if (info) {
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316 | f2d74978 | Paul Brook | if (!info->is_linux) {
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317 | f2d74978 | Paul Brook | /* Jump to the entry point. */
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318 | f2d74978 | Paul Brook | env->regs[15] = info->entry & 0xfffffffe; |
319 | f2d74978 | Paul Brook | env->thumb = info->entry & 1;
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320 | f2d74978 | Paul Brook | } else {
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321 | 6ed221b6 | Adam Lackorzynski | if (env == first_cpu) {
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322 | 6ed221b6 | Adam Lackorzynski | env->regs[15] = info->loader_start;
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323 | 412beee6 | Grant Likely | if (!info->dtb_filename) {
|
324 | 412beee6 | Grant Likely | if (old_param) {
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325 | 412beee6 | Grant Likely | set_kernel_args_old(info); |
326 | 412beee6 | Grant Likely | } else {
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327 | 412beee6 | Grant Likely | set_kernel_args(info); |
328 | 412beee6 | Grant Likely | } |
329 | 6ed221b6 | Adam Lackorzynski | } |
330 | f2d74978 | Paul Brook | } else {
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331 | 5d309320 | Andreas Färber | info->secondary_cpu_reset_hook(cpu, info); |
332 | f2d74978 | Paul Brook | } |
333 | f2d74978 | Paul Brook | } |
334 | f2d74978 | Paul Brook | } |
335 | f2d74978 | Paul Brook | } |
336 | f2d74978 | Paul Brook | |
337 | 3aaa8dfa | Andreas Färber | void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) |
338 | 16406950 | pbrook | { |
339 | 3aaa8dfa | Andreas Färber | CPUARMState *env = &cpu->env; |
340 | 16406950 | pbrook | int kernel_size;
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341 | 16406950 | pbrook | int initrd_size;
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342 | 16406950 | pbrook | int n;
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343 | 1c7b3754 | pbrook | int is_linux = 0; |
344 | 1c7b3754 | pbrook | uint64_t elf_entry; |
345 | c227f099 | Anthony Liguori | target_phys_addr_t entry; |
346 | ca20cf32 | Blue Swirl | int big_endian;
|
347 | 412beee6 | Grant Likely | QemuOpts *machine_opts; |
348 | 16406950 | pbrook | |
349 | 16406950 | pbrook | /* Load the kernel. */
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350 | f93eb9ff | balrog | if (!info->kernel_filename) {
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351 | 16406950 | pbrook | fprintf(stderr, "Kernel image must be specified\n");
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352 | 16406950 | pbrook | exit(1);
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353 | 16406950 | pbrook | } |
354 | daf90626 | pbrook | |
355 | 412beee6 | Grant Likely | machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0); |
356 | 412beee6 | Grant Likely | if (machine_opts) {
|
357 | 412beee6 | Grant Likely | info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
|
358 | 412beee6 | Grant Likely | } else {
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359 | 412beee6 | Grant Likely | info->dtb_filename = NULL;
|
360 | 412beee6 | Grant Likely | } |
361 | 412beee6 | Grant Likely | |
362 | 9d5ba9bf | Mark Langsdorf | if (!info->secondary_cpu_reset_hook) {
|
363 | 9d5ba9bf | Mark Langsdorf | info->secondary_cpu_reset_hook = default_reset_secondary; |
364 | 9d5ba9bf | Mark Langsdorf | } |
365 | 9d5ba9bf | Mark Langsdorf | if (!info->write_secondary_boot) {
|
366 | 9d5ba9bf | Mark Langsdorf | info->write_secondary_boot = default_write_secondary; |
367 | 9d5ba9bf | Mark Langsdorf | } |
368 | 9d5ba9bf | Mark Langsdorf | |
369 | f2d74978 | Paul Brook | if (info->nb_cpus == 0) |
370 | f2d74978 | Paul Brook | info->nb_cpus = 1;
|
371 | f93eb9ff | balrog | |
372 | ca20cf32 | Blue Swirl | #ifdef TARGET_WORDS_BIGENDIAN
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373 | ca20cf32 | Blue Swirl | big_endian = 1;
|
374 | ca20cf32 | Blue Swirl | #else
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375 | ca20cf32 | Blue Swirl | big_endian = 0;
|
376 | ca20cf32 | Blue Swirl | #endif
|
377 | ca20cf32 | Blue Swirl | |
378 | 1c7b3754 | pbrook | /* Assume that raw images are linux kernels, and ELF images are not. */
|
379 | 409dbce5 | Aurelien Jarno | kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry, |
380 | 409dbce5 | Aurelien Jarno | NULL, NULL, big_endian, ELF_MACHINE, 1); |
381 | 1c7b3754 | pbrook | entry = elf_entry; |
382 | 1c7b3754 | pbrook | if (kernel_size < 0) { |
383 | 5a9154e0 | aliguori | kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
|
384 | 5a9154e0 | aliguori | &is_linux); |
385 | 1c7b3754 | pbrook | } |
386 | 1c7b3754 | pbrook | if (kernel_size < 0) { |
387 | f93eb9ff | balrog | entry = info->loader_start + KERNEL_LOAD_ADDR; |
388 | 3b760e04 | pbrook | kernel_size = load_image_targphys(info->kernel_filename, entry, |
389 | 0b944384 | Peter Maydell | info->ram_size - KERNEL_LOAD_ADDR); |
390 | 1c7b3754 | pbrook | is_linux = 1;
|
391 | 1c7b3754 | pbrook | } |
392 | 1c7b3754 | pbrook | if (kernel_size < 0) { |
393 | f93eb9ff | balrog | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
394 | f93eb9ff | balrog | info->kernel_filename); |
395 | 1c7b3754 | pbrook | exit(1);
|
396 | 1c7b3754 | pbrook | } |
397 | f2d74978 | Paul Brook | info->entry = entry; |
398 | f2d74978 | Paul Brook | if (is_linux) {
|
399 | f93eb9ff | balrog | if (info->initrd_filename) {
|
400 | 3b760e04 | pbrook | initrd_size = load_image_targphys(info->initrd_filename, |
401 | 3b760e04 | pbrook | info->loader_start |
402 | 3b760e04 | pbrook | + INITRD_LOAD_ADDR, |
403 | 0b944384 | Peter Maydell | info->ram_size |
404 | 0b944384 | Peter Maydell | - INITRD_LOAD_ADDR); |
405 | daf90626 | pbrook | if (initrd_size < 0) { |
406 | daf90626 | pbrook | fprintf(stderr, "qemu: could not load initrd '%s'\n",
|
407 | f93eb9ff | balrog | info->initrd_filename); |
408 | daf90626 | pbrook | exit(1);
|
409 | daf90626 | pbrook | } |
410 | daf90626 | pbrook | } else {
|
411 | daf90626 | pbrook | initrd_size = 0;
|
412 | daf90626 | pbrook | } |
413 | 412beee6 | Grant Likely | info->initrd_size = initrd_size; |
414 | 412beee6 | Grant Likely | |
415 | f8414cb5 | Peter Maydell | bootloader[4] = info->board_id;
|
416 | 412beee6 | Grant Likely | |
417 | 412beee6 | Grant Likely | /* for device tree boot, we pass the DTB directly in r2. Otherwise
|
418 | 412beee6 | Grant Likely | * we point to the kernel args.
|
419 | 412beee6 | Grant Likely | */
|
420 | 412beee6 | Grant Likely | if (info->dtb_filename) {
|
421 | 412beee6 | Grant Likely | /* Place the DTB after the initrd in memory */
|
422 | 412beee6 | Grant Likely | target_phys_addr_t dtb_start = TARGET_PAGE_ALIGN(info->loader_start |
423 | 412beee6 | Grant Likely | + INITRD_LOAD_ADDR |
424 | 412beee6 | Grant Likely | + initrd_size); |
425 | 412beee6 | Grant Likely | if (load_dtb(dtb_start, info)) {
|
426 | 412beee6 | Grant Likely | exit(1);
|
427 | 412beee6 | Grant Likely | } |
428 | 412beee6 | Grant Likely | bootloader[5] = dtb_start;
|
429 | 412beee6 | Grant Likely | } else {
|
430 | 412beee6 | Grant Likely | bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
|
431 | 3871481c | Peter Maydell | if (info->ram_size >= (1ULL << 32)) { |
432 | 3871481c | Peter Maydell | fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
|
433 | 3871481c | Peter Maydell | " Linux kernel using ATAGS (try passing a device tree"
|
434 | 3871481c | Peter Maydell | " using -dtb)\n");
|
435 | 3871481c | Peter Maydell | exit(1);
|
436 | 3871481c | Peter Maydell | } |
437 | 412beee6 | Grant Likely | } |
438 | 1c7b3754 | pbrook | bootloader[6] = entry;
|
439 | 52b43737 | pbrook | for (n = 0; n < sizeof(bootloader) / 4; n++) { |
440 | f2d74978 | Paul Brook | bootloader[n] = tswap32(bootloader[n]); |
441 | 52b43737 | pbrook | } |
442 | f2d74978 | Paul Brook | rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader), |
443 | f2d74978 | Paul Brook | info->loader_start); |
444 | 52b43737 | pbrook | if (info->nb_cpus > 1) { |
445 | 9543b0cd | Andreas Färber | info->write_secondary_boot(cpu, info); |
446 | 52b43737 | pbrook | } |
447 | 16406950 | pbrook | } |
448 | f2d74978 | Paul Brook | info->is_linux = is_linux; |
449 | 6ed221b6 | Adam Lackorzynski | |
450 | 6ed221b6 | Adam Lackorzynski | for (; env; env = env->next_cpu) {
|
451 | 351d5666 | Andreas Färber | cpu = arm_env_get_cpu(env); |
452 | 6ed221b6 | Adam Lackorzynski | env->boot_info = info; |
453 | 351d5666 | Andreas Färber | qemu_register_reset(do_cpu_reset, cpu); |
454 | 6ed221b6 | Adam Lackorzynski | } |
455 | 16406950 | pbrook | } |