Revision 2cf3eb6d

b/hw/ppc/spapr.c
801 801
        /* Set time-base frequency to 512 MHz */
802 802
        cpu_ppc_tb_init(env, TIMEBASE_FREQ);
803 803

  
804
        /* PAPR always has exception vectors in RAM not ROM */
805
        env->hreset_excp_prefix = 0;
804
        /* PAPR always has exception vectors in RAM not ROM. To ensure this,
805
         * MSR[IP] should never be set.
806
         */
807
        env->msr_mask &= ~(1 << 6);
806 808

  
807 809
        /* Tell KVM that we're in PAPR mode */
808 810
        if (kvm_enabled()) {
b/target-ppc/cpu.h
1026 1026
    /* Exception vectors */
1027 1027
    target_ulong excp_vectors[POWERPC_EXCP_NB];
1028 1028
    target_ulong excp_prefix;
1029
    target_ulong hreset_excp_prefix;
1030 1029
    target_ulong ivor_mask;
1031 1030
    target_ulong ivpr_mask;
1032 1031
    target_ulong hreset_vector;
b/target-ppc/machine.c
78 78
    for (i = 0; i < POWERPC_EXCP_NB; i++)
79 79
        qemu_put_betls(f, &env->excp_vectors[i]);
80 80
    qemu_put_betls(f, &env->excp_prefix);
81
    qemu_put_betls(f, &env->hreset_excp_prefix);
82 81
    qemu_put_betls(f, &env->ivor_mask);
83 82
    qemu_put_betls(f, &env->ivpr_mask);
84 83
    qemu_put_betls(f, &env->hreset_vector);
......
167 166
    for (i = 0; i < POWERPC_EXCP_NB; i++)
168 167
        qemu_get_betls(f, &env->excp_vectors[i]);
169 168
    qemu_get_betls(f, &env->excp_prefix);
170
    qemu_get_betls(f, &env->hreset_excp_prefix);
171 169
    qemu_get_betls(f, &env->ivor_mask);
172 170
    qemu_get_betls(f, &env->ivpr_mask);
173 171
    qemu_get_betls(f, &env->hreset_vector);
b/target-ppc/translate_init.c
2593 2593
    env->excp_vectors[POWERPC_EXCP_FIT]      = 0x00001010;
2594 2594
    env->excp_vectors[POWERPC_EXCP_WDT]      = 0x00001020;
2595 2595
    env->excp_vectors[POWERPC_EXCP_DEBUG]    = 0x00002000;
2596
    env->hreset_excp_prefix = 0x00000000UL;
2597 2596
    env->ivor_mask = 0x0000FFF0UL;
2598 2597
    env->ivpr_mask = 0xFFFF0000UL;
2599 2598
    /* Hardware reset vector */
......
2618 2617
    env->excp_vectors[POWERPC_EXCP_DTLB]     = 0x00001100;
2619 2618
    env->excp_vectors[POWERPC_EXCP_ITLB]     = 0x00001200;
2620 2619
    env->excp_vectors[POWERPC_EXCP_DEBUG]    = 0x00002000;
2621
    env->hreset_excp_prefix = 0x00000000UL;
2622 2620
    env->ivor_mask = 0x0000FFF0UL;
2623 2621
    env->ivpr_mask = 0xFFFF0000UL;
2624 2622
    /* Hardware reset vector */
......
2644 2642
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001C00;
2645 2643
    env->excp_vectors[POWERPC_EXCP_MEXTBR]   = 0x00001E00;
2646 2644
    env->excp_vectors[POWERPC_EXCP_NMEXTBR]  = 0x00001F00;
2647
    env->hreset_excp_prefix = 0x00000000UL;
2648 2645
    env->ivor_mask = 0x0000FFF0UL;
2649 2646
    env->ivpr_mask = 0xFFFF0000UL;
2650 2647
    /* Hardware reset vector */
......
2676 2673
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001C00;
2677 2674
    env->excp_vectors[POWERPC_EXCP_MEXTBR]   = 0x00001E00;
2678 2675
    env->excp_vectors[POWERPC_EXCP_NMEXTBR]  = 0x00001F00;
2679
    env->hreset_excp_prefix = 0x00000000UL;
2680 2676
    env->ivor_mask = 0x0000FFF0UL;
2681 2677
    env->ivpr_mask = 0xFFFF0000UL;
2682 2678
    /* Hardware reset vector */
......
2704 2700
    env->excp_vectors[POWERPC_EXCP_DSTLB]    = 0x00001200;
2705 2701
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2706 2702
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2707
    env->hreset_excp_prefix = 0x00000000UL;
2708 2703
    /* Hardware reset vector */
2709 2704
    env->hreset_vector = 0xFFFFFFFCUL;
2710 2705
#endif
......
2733 2728
    env->excp_vectors[POWERPC_EXCP_SPEU]     = 0x00000000;
2734 2729
    env->excp_vectors[POWERPC_EXCP_EFPDI]    = 0x00000000;
2735 2730
    env->excp_vectors[POWERPC_EXCP_EFPRI]    = 0x00000000;
2736
    env->hreset_excp_prefix = 0x00000000UL;
2737 2731
    env->ivor_mask = 0x0000FFF7UL;
2738 2732
    env->ivpr_mask = ivpr_mask;
2739 2733
    /* Hardware reset vector */
......
2760 2754
    env->excp_vectors[POWERPC_EXCP_DTLB]     = 0x00000000;
2761 2755
    env->excp_vectors[POWERPC_EXCP_ITLB]     = 0x00000000;
2762 2756
    env->excp_vectors[POWERPC_EXCP_DEBUG]    = 0x00000000;
2763
    env->hreset_excp_prefix = 0x00000000UL;
2764 2757
    env->ivor_mask = 0x0000FFE0UL;
2765 2758
    env->ivpr_mask = 0xFFFF0000UL;
2766 2759
    /* Hardware reset vector */
......
2783 2776
    env->excp_vectors[POWERPC_EXCP_IO]       = 0x00000A00;
2784 2777
    env->excp_vectors[POWERPC_EXCP_SYSCALL]  = 0x00000C00;
2785 2778
    env->excp_vectors[POWERPC_EXCP_RUNM]     = 0x00002000;
2786
    env->hreset_excp_prefix = 0xFFF00000UL;
2787 2779
    /* Hardware reset vector */
2788 2780
    env->hreset_vector = 0x00000100UL;
2789 2781
#endif
......
2811 2803
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2812 2804
    env->excp_vectors[POWERPC_EXCP_WDT]      = 0x00001500;
2813 2805
    env->excp_vectors[POWERPC_EXCP_EMUL]     = 0x00001600;
2814
    env->hreset_excp_prefix = 0xFFF00000UL;
2815 2806
    /* Hardware reset vector */
2816 2807
    env->hreset_vector = 0xFFFFFFFCUL;
2817 2808
#endif
......
2836 2827
    env->excp_vectors[POWERPC_EXCP_DSTLB]    = 0x00001200;
2837 2828
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2838 2829
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2839
    env->hreset_excp_prefix = 0x00000000UL;
2840 2830
    /* Hardware reset vector */
2841 2831
    env->hreset_vector = 0xFFFFFFFCUL;
2842 2832
#endif
......
2859 2849
    env->excp_vectors[POWERPC_EXCP_PERFM]    = 0x00000F00;
2860 2850
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2861 2851
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2862
    env->hreset_excp_prefix = 0xFFF00000UL;
2863 2852
    /* Hardware reset vector */
2864 2853
    env->hreset_vector = 0x00000100UL;
2865 2854
#endif
......
2883 2872
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2884 2873
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2885 2874
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001700;
2886
    env->hreset_excp_prefix = 0x00000000UL;
2887 2875
    /* Hardware reset vector */
2888 2876
    env->hreset_vector = 0xFFFFFFFCUL;
2889 2877
#endif
......
2906 2894
    env->excp_vectors[POWERPC_EXCP_PERFM]    = 0x00000F00;
2907 2895
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2908 2896
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2909
    env->hreset_excp_prefix = 0x00000000UL;
2910 2897
    /* Hardware reset vector */
2911 2898
    env->hreset_vector = 0xFFFFFFFCUL;
2912 2899
#endif
......
2929 2916
    env->excp_vectors[POWERPC_EXCP_PERFM]    = 0x00000F00;
2930 2917
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2931 2918
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001700;
2932
    env->hreset_excp_prefix = 0x00000000UL;
2933 2919
    /* Hardware reset vector */
2934 2920
    env->hreset_vector = 0xFFFFFFFCUL;
2935 2921
#endif
......
2957 2943
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
2958 2944
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2959 2945
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001700;
2960
    env->hreset_excp_prefix = 0x00000000UL;
2961 2946
    /* Hardware reset vector */
2962 2947
    env->hreset_vector = 0xFFFFFFFCUL;
2963 2948
#endif
......
2983 2968
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
2984 2969
    env->excp_vectors[POWERPC_EXCP_VPUA]     = 0x00001600;
2985 2970
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001700;
2986
    env->hreset_excp_prefix = 0x00000000UL;
2987 2971
    /* Hardware reset vector */
2988 2972
    env->hreset_vector = 0xFFFFFFFCUL;
2989 2973
#endif
......
3011 2995
    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;
3012 2996
    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
3013 2997
    env->excp_vectors[POWERPC_EXCP_VPUA]     = 0x00001600;
3014
    env->hreset_excp_prefix = 0x00000000UL;
3015 2998
    /* Hardware reset vector */
3016 2999
    env->hreset_vector = 0xFFFFFFFCUL;
3017 3000
#endif
......
3041 3024
    env->excp_vectors[POWERPC_EXCP_MAINT]    = 0x00001600;
3042 3025
    env->excp_vectors[POWERPC_EXCP_VPUA]     = 0x00001700;
3043 3026
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001800;
3044
    env->hreset_excp_prefix = 0x00000000FFF00000ULL;
3045 3027
    /* Hardware reset vector */
3046 3028
    env->hreset_vector = 0x0000000000000100ULL;
3047 3029
#endif
......
3070 3052
    env->excp_vectors[POWERPC_EXCP_MAINT]    = 0x00001600;
3071 3053
    env->excp_vectors[POWERPC_EXCP_VPUA]     = 0x00001700;
3072 3054
    env->excp_vectors[POWERPC_EXCP_THERM]    = 0x00001800;
3073
    env->hreset_excp_prefix = 0;
3074 3055
    /* Hardware reset vector */
3075 3056
    env->hreset_vector = 0x0000000000000100ULL;
3076 3057
#endif
......
7043 7024
    /* Set all exception vectors to an invalid address */
7044 7025
    for (i = 0; i < POWERPC_EXCP_NB; i++)
7045 7026
        env->excp_vectors[i] = (target_ulong)(-1ULL);
7046
    env->hreset_excp_prefix = 0x00000000;
7047 7027
    env->ivor_mask = 0x00000000;
7048 7028
    env->ivpr_mask = 0x00000000;
7049 7029
    /* Default MMU definitions */
......
7080 7060
    }
7081 7061
    /* PowerPC implementation specific initialisations (SPRs, timers, ...) */
7082 7062
    (*pcc->init_proc)(env);
7083
#if !defined(CONFIG_USER_ONLY)
7084
    env->excp_prefix = env->hreset_excp_prefix;
7085
#endif
7063

  
7086 7064
    /* MSR bits & flags consistency checks */
7087 7065
    if (env->msr_mask & (1 << 25)) {
7088 7066
        switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
......
8182 8160
    msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */
8183 8161
    msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */
8184 8162
    msr |= (target_ulong)1 << MSR_PR;
8185
#else
8186
    env->excp_prefix = env->hreset_excp_prefix;
8187
    env->nip = env->hreset_vector | env->excp_prefix;
8188
    if (env->mmu_model != POWERPC_MMU_REAL) {
8189
        ppc_tlb_invalidate_all(env);
8190
    }
8191 8163
#endif
8192
    env->msr = msr & env->msr_mask;
8164

  
8193 8165
#if defined(TARGET_PPC64)
8194 8166
    if (env->mmu_model & POWERPC_MMU_64) {
8195 8167
        env->msr |= (1ULL << MSR_SF);
8196 8168
    }
8197 8169
#endif
8170

  
8171
    hreg_store_msr(env, msr, 1);
8172

  
8173
#if !defined(CONFIG_USER_ONLY)
8174
    env->nip = env->hreset_vector | env->excp_prefix;
8175
    if (env->mmu_model != POWERPC_MMU_REAL) {
8176
        ppc_tlb_invalidate_all(env);
8177
    }
8178
#endif
8179

  
8198 8180
    hreg_compute_hflags(env);
8199 8181
    env->reserve_addr = (target_ulong)-1ULL;
8200 8182
    /* Be sure no exception or interrupt is pending */

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