Revision 2d1e9f96
| b/hw/pci.c | ||
|---|---|---|
| 73 | 73 |
static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU; |
| 74 | 74 |
static PCIBus *first_bus; |
| 75 | 75 |
|
| 76 |
static void pcibus_save(QEMUFile *f, void *opaque) |
|
| 77 |
{
|
|
| 78 |
PCIBus *bus = (PCIBus *)opaque; |
|
| 79 |
int i; |
|
| 80 |
|
|
| 81 |
qemu_put_be32(f, bus->nirq); |
|
| 82 |
for (i = 0; i < bus->nirq; i++) |
|
| 83 |
qemu_put_be32(f, bus->irq_count[i]); |
|
| 84 |
} |
|
| 85 |
|
|
| 86 |
static int pcibus_load(QEMUFile *f, void *opaque, int version_id) |
|
| 87 |
{
|
|
| 88 |
PCIBus *bus = (PCIBus *)opaque; |
|
| 89 |
int i, nirq; |
|
| 90 |
|
|
| 91 |
if (version_id != 1) |
|
| 92 |
return -EINVAL; |
|
| 93 |
|
|
| 94 |
nirq = qemu_get_be32(f); |
|
| 95 |
if (bus->nirq != nirq) {
|
|
| 96 |
fprintf(stderr, "pcibus_load: nirq mismatch: src=%d dst=%d\n", |
|
| 97 |
nirq, bus->nirq); |
|
| 98 |
return -EINVAL; |
|
| 76 |
static const VMStateDescription vmstate_pcibus = {
|
|
| 77 |
.name = "PCIBUS", |
|
| 78 |
.version_id = 1, |
|
| 79 |
.minimum_version_id = 1, |
|
| 80 |
.minimum_version_id_old = 1, |
|
| 81 |
.fields = (VMStateField []) {
|
|
| 82 |
VMSTATE_INT32_EQUAL(nirq, PCIBus), |
|
| 83 |
VMSTATE_INT32_VARRAY(irq_count, PCIBus, nirq), |
|
| 84 |
VMSTATE_END_OF_LIST() |
|
| 99 | 85 |
} |
| 100 |
|
|
| 101 |
for (i = 0; i < nirq; i++) |
|
| 102 |
bus->irq_count[i] = qemu_get_be32(f); |
|
| 103 |
|
|
| 104 |
return 0; |
|
| 105 |
} |
|
| 86 |
}; |
|
| 106 | 87 |
|
| 107 | 88 |
static void pci_bus_reset(void *opaque) |
| 108 | 89 |
{
|
| ... | ... | |
| 135 | 116 |
bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0])); |
| 136 | 117 |
bus->next = first_bus; |
| 137 | 118 |
first_bus = bus; |
| 138 |
register_savevm("PCIBUS", nbus++, 1, pcibus_save, pcibus_load, bus);
|
|
| 119 |
vmstate_register(nbus++, &vmstate_pcibus, bus);
|
|
| 139 | 120 |
qemu_register_reset(pci_bus_reset, bus); |
| 140 | 121 |
return bus; |
| 141 | 122 |
} |
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