| 45 |
45 |
void *irq_opaque;
|
| 46 |
46 |
PCIDevice *devices[256];
|
| 47 |
47 |
PCIDevice *parent_dev;
|
|
48 |
target_phys_addr_t mem_base;
|
| 48 |
49 |
|
| 49 |
50 |
QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
|
| 50 |
51 |
QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
|
| ... | ... | |
| 72 |
73 |
static void pci_set_irq(void *opaque, int irq_num, int level);
|
| 73 |
74 |
static int pci_add_option_rom(PCIDevice *pdev);
|
| 74 |
75 |
|
| 75 |
|
target_phys_addr_t pci_mem_base;
|
| 76 |
76 |
static uint16_t pci_default_sub_vendor_id = PCI_SUBVENDOR_ID_REDHAT_QUMRANET;
|
| 77 |
77 |
static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU;
|
| 78 |
78 |
|
| ... | ... | |
| 238 |
238 |
bus->hotplug = hotplug;
|
| 239 |
239 |
}
|
| 240 |
240 |
|
|
241 |
void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
|
|
242 |
{
|
|
243 |
bus->mem_base = base;
|
|
244 |
}
|
|
245 |
|
| 241 |
246 |
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
|
| 242 |
247 |
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
|
| 243 |
248 |
void *irq_opaque, int devfn_min, int nirq)
|
| ... | ... | |
| 634 |
639 |
}
|
| 635 |
640 |
return pci_dev;
|
| 636 |
641 |
}
|
| 637 |
|
static target_phys_addr_t pci_to_cpu_addr(target_phys_addr_t addr)
|
|
642 |
|
|
643 |
static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
|
|
644 |
target_phys_addr_t addr)
|
| 638 |
645 |
{
|
| 639 |
|
return addr + pci_mem_base;
|
|
646 |
return addr + bus->mem_base;
|
| 640 |
647 |
}
|
| 641 |
648 |
|
| 642 |
649 |
static void pci_unregister_io_regions(PCIDevice *pci_dev)
|
| ... | ... | |
| 651 |
658 |
if (r->type == PCI_BASE_ADDRESS_SPACE_IO) {
|
| 652 |
659 |
isa_unassign_ioport(r->addr, r->filtered_size);
|
| 653 |
660 |
} else {
|
| 654 |
|
cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
|
| 655 |
|
r->filtered_size,
|
| 656 |
|
IO_MEM_UNASSIGNED);
|
|
661 |
cpu_register_physical_memory(pci_to_cpu_addr(pci_dev->bus,
|
|
662 |
r->addr),
|
|
663 |
r->filtered_size,
|
|
664 |
IO_MEM_UNASSIGNED);
|
| 657 |
665 |
}
|
| 658 |
666 |
}
|
| 659 |
667 |
}
|
| ... | ... | |
| 891 |
899 |
{
|
| 892 |
900 |
PCIIORegion *r;
|
| 893 |
901 |
int i;
|
| 894 |
|
pcibus_t new_addr, filtered_size;
|
|
902 |
pcibus_t new_addr, filtered_size, bus_addr;
|
| 895 |
903 |
|
| 896 |
904 |
for(i = 0; i < PCI_NUM_REGIONS; i++) {
|
| 897 |
905 |
r = &d->io_regions[i];
|
| ... | ... | |
| 913 |
921 |
continue;
|
| 914 |
922 |
|
| 915 |
923 |
/* now do the real mapping */
|
|
924 |
bus_addr = r->addr;
|
| 916 |
925 |
if (r->addr != PCI_BAR_UNMAPPED) {
|
| 917 |
926 |
if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
|
| 918 |
927 |
int class;
|
| ... | ... | |
| 925 |
934 |
isa_unassign_ioport(r->addr, r->filtered_size);
|
| 926 |
935 |
}
|
| 927 |
936 |
} else {
|
| 928 |
|
cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
|
|
937 |
bus_addr = pci_to_cpu_addr(d->bus, r->addr);
|
|
938 |
cpu_register_physical_memory(bus_addr,
|
| 929 |
939 |
r->filtered_size,
|
| 930 |
940 |
IO_MEM_UNASSIGNED);
|
| 931 |
941 |
qemu_unregister_coalesced_mmio(r->addr, r->filtered_size);
|
| ... | ... | |
| 941 |
951 |
* Teach them such cases, such that filtered_size < size and
|
| 942 |
952 |
* addr & (size - 1) != 0.
|
| 943 |
953 |
*/
|
| 944 |
|
r->map_func(d, i, r->addr, r->filtered_size, r->type);
|
|
954 |
r->map_func(d, i, bus_addr, r->filtered_size, r->type);
|
| 945 |
955 |
}
|
| 946 |
956 |
}
|
| 947 |
957 |
}
|