Revision 2e134c9c
b/target-arm/op.c | ||
---|---|---|
368 | 368 |
void OPPROTO op_mull_T0_T1(void) |
369 | 369 |
{ |
370 | 370 |
uint64_t res; |
371 |
res = T0 * T1;
|
|
371 |
res = (uint64_t)T0 * (uint64_t)T1;
|
|
372 | 372 |
T1 = res >> 32; |
373 | 373 |
T0 = res; |
374 | 374 |
} |
... | ... | |
377 | 377 |
void OPPROTO op_imull_T0_T1(void) |
378 | 378 |
{ |
379 | 379 |
uint64_t res; |
380 |
res = (int32_t)T0 * (int32_t)T1;
|
|
380 |
res = (int64_t)T0 * (int64_t)T1;
|
|
381 | 381 |
T1 = res >> 32; |
382 | 382 |
T0 = res; |
383 | 383 |
} |
b/target-arm/translate.c | ||
---|---|---|
516 | 516 |
gen_movl_T0_reg(s, rs); |
517 | 517 |
gen_movl_T1_reg(s, rm); |
518 | 518 |
if (insn & (1 << 22)) |
519 |
gen_op_mull_T0_T1(); |
|
520 |
else |
|
521 | 519 |
gen_op_imull_T0_T1(); |
520 |
else |
|
521 |
gen_op_mull_T0_T1(); |
|
522 | 522 |
if (insn & (1 << 21)) |
523 | 523 |
gen_op_addq_T0_T1(rn, rd); |
524 | 524 |
if (insn & (1 << 20)) |
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