Revision 2e4d7e3e target-arm/cpu.c
| b/target-arm/cpu.c | ||
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| 130 | 130 |
static void arm1136_r2_initfn(Object *obj) |
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{
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ARMCPU *cpu = ARM_CPU(obj); |
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/* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an |
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* older core than plain "arm1136". In particular this does not |
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* have the v6K features. |
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* These ID register values are correct for 1136 but may be wrong |
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* for 1136_r2 (in particular r0p2 does not actually implement most |
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* of the ID registers). |
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*/ |
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set_feature(&cpu->env, ARM_FEATURE_V6); |
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set_feature(&cpu->env, ARM_FEATURE_VFP); |
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cpu->midr = ARM_CPUID_ARM1136_R2; |
| ... | ... | |
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cpu->mvfr1 = 0x00000000; |
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cpu->ctr = 0x1dd20d2; |
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cpu->reset_sctlr = 0x00050078; |
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cpu->id_pfr0 = 0x111; |
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cpu->id_pfr1 = 0x1; |
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cpu->id_dfr0 = 0x2; |
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cpu->id_afr0 = 0x3; |
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cpu->id_mmfr0 = 0x01130003; |
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cpu->id_mmfr1 = 0x10030302; |
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cpu->id_mmfr2 = 0x01222110; |
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cpu->id_isar0 = 0x00140011; |
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cpu->id_isar1 = 0x12002111; |
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cpu->id_isar2 = 0x11231111; |
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cpu->id_isar3 = 0x01102131; |
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cpu->id_isar4 = 0x141; |
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} |
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static void arm1136_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr1 = 0x00000000; |
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cpu->ctr = 0x1dd20d2; |
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cpu->reset_sctlr = 0x00050078; |
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cpu->id_pfr0 = 0x111; |
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cpu->id_pfr1 = 0x1; |
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cpu->id_dfr0 = 0x2; |
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cpu->id_afr0 = 0x3; |
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cpu->id_mmfr0 = 0x01130003; |
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cpu->id_mmfr1 = 0x10030302; |
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cpu->id_mmfr2 = 0x01222110; |
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cpu->id_isar0 = 0x00140011; |
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cpu->id_isar1 = 0x12002111; |
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cpu->id_isar2 = 0x11231111; |
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cpu->id_isar3 = 0x01102131; |
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cpu->id_isar4 = 0x141; |
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} |
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|
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static void arm1176_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr1 = 0x00000000; |
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cpu->ctr = 0x1dd20d2; |
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cpu->reset_sctlr = 0x00050078; |
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cpu->id_pfr0 = 0x111; |
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cpu->id_pfr1 = 0x11; |
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cpu->id_dfr0 = 0x33; |
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cpu->id_afr0 = 0; |
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cpu->id_mmfr0 = 0x01130003; |
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cpu->id_mmfr1 = 0x10030302; |
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cpu->id_mmfr2 = 0x01222100; |
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cpu->id_isar0 = 0x0140011; |
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cpu->id_isar1 = 0x12002111; |
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cpu->id_isar2 = 0x11231121; |
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cpu->id_isar3 = 0x01102131; |
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cpu->id_isar4 = 0x01141; |
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} |
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static void arm11mpcore_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr0 = 0x11111111; |
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cpu->mvfr1 = 0x00000000; |
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cpu->ctr = 0x1dd20d2; |
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cpu->id_pfr0 = 0x111; |
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cpu->id_pfr1 = 0x1; |
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cpu->id_dfr0 = 0; |
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cpu->id_afr0 = 0x2; |
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cpu->id_mmfr0 = 0x01100103; |
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cpu->id_mmfr1 = 0x10020302; |
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cpu->id_mmfr2 = 0x01222000; |
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cpu->id_isar0 = 0x00100011; |
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cpu->id_isar1 = 0x12002111; |
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cpu->id_isar2 = 0x11221011; |
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cpu->id_isar3 = 0x01102131; |
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cpu->id_isar4 = 0x141; |
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} |
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static void cortex_m3_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr1 = 0x00011100; |
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cpu->ctr = 0x82048004; |
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cpu->reset_sctlr = 0x00c50078; |
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cpu->id_pfr0 = 0x1031; |
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cpu->id_pfr1 = 0x11; |
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cpu->id_dfr0 = 0x400; |
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cpu->id_afr0 = 0; |
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cpu->id_mmfr0 = 0x31100003; |
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cpu->id_mmfr1 = 0x20000000; |
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cpu->id_mmfr2 = 0x01202000; |
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cpu->id_mmfr3 = 0x11; |
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cpu->id_isar0 = 0x00101111; |
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cpu->id_isar1 = 0x12112111; |
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cpu->id_isar2 = 0x21232031; |
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cpu->id_isar3 = 0x11112131; |
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cpu->id_isar4 = 0x00111142; |
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} |
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static void cortex_a9_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr1 = 0x01111111; |
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cpu->ctr = 0x80038003; |
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cpu->reset_sctlr = 0x00c50078; |
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cpu->id_pfr0 = 0x1031; |
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cpu->id_pfr1 = 0x11; |
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cpu->id_dfr0 = 0x000; |
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cpu->id_afr0 = 0; |
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cpu->id_mmfr0 = 0x00100103; |
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cpu->id_mmfr1 = 0x20000000; |
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cpu->id_mmfr2 = 0x01230000; |
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cpu->id_mmfr3 = 0x00002111; |
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cpu->id_isar0 = 0x00101111; |
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cpu->id_isar1 = 0x13112111; |
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cpu->id_isar2 = 0x21232041; |
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cpu->id_isar3 = 0x11112131; |
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cpu->id_isar4 = 0x00111142; |
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} |
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|
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static void cortex_a15_initfn(Object *obj) |
| ... | ... | |
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cpu->mvfr1 = 0x11111111; |
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cpu->ctr = 0x8444c004; |
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cpu->reset_sctlr = 0x00c50078; |
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cpu->id_pfr0 = 0x00001131; |
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cpu->id_pfr1 = 0x00011011; |
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cpu->id_dfr0 = 0x02010555; |
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cpu->id_afr0 = 0x00000000; |
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cpu->id_mmfr0 = 0x10201105; |
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cpu->id_mmfr1 = 0x20000000; |
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cpu->id_mmfr2 = 0x01240000; |
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cpu->id_mmfr3 = 0x02102211; |
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cpu->id_isar0 = 0x02101110; |
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cpu->id_isar1 = 0x13112111; |
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cpu->id_isar2 = 0x21232041; |
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cpu->id_isar3 = 0x11112131; |
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cpu->id_isar4 = 0x10011142; |
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} |
| 246 | 340 |
|
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static void ti925t_initfn(Object *obj) |
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