/target-i386/helper.c - Diff - qemu - Greek Research and Technology Network's projects

Revision 317ac620 target-i386/helper.c

b/target-i386/helper.c
27	27	//#define DEBUG_MMU
28	28
29	29	/* NOTE: must be called outside the CPU execute loop */
30		void cpu_state_reset(CPUState *env)
	30	void cpu_state_reset(CPUX86State *env)
31	31	{
32	32	int i;
33	33
...	...
106	106	g_free(env);
107	107	}
108	108
109		static void cpu_x86_version(CPUState env, int family, int *model)
	109	static void cpu_x86_version(CPUX86State env, int family, int *model)
110	110	{
111	111	int cpuver = env->cpuid_version;
112	112
...	...
119	119	}
120	120
121	121	/* Broadcast MCA signal for processor version 06H_EH and above */
122		int cpu_x86_support_mca_broadcast(CPUState *env)
	122	int cpu_x86_support_mca_broadcast(CPUX86State *env)
123	123	{
124	124	int family = 0;
125	125	int model = 0;
...	...
191	191	};
192	192
193	193	static void
194		cpu_x86_dump_seg_cache(CPUState env, FILE f, fprintf_function cpu_fprintf,
	194	cpu_x86_dump_seg_cache(CPUX86State env, FILE f, fprintf_function cpu_fprintf,
195	195	const char name, struct SegmentCache sc)
196	196	{
197	197	#ifdef TARGET_X86_64
...	...
248	248	#define DUMP_CODE_BYTES_TOTAL 50
249	249	#define DUMP_CODE_BYTES_BACKWARD 20
250	250
251		void cpu_dump_state(CPUState env, FILE f, fprintf_function cpu_fprintf,
	251	void cpu_dump_state(CPUX86State env, FILE f, fprintf_function cpu_fprintf,
252	252	int flags)
253	253	{
254	254	int eflags, i, nb;
...	...
857	857	return 1;
858	858	}
859	859
860		target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
	860	target_phys_addr_t cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
861	861	{
862	862	target_ulong pde_addr, pte_addr;
863	863	uint64_t pte;
...	...
952	952	return paddr;
953	953	}
954	954
955		void hw_breakpoint_insert(CPUState *env, int index)
	955	void hw_breakpoint_insert(CPUX86State *env, int index)
956	956	{
957	957	int type, err = 0;
958	958
...	...
980	980	env->cpu_breakpoint[index] = NULL;
981	981	}
982	982
983		void hw_breakpoint_remove(CPUState *env, int index)
	983	void hw_breakpoint_remove(CPUX86State *env, int index)
984	984	{
985	985	if (!env->cpu_breakpoint[index])
986	986	return;
...	...
999	999	}
1000	1000	}
1001	1001
1002		int check_hw_breakpoints(CPUState *env, int force_dr6_update)
	1002	int check_hw_breakpoints(CPUX86State *env, int force_dr6_update)
1003	1003	{
1004	1004	target_ulong dr6;
1005	1005	int reg, type;
...	...
1023	1023
1024	1024	static CPUDebugExcpHandler *prev_debug_excp_handler;
1025	1025
1026		static void breakpoint_handler(CPUState *env)
	1026	static void breakpoint_handler(CPUX86State *env)
1027	1027	{
1028	1028	CPUBreakpoint *bp;
1029	1029
...	...
1051	1051
1052	1052	typedef struct MCEInjectionParams {
1053	1053	Monitor *mon;
1054		CPUState *env;
	1054	CPUX86State *env;
1055	1055	int bank;
1056	1056	uint64_t status;
1057	1057	uint64_t mcg_status;
...	...
1063	1063	static void do_inject_x86_mce(void *data)
1064	1064	{
1065	1065	MCEInjectionParams *params = data;
1066		CPUState *cenv = params->env;
	1066	CPUX86State *cenv = params->env;
1067	1067	uint64_t banks = cenv->mce_banks + 4 params->bank;
1068	1068
1069	1069	cpu_synchronize_state(cenv);
...	...
1133	1133	}
1134	1134	}
1135	1135
1136		void cpu_x86_inject_mce(Monitor mon, CPUState cenv, int bank,
	1136	void cpu_x86_inject_mce(Monitor mon, CPUX86State cenv, int bank,
1137	1137	uint64_t status, uint64_t mcg_status, uint64_t addr,
1138	1138	uint64_t misc, int flags)
1139	1139	{
...	...
1148	1148	.flags = flags,
1149	1149	};
1150	1150	unsigned bank_num = cenv->mcg_cap & 0xff;
1151		CPUState *env;
	1151	CPUX86State *env;
1152	1152
1153	1153	if (!cenv->mcg_cap) {
1154	1154	monitor_printf(mon, "MCE injection not supported\n");
...	...
1185	1185	}
1186	1186	}
1187	1187
1188		void cpu_report_tpr_access(CPUState *env, TPRAccess access)
	1188	void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
1189	1189	{
1190	1190	TranslationBlock *tb;
1191	1191
...	...
1277	1277	}
1278	1278
1279	1279	#if !defined(CONFIG_USER_ONLY)
1280		void do_cpu_init(CPUState *env)
	1280	void do_cpu_init(CPUX86State *env)
1281	1281	{
1282	1282	int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
1283	1283	uint64_t pat = env->pat;
...	...
1289	1289	env->halted = !cpu_is_bsp(env);
1290	1290	}
1291	1291
1292		void do_cpu_sipi(CPUState *env)
	1292	void do_cpu_sipi(CPUX86State *env)
1293	1293	{
1294	1294	apic_sipi(env->apic_state);
1295	1295	}
1296	1296	#else
1297		void do_cpu_init(CPUState *env)
	1297	void do_cpu_init(CPUX86State *env)
1298	1298	{
1299	1299	}
1300		void do_cpu_sipi(CPUState *env)
	1300	void do_cpu_sipi(CPUX86State *env)
1301	1301	{
1302	1302	}
1303	1303	#endif

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Revision 317ac620 target-i386/helper.c