/target-i386/kvm.c - Diff - qemu - Greek Research and Technology Network's projects

Revision 317ac620 target-i386/kvm.c

b/target-i386/kvm.c
221	221	return -ENOSYS;
222	222	}
223	223
224		static void kvm_mce_inject(CPUState *env, target_phys_addr_t paddr, int code)
	224	static void kvm_mce_inject(CPUX86State *env, target_phys_addr_t paddr, int code)
225	225	{
226	226	uint64_t status = MCI_STATUS_VAL \| MCI_STATUS_UC \| MCI_STATUS_EN \|
227	227	MCI_STATUS_MISCV \| MCI_STATUS_ADDRV \| MCI_STATUS_S;
...	...
246	246	exit(1);
247	247	}
248	248
249		int kvm_arch_on_sigbus_vcpu(CPUState env, int code, void addr)
	249	int kvm_arch_on_sigbus_vcpu(CPUX86State env, int code, void addr)
250	250	{
251	251	ram_addr_t ram_addr;
252	252	target_phys_addr_t paddr;
...	...
306	306	return 0;
307	307	}
308	308
309		static int kvm_inject_mce_oldstyle(CPUState *env)
	309	static int kvm_inject_mce_oldstyle(CPUX86State *env)
310	310	{
311	311	if (!kvm_has_vcpu_events() && env->exception_injected == EXCP12_MCHK) {
312	312	unsigned int bank, bank_num = env->mcg_cap & 0xff;
...	...
338	338
339	339	static void cpu_update_state(void *opaque, int running, RunState state)
340	340	{
341		CPUState *env = opaque;
	341	CPUX86State *env = opaque;
342	342
343	343	if (running) {
344	344	env->tsc_valid = false;
345	345	}
346	346	}
347	347
348		int kvm_arch_init_vcpu(CPUState *env)
	348	int kvm_arch_init_vcpu(CPUX86State *env)
349	349	{
350	350	struct {
351	351	struct kvm_cpuid2 cpuid;
...	...
577	577	return 0;
578	578	}
579	579
580		void kvm_arch_reset_vcpu(CPUState *env)
	580	void kvm_arch_reset_vcpu(CPUX86State *env)
581	581	{
582	582	env->exception_injected = -1;
583	583	env->interrupt_injected = -1;
...	...
768	768	}
769	769	}
770	770
771		static int kvm_getput_regs(CPUState *env, int set)
	771	static int kvm_getput_regs(CPUX86State *env, int set)
772	772	{
773	773	struct kvm_regs regs;
774	774	int ret = 0;
...	...
809	809	return ret;
810	810	}
811	811
812		static int kvm_put_fpu(CPUState *env)
	812	static int kvm_put_fpu(CPUX86State *env)
813	813	{
814	814	struct kvm_fpu fpu;
815	815	int i;
...	...
841	841	#define XSAVE_XSTATE_BV 128
842	842	#define XSAVE_YMMH_SPACE 144
843	843
844		static int kvm_put_xsave(CPUState *env)
	844	static int kvm_put_xsave(CPUX86State *env)
845	845	{
846	846	struct kvm_xsave* xsave = env->kvm_xsave_buf;
847	847	uint16_t cwd, swd, twd;
...	...
875	875	return r;
876	876	}
877	877
878		static int kvm_put_xcrs(CPUState *env)
	878	static int kvm_put_xcrs(CPUX86State *env)
879	879	{
880	880	struct kvm_xcrs xcrs;
881	881
...	...
890	890	return kvm_vcpu_ioctl(env, KVM_SET_XCRS, &xcrs);
891	891	}
892	892
893		static int kvm_put_sregs(CPUState *env)
	893	static int kvm_put_sregs(CPUX86State *env)
894	894	{
895	895	struct kvm_sregs sregs;
896	896
...	...
946	946	entry->data = value;
947	947	}
948	948
949		static int kvm_put_msrs(CPUState *env, int level)
	949	static int kvm_put_msrs(CPUX86State *env, int level)
950	950	{
951	951	struct {
952	952	struct kvm_msrs info;
...	...
1029	1029	}
1030	1030
1031	1031
1032		static int kvm_get_fpu(CPUState *env)
	1032	static int kvm_get_fpu(CPUX86State *env)
1033	1033	{
1034	1034	struct kvm_fpu fpu;
1035	1035	int i, ret;
...	...
1055	1055	return 0;
1056	1056	}
1057	1057
1058		static int kvm_get_xsave(CPUState *env)
	1058	static int kvm_get_xsave(CPUX86State *env)
1059	1059	{
1060	1060	struct kvm_xsave* xsave = env->kvm_xsave_buf;
1061	1061	int ret, i;
...	...
1093	1093	return 0;
1094	1094	}
1095	1095
1096		static int kvm_get_xcrs(CPUState *env)
	1096	static int kvm_get_xcrs(CPUX86State *env)
1097	1097	{
1098	1098	int i, ret;
1099	1099	struct kvm_xcrs xcrs;
...	...
1117	1117	return 0;
1118	1118	}
1119	1119
1120		static int kvm_get_sregs(CPUState *env)
	1120	static int kvm_get_sregs(CPUX86State *env)
1121	1121	{
1122	1122	struct kvm_sregs sregs;
1123	1123	uint32_t hflags;
...	...
1201	1201	return 0;
1202	1202	}
1203	1203
1204		static int kvm_get_msrs(CPUState *env)
	1204	static int kvm_get_msrs(CPUX86State *env)
1205	1205	{
1206	1206	struct {
1207	1207	struct kvm_msrs info;
...	...
1331	1331	return 0;
1332	1332	}
1333	1333
1334		static int kvm_put_mp_state(CPUState *env)
	1334	static int kvm_put_mp_state(CPUX86State *env)
1335	1335	{
1336	1336	struct kvm_mp_state mp_state = { .mp_state = env->mp_state };
1337	1337
1338	1338	return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
1339	1339	}
1340	1340
1341		static int kvm_get_mp_state(CPUState *env)
	1341	static int kvm_get_mp_state(CPUX86State *env)
1342	1342	{
1343	1343	struct kvm_mp_state mp_state;
1344	1344	int ret;
...	...
1354	1354	return 0;
1355	1355	}
1356	1356
1357		static int kvm_get_apic(CPUState *env)
	1357	static int kvm_get_apic(CPUX86State *env)
1358	1358	{
1359	1359	DeviceState *apic = env->apic_state;
1360	1360	struct kvm_lapic_state kapic;
...	...
1371	1371	return 0;
1372	1372	}
1373	1373
1374		static int kvm_put_apic(CPUState *env)
	1374	static int kvm_put_apic(CPUX86State *env)
1375	1375	{
1376	1376	DeviceState *apic = env->apic_state;
1377	1377	struct kvm_lapic_state kapic;
...	...
1384	1384	return 0;
1385	1385	}
1386	1386
1387		static int kvm_put_vcpu_events(CPUState *env, int level)
	1387	static int kvm_put_vcpu_events(CPUX86State *env, int level)
1388	1388	{
1389	1389	struct kvm_vcpu_events events;
1390	1390
...	...
1418	1418	return kvm_vcpu_ioctl(env, KVM_SET_VCPU_EVENTS, &events);
1419	1419	}
1420	1420
1421		static int kvm_get_vcpu_events(CPUState *env)
	1421	static int kvm_get_vcpu_events(CPUX86State *env)
1422	1422	{
1423	1423	struct kvm_vcpu_events events;
1424	1424	int ret;
...	...
1453	1453	return 0;
1454	1454	}
1455	1455
1456		static int kvm_guest_debug_workarounds(CPUState *env)
	1456	static int kvm_guest_debug_workarounds(CPUX86State *env)
1457	1457	{
1458	1458	int ret = 0;
1459	1459	unsigned long reinject_trap = 0;
...	...
1482	1482	return ret;
1483	1483	}
1484	1484
1485		static int kvm_put_debugregs(CPUState *env)
	1485	static int kvm_put_debugregs(CPUX86State *env)
1486	1486	{
1487	1487	struct kvm_debugregs dbgregs;
1488	1488	int i;
...	...
1501	1501	return kvm_vcpu_ioctl(env, KVM_SET_DEBUGREGS, &dbgregs);
1502	1502	}
1503	1503
1504		static int kvm_get_debugregs(CPUState *env)
	1504	static int kvm_get_debugregs(CPUX86State *env)
1505	1505	{
1506	1506	struct kvm_debugregs dbgregs;
1507	1507	int i, ret;
...	...
1523	1523	return 0;
1524	1524	}
1525	1525
1526		int kvm_arch_put_registers(CPUState *env, int level)
	1526	int kvm_arch_put_registers(CPUX86State *env, int level)
1527	1527	{
1528	1528	int ret;
1529	1529
...	...
1580	1580	return 0;
1581	1581	}
1582	1582
1583		int kvm_arch_get_registers(CPUState *env)
	1583	int kvm_arch_get_registers(CPUX86State *env)
1584	1584	{
1585	1585	int ret;
1586	1586
...	...
1625	1625	return 0;
1626	1626	}
1627	1627
1628		void kvm_arch_pre_run(CPUState env, struct kvm_run run)
	1628	void kvm_arch_pre_run(CPUX86State env, struct kvm_run run)
1629	1629	{
1630	1630	int ret;
1631	1631
...	...
1685	1685	}
1686	1686	}
1687	1687
1688		void kvm_arch_post_run(CPUState env, struct kvm_run run)
	1688	void kvm_arch_post_run(CPUX86State env, struct kvm_run run)
1689	1689	{
1690	1690	if (run->if_flag) {
1691	1691	env->eflags \|= IF_MASK;
...	...
1696	1696	cpu_set_apic_base(env->apic_state, run->apic_base);
1697	1697	}
1698	1698
1699		int kvm_arch_process_async_events(CPUState *env)
	1699	int kvm_arch_process_async_events(CPUX86State *env)
1700	1700	{
1701	1701	if (env->interrupt_request & CPU_INTERRUPT_MCE) {
1702	1702	/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
...	...
1748	1748	return env->halted;
1749	1749	}
1750	1750
1751		static int kvm_handle_halt(CPUState *env)
	1751	static int kvm_handle_halt(CPUX86State *env)
1752	1752	{
1753	1753	if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
1754	1754	(env->eflags & IF_MASK)) &&
...	...
1760	1760	return 0;
1761	1761	}
1762	1762
1763		static int kvm_handle_tpr_access(CPUState *env)
	1763	static int kvm_handle_tpr_access(CPUX86State *env)
1764	1764	{
1765	1765	struct kvm_run *run = env->kvm_run;
1766	1766
...	...
1770	1770	return 1;
1771	1771	}
1772	1772
1773		int kvm_arch_insert_sw_breakpoint(CPUState env, struct kvm_sw_breakpoint bp)
	1773	int kvm_arch_insert_sw_breakpoint(CPUX86State env, struct kvm_sw_breakpoint bp)
1774	1774	{
1775	1775	static const uint8_t int3 = 0xcc;
1776	1776
...	...
1781	1781	return 0;
1782	1782	}
1783	1783
1784		int kvm_arch_remove_sw_breakpoint(CPUState env, struct kvm_sw_breakpoint bp)
	1784	int kvm_arch_remove_sw_breakpoint(CPUX86State env, struct kvm_sw_breakpoint bp)
1785	1785	{
1786	1786	uint8_t int3;
1787	1787
...	...
1924	1924	return ret;
1925	1925	}
1926	1926
1927		void kvm_arch_update_guest_debug(CPUState env, struct kvm_guest_debug dbg)
	1927	void kvm_arch_update_guest_debug(CPUX86State env, struct kvm_guest_debug dbg)
1928	1928	{
1929	1929	const uint8_t type_code[] = {
1930	1930	[GDB_BREAKPOINT_HW] = 0x0,
...	...
1961	1961
1962	1962	#define VMX_INVALID_GUEST_STATE 0x80000021
1963	1963
1964		int kvm_arch_handle_exit(CPUState env, struct kvm_run run)
	1964	int kvm_arch_handle_exit(CPUX86State env, struct kvm_run run)
1965	1965	{
1966	1966	uint64_t code;
1967	1967	int ret;
...	...
2012	2012	return ret;
2013	2013	}
2014	2014
2015		bool kvm_arch_stop_on_emulation_error(CPUState *env)
	2015	bool kvm_arch_stop_on_emulation_error(CPUX86State *env)
2016	2016	{
2017	2017	kvm_cpu_synchronize_state(env);
2018	2018	return !(env->cr[0] & CR0_PE_MASK) \|\|

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Revision 317ac620 target-i386/kvm.c