Revision 327ac2e7 hw/sun4m.c
b/hw/sun4m.c | ||
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240 | 240 |
slavio_irq_info(slavio_intctl); |
241 | 241 |
} |
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void cpu_check_irqs(CPUState *env) |
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{ |
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if (env->pil_in && (env->interrupt_index == 0 || |
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(env->interrupt_index & ~15) == TT_EXTINT)) { |
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unsigned int i; |
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for (i = 15; i > 0; i--) { |
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if (env->pil_in & (1 << i)) { |
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int old_interrupt = env->interrupt_index; |
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env->interrupt_index = TT_EXTINT | i; |
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if (old_interrupt != env->interrupt_index) |
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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break; |
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} |
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} |
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} else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { |
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env->interrupt_index = 0; |
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
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} |
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} |
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static void cpu_set_irq(void *opaque, int irq, int level) |
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{ |
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CPUState *env = opaque; |
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|
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if (level) { |
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DPRINTF("Raise CPU IRQ %d\n", irq); |
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env->halted = 0; |
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if (env->interrupt_index == 0 || |
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((env->interrupt_index & ~15) == TT_EXTINT && |
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(env->interrupt_index & 15) < irq)) { |
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env->interrupt_index = TT_EXTINT | irq; |
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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} else { |
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DPRINTF("Not triggered, pending exception %d\n", |
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env->interrupt_index); |
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} |
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env->pil_in |= 1 << irq; |
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cpu_check_irqs(env); |
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} else { |
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DPRINTF("Lower CPU IRQ %d\n", irq); |
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env->pil_in &= ~(1 << irq); |
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cpu_check_irqs(env); |
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263 | 278 |
} |
264 | 279 |
} |
265 | 280 |
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