root / hw / spitz.c @ 3320e56e
History | View | Annotate | Download (31 kB)
1 | b00052e4 | balrog | /*
|
---|---|---|---|
2 | b00052e4 | balrog | * PXA270-based Clamshell PDA platforms.
|
3 | b00052e4 | balrog | *
|
4 | b00052e4 | balrog | * Copyright (c) 2006 Openedhand Ltd.
|
5 | b00052e4 | balrog | * Written by Andrzej Zaborowski <balrog@zabor.org>
|
6 | b00052e4 | balrog | *
|
7 | b00052e4 | balrog | * This code is licensed under the GNU GPL v2.
|
8 | b00052e4 | balrog | */
|
9 | b00052e4 | balrog | |
10 | 87ecb68b | pbrook | #include "hw.h" |
11 | 87ecb68b | pbrook | #include "pxa.h" |
12 | 87ecb68b | pbrook | #include "arm-misc.h" |
13 | 87ecb68b | pbrook | #include "sysemu.h" |
14 | 87ecb68b | pbrook | #include "pcmcia.h" |
15 | 87ecb68b | pbrook | #include "i2c.h" |
16 | a984a69e | Paul Brook | #include "ssi.h" |
17 | 87ecb68b | pbrook | #include "flash.h" |
18 | 87ecb68b | pbrook | #include "qemu-timer.h" |
19 | 87ecb68b | pbrook | #include "devices.h" |
20 | e33d8cdb | balrog | #include "sharpsl.h" |
21 | 87ecb68b | pbrook | #include "console.h" |
22 | 87ecb68b | pbrook | #include "block.h" |
23 | 87ecb68b | pbrook | #include "audio/audio.h" |
24 | 87ecb68b | pbrook | #include "boards.h" |
25 | b00052e4 | balrog | |
26 | b00052e4 | balrog | #undef REG_FMT
|
27 | b00052e4 | balrog | #define REG_FMT "0x%02lx" |
28 | b00052e4 | balrog | |
29 | b00052e4 | balrog | /* Spitz Flash */
|
30 | b00052e4 | balrog | #define FLASH_BASE 0x0c000000 |
31 | b00052e4 | balrog | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ |
32 | b00052e4 | balrog | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ |
33 | b00052e4 | balrog | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ |
34 | b00052e4 | balrog | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ |
35 | b00052e4 | balrog | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ |
36 | b00052e4 | balrog | #define FLASH_FLASHIO 0x14 /* Flash I/O */ |
37 | b00052e4 | balrog | #define FLASH_FLASHCTL 0x18 /* Flash Control */ |
38 | b00052e4 | balrog | |
39 | b00052e4 | balrog | #define FLASHCTL_CE0 (1 << 0) |
40 | b00052e4 | balrog | #define FLASHCTL_CLE (1 << 1) |
41 | b00052e4 | balrog | #define FLASHCTL_ALE (1 << 2) |
42 | b00052e4 | balrog | #define FLASHCTL_WP (1 << 3) |
43 | b00052e4 | balrog | #define FLASHCTL_CE1 (1 << 4) |
44 | b00052e4 | balrog | #define FLASHCTL_RYBY (1 << 5) |
45 | b00052e4 | balrog | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
|
46 | b00052e4 | balrog | |
47 | bc24a225 | Paul Brook | typedef struct { |
48 | bc24a225 | Paul Brook | NANDFlashState *nand; |
49 | b00052e4 | balrog | uint8_t ctl; |
50 | bc24a225 | Paul Brook | ECCState ecc; |
51 | bc24a225 | Paul Brook | } SLNANDState; |
52 | b00052e4 | balrog | |
53 | b00052e4 | balrog | static uint32_t sl_readb(void *opaque, target_phys_addr_t addr) |
54 | b00052e4 | balrog | { |
55 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
56 | b00052e4 | balrog | int ryby;
|
57 | b00052e4 | balrog | |
58 | b00052e4 | balrog | switch (addr) {
|
59 | b00052e4 | balrog | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) |
60 | b00052e4 | balrog | case FLASH_ECCLPLB:
|
61 | b00052e4 | balrog | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | |
62 | b00052e4 | balrog | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); |
63 | b00052e4 | balrog | |
64 | b00052e4 | balrog | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) |
65 | b00052e4 | balrog | case FLASH_ECCLPUB:
|
66 | b00052e4 | balrog | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | |
67 | b00052e4 | balrog | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); |
68 | b00052e4 | balrog | |
69 | b00052e4 | balrog | case FLASH_ECCCP:
|
70 | b00052e4 | balrog | return s->ecc.cp;
|
71 | b00052e4 | balrog | |
72 | b00052e4 | balrog | case FLASH_ECCCNTR:
|
73 | b00052e4 | balrog | return s->ecc.count & 0xff; |
74 | b00052e4 | balrog | |
75 | b00052e4 | balrog | case FLASH_FLASHCTL:
|
76 | b00052e4 | balrog | nand_getpins(s->nand, &ryby); |
77 | b00052e4 | balrog | if (ryby)
|
78 | b00052e4 | balrog | return s->ctl | FLASHCTL_RYBY;
|
79 | b00052e4 | balrog | else
|
80 | b00052e4 | balrog | return s->ctl;
|
81 | b00052e4 | balrog | |
82 | b00052e4 | balrog | case FLASH_FLASHIO:
|
83 | b00052e4 | balrog | return ecc_digest(&s->ecc, nand_getio(s->nand));
|
84 | b00052e4 | balrog | |
85 | b00052e4 | balrog | default:
|
86 | a8b7063b | Blue Swirl | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
87 | b00052e4 | balrog | } |
88 | b00052e4 | balrog | return 0; |
89 | b00052e4 | balrog | } |
90 | b00052e4 | balrog | |
91 | a5236105 | balrog | static uint32_t sl_readl(void *opaque, target_phys_addr_t addr) |
92 | a5236105 | balrog | { |
93 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
94 | a5236105 | balrog | |
95 | a5236105 | balrog | if (addr == FLASH_FLASHIO)
|
96 | a5236105 | balrog | return ecc_digest(&s->ecc, nand_getio(s->nand)) |
|
97 | a5236105 | balrog | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
|
98 | a5236105 | balrog | |
99 | a5236105 | balrog | return sl_readb(opaque, addr);
|
100 | a5236105 | balrog | } |
101 | a5236105 | balrog | |
102 | b00052e4 | balrog | static void sl_writeb(void *opaque, target_phys_addr_t addr, |
103 | b00052e4 | balrog | uint32_t value) |
104 | b00052e4 | balrog | { |
105 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
106 | b00052e4 | balrog | |
107 | b00052e4 | balrog | switch (addr) {
|
108 | b00052e4 | balrog | case FLASH_ECCCLRR:
|
109 | b00052e4 | balrog | /* Value is ignored. */
|
110 | b00052e4 | balrog | ecc_reset(&s->ecc); |
111 | b00052e4 | balrog | break;
|
112 | b00052e4 | balrog | |
113 | b00052e4 | balrog | case FLASH_FLASHCTL:
|
114 | b00052e4 | balrog | s->ctl = value & 0xff & ~FLASHCTL_RYBY;
|
115 | b00052e4 | balrog | nand_setpins(s->nand, |
116 | b00052e4 | balrog | s->ctl & FLASHCTL_CLE, |
117 | b00052e4 | balrog | s->ctl & FLASHCTL_ALE, |
118 | b00052e4 | balrog | s->ctl & FLASHCTL_NCE, |
119 | b00052e4 | balrog | s->ctl & FLASHCTL_WP, |
120 | b00052e4 | balrog | 0);
|
121 | b00052e4 | balrog | break;
|
122 | b00052e4 | balrog | |
123 | b00052e4 | balrog | case FLASH_FLASHIO:
|
124 | b00052e4 | balrog | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
|
125 | b00052e4 | balrog | break;
|
126 | b00052e4 | balrog | |
127 | b00052e4 | balrog | default:
|
128 | a8b7063b | Blue Swirl | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
129 | b00052e4 | balrog | } |
130 | b00052e4 | balrog | } |
131 | b00052e4 | balrog | |
132 | aa941b94 | balrog | static void sl_save(QEMUFile *f, void *opaque) |
133 | aa941b94 | balrog | { |
134 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
135 | aa941b94 | balrog | |
136 | aa941b94 | balrog | qemu_put_8s(f, &s->ctl); |
137 | aa941b94 | balrog | ecc_put(f, &s->ecc); |
138 | aa941b94 | balrog | } |
139 | aa941b94 | balrog | |
140 | aa941b94 | balrog | static int sl_load(QEMUFile *f, void *opaque, int version_id) |
141 | aa941b94 | balrog | { |
142 | bc24a225 | Paul Brook | SLNANDState *s = (SLNANDState *) opaque; |
143 | aa941b94 | balrog | |
144 | aa941b94 | balrog | qemu_get_8s(f, &s->ctl); |
145 | aa941b94 | balrog | ecc_get(f, &s->ecc); |
146 | aa941b94 | balrog | |
147 | aa941b94 | balrog | return 0; |
148 | aa941b94 | balrog | } |
149 | aa941b94 | balrog | |
150 | b00052e4 | balrog | enum {
|
151 | b00052e4 | balrog | FLASH_128M, |
152 | b00052e4 | balrog | FLASH_1024M, |
153 | b00052e4 | balrog | }; |
154 | b00052e4 | balrog | |
155 | bc24a225 | Paul Brook | static void sl_flash_register(PXA2xxState *cpu, int size) |
156 | b00052e4 | balrog | { |
157 | b00052e4 | balrog | int iomemtype;
|
158 | bc24a225 | Paul Brook | SLNANDState *s; |
159 | b00052e4 | balrog | CPUReadMemoryFunc *sl_readfn[] = { |
160 | b00052e4 | balrog | sl_readb, |
161 | b00052e4 | balrog | sl_readb, |
162 | a5236105 | balrog | sl_readl, |
163 | b00052e4 | balrog | }; |
164 | b00052e4 | balrog | CPUWriteMemoryFunc *sl_writefn[] = { |
165 | b00052e4 | balrog | sl_writeb, |
166 | b00052e4 | balrog | sl_writeb, |
167 | b00052e4 | balrog | sl_writeb, |
168 | b00052e4 | balrog | }; |
169 | b00052e4 | balrog | |
170 | bc24a225 | Paul Brook | s = (SLNANDState *) qemu_mallocz(sizeof(SLNANDState));
|
171 | b00052e4 | balrog | s->ctl = 0;
|
172 | b00052e4 | balrog | if (size == FLASH_128M)
|
173 | b00052e4 | balrog | s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73);
|
174 | b00052e4 | balrog | else if (size == FLASH_1024M) |
175 | b00052e4 | balrog | s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1);
|
176 | b00052e4 | balrog | |
177 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(sl_readfn, |
178 | b00052e4 | balrog | sl_writefn, s); |
179 | 8da3ff18 | pbrook | cpu_register_physical_memory(FLASH_BASE, 0x40, iomemtype);
|
180 | aa941b94 | balrog | |
181 | aa941b94 | balrog | register_savevm("sl_flash", 0, 0, sl_save, sl_load, s); |
182 | b00052e4 | balrog | } |
183 | b00052e4 | balrog | |
184 | b00052e4 | balrog | /* Spitz Keyboard */
|
185 | b00052e4 | balrog | |
186 | b00052e4 | balrog | #define SPITZ_KEY_STROBE_NUM 11 |
187 | b00052e4 | balrog | #define SPITZ_KEY_SENSE_NUM 7 |
188 | b00052e4 | balrog | |
189 | b00052e4 | balrog | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { |
190 | b00052e4 | balrog | 12, 17, 91, 34, 36, 38, 39 |
191 | b00052e4 | balrog | }; |
192 | b00052e4 | balrog | |
193 | b00052e4 | balrog | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { |
194 | b00052e4 | balrog | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 |
195 | b00052e4 | balrog | }; |
196 | b00052e4 | balrog | |
197 | b00052e4 | balrog | /* Eighth additional row maps the special keys */
|
198 | b00052e4 | balrog | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { |
199 | b00052e4 | balrog | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, |
200 | b00052e4 | balrog | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, |
201 | b00052e4 | balrog | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, |
202 | b00052e4 | balrog | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, |
203 | b00052e4 | balrog | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, |
204 | 2b76bdc9 | balrog | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
205 | 2b76bdc9 | balrog | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, |
206 | b00052e4 | balrog | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
207 | b00052e4 | balrog | }; |
208 | b00052e4 | balrog | |
209 | b00052e4 | balrog | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ |
210 | b00052e4 | balrog | #define SPITZ_GPIO_SYNC 16 /* Sync button */ |
211 | b00052e4 | balrog | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ |
212 | b00052e4 | balrog | #define SPITZ_GPIO_SWA 97 /* Lid */ |
213 | b00052e4 | balrog | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ |
214 | b00052e4 | balrog | |
215 | b00052e4 | balrog | /* The special buttons are mapped to unused keys */
|
216 | b00052e4 | balrog | static const int spitz_gpiomap[5] = { |
217 | b00052e4 | balrog | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, |
218 | b00052e4 | balrog | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, |
219 | b00052e4 | balrog | }; |
220 | b00052e4 | balrog | static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, }; |
221 | b00052e4 | balrog | |
222 | bc24a225 | Paul Brook | typedef struct { |
223 | 38641a52 | balrog | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
224 | 38641a52 | balrog | qemu_irq *strobe; |
225 | 38641a52 | balrog | qemu_irq gpiomap[5];
|
226 | b00052e4 | balrog | int keymap[0x80]; |
227 | b00052e4 | balrog | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; |
228 | b00052e4 | balrog | uint16_t strobe_state; |
229 | b00052e4 | balrog | uint16_t sense_state; |
230 | b00052e4 | balrog | |
231 | b00052e4 | balrog | uint16_t pre_map[0x100];
|
232 | b00052e4 | balrog | uint16_t modifiers; |
233 | b00052e4 | balrog | uint16_t imodifiers; |
234 | b00052e4 | balrog | uint8_t fifo[16];
|
235 | b00052e4 | balrog | int fifopos, fifolen;
|
236 | b00052e4 | balrog | QEMUTimer *kbdtimer; |
237 | bc24a225 | Paul Brook | } SpitzKeyboardState; |
238 | b00052e4 | balrog | |
239 | bc24a225 | Paul Brook | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
240 | b00052e4 | balrog | { |
241 | b00052e4 | balrog | int i;
|
242 | b00052e4 | balrog | uint16_t strobe, sense = 0;
|
243 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { |
244 | b00052e4 | balrog | strobe = s->keyrow[i] & s->strobe_state; |
245 | b00052e4 | balrog | if (strobe) {
|
246 | b00052e4 | balrog | sense |= 1 << i;
|
247 | b00052e4 | balrog | if (!(s->sense_state & (1 << i))) |
248 | 38641a52 | balrog | qemu_irq_raise(s->sense[i]); |
249 | b00052e4 | balrog | } else if (s->sense_state & (1 << i)) |
250 | 38641a52 | balrog | qemu_irq_lower(s->sense[i]); |
251 | b00052e4 | balrog | } |
252 | b00052e4 | balrog | |
253 | b00052e4 | balrog | s->sense_state = sense; |
254 | b00052e4 | balrog | } |
255 | b00052e4 | balrog | |
256 | 38641a52 | balrog | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
257 | b00052e4 | balrog | { |
258 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
259 | 38641a52 | balrog | |
260 | 38641a52 | balrog | if (level)
|
261 | 38641a52 | balrog | s->strobe_state |= 1 << line;
|
262 | 38641a52 | balrog | else
|
263 | 38641a52 | balrog | s->strobe_state &= ~(1 << line);
|
264 | 38641a52 | balrog | spitz_keyboard_sense_update(s); |
265 | b00052e4 | balrog | } |
266 | b00052e4 | balrog | |
267 | bc24a225 | Paul Brook | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
268 | b00052e4 | balrog | { |
269 | b00052e4 | balrog | int spitz_keycode = s->keymap[keycode & 0x7f]; |
270 | b00052e4 | balrog | if (spitz_keycode == -1) |
271 | b00052e4 | balrog | return;
|
272 | b00052e4 | balrog | |
273 | b00052e4 | balrog | /* Handle the additional keys */
|
274 | b00052e4 | balrog | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { |
275 | 38641a52 | balrog | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^ |
276 | b00052e4 | balrog | spitz_gpio_invert[spitz_keycode & 0xf]);
|
277 | b00052e4 | balrog | return;
|
278 | b00052e4 | balrog | } |
279 | b00052e4 | balrog | |
280 | b00052e4 | balrog | if (keycode & 0x80) |
281 | b00052e4 | balrog | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); |
282 | b00052e4 | balrog | else
|
283 | b00052e4 | balrog | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); |
284 | b00052e4 | balrog | |
285 | b00052e4 | balrog | spitz_keyboard_sense_update(s); |
286 | b00052e4 | balrog | } |
287 | b00052e4 | balrog | |
288 | b00052e4 | balrog | #define SHIFT (1 << 7) |
289 | b00052e4 | balrog | #define CTRL (1 << 8) |
290 | b00052e4 | balrog | #define FN (1 << 9) |
291 | b00052e4 | balrog | |
292 | b00052e4 | balrog | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c |
293 | b00052e4 | balrog | |
294 | bc24a225 | Paul Brook | static void spitz_keyboard_handler(SpitzKeyboardState *s, int keycode) |
295 | b00052e4 | balrog | { |
296 | b00052e4 | balrog | uint16_t code; |
297 | b00052e4 | balrog | int mapcode;
|
298 | b00052e4 | balrog | switch (keycode) {
|
299 | b00052e4 | balrog | case 0x2a: /* Left Shift */ |
300 | b00052e4 | balrog | s->modifiers |= 1;
|
301 | b00052e4 | balrog | break;
|
302 | b00052e4 | balrog | case 0xaa: |
303 | b00052e4 | balrog | s->modifiers &= ~1;
|
304 | b00052e4 | balrog | break;
|
305 | b00052e4 | balrog | case 0x36: /* Right Shift */ |
306 | b00052e4 | balrog | s->modifiers |= 2;
|
307 | b00052e4 | balrog | break;
|
308 | b00052e4 | balrog | case 0xb6: |
309 | b00052e4 | balrog | s->modifiers &= ~2;
|
310 | b00052e4 | balrog | break;
|
311 | b00052e4 | balrog | case 0x1d: /* Control */ |
312 | b00052e4 | balrog | s->modifiers |= 4;
|
313 | b00052e4 | balrog | break;
|
314 | b00052e4 | balrog | case 0x9d: |
315 | b00052e4 | balrog | s->modifiers &= ~4;
|
316 | b00052e4 | balrog | break;
|
317 | b00052e4 | balrog | case 0x38: /* Alt */ |
318 | b00052e4 | balrog | s->modifiers |= 8;
|
319 | b00052e4 | balrog | break;
|
320 | b00052e4 | balrog | case 0xb8: |
321 | b00052e4 | balrog | s->modifiers &= ~8;
|
322 | b00052e4 | balrog | break;
|
323 | b00052e4 | balrog | } |
324 | b00052e4 | balrog | |
325 | b00052e4 | balrog | code = s->pre_map[mapcode = ((s->modifiers & 3) ?
|
326 | b00052e4 | balrog | (keycode | SHIFT) : |
327 | b00052e4 | balrog | (keycode & ~SHIFT))]; |
328 | b00052e4 | balrog | |
329 | b00052e4 | balrog | if (code != mapcode) {
|
330 | b00052e4 | balrog | #if 0
|
331 | b00052e4 | balrog | if ((code & SHIFT) && !(s->modifiers & 1))
|
332 | b00052e4 | balrog | QUEUE_KEY(0x2a | (keycode & 0x80));
|
333 | b00052e4 | balrog | if ((code & CTRL ) && !(s->modifiers & 4))
|
334 | b00052e4 | balrog | QUEUE_KEY(0x1d | (keycode & 0x80));
|
335 | b00052e4 | balrog | if ((code & FN ) && !(s->modifiers & 8))
|
336 | b00052e4 | balrog | QUEUE_KEY(0x38 | (keycode & 0x80));
|
337 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 1))
|
338 | b00052e4 | balrog | QUEUE_KEY(0x2a | (~keycode & 0x80));
|
339 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 2))
|
340 | b00052e4 | balrog | QUEUE_KEY(0x36 | (~keycode & 0x80));
|
341 | b00052e4 | balrog | #else
|
342 | b00052e4 | balrog | if (keycode & 0x80) { |
343 | b00052e4 | balrog | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) |
344 | b00052e4 | balrog | QUEUE_KEY(0x2a | 0x80); |
345 | b00052e4 | balrog | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) |
346 | b00052e4 | balrog | QUEUE_KEY(0x1d | 0x80); |
347 | b00052e4 | balrog | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) |
348 | b00052e4 | balrog | QUEUE_KEY(0x38 | 0x80); |
349 | b00052e4 | balrog | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) |
350 | b00052e4 | balrog | QUEUE_KEY(0x2a);
|
351 | b00052e4 | balrog | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) |
352 | b00052e4 | balrog | QUEUE_KEY(0x36);
|
353 | b00052e4 | balrog | s->imodifiers = 0;
|
354 | b00052e4 | balrog | } else {
|
355 | b00052e4 | balrog | if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) { |
356 | b00052e4 | balrog | QUEUE_KEY(0x2a);
|
357 | b00052e4 | balrog | s->imodifiers |= 1;
|
358 | b00052e4 | balrog | } |
359 | b00052e4 | balrog | if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) { |
360 | b00052e4 | balrog | QUEUE_KEY(0x1d);
|
361 | b00052e4 | balrog | s->imodifiers |= 4;
|
362 | b00052e4 | balrog | } |
363 | b00052e4 | balrog | if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) { |
364 | b00052e4 | balrog | QUEUE_KEY(0x38);
|
365 | b00052e4 | balrog | s->imodifiers |= 8;
|
366 | b00052e4 | balrog | } |
367 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 1) && |
368 | b00052e4 | balrog | !(s->imodifiers & 0x10)) {
|
369 | b00052e4 | balrog | QUEUE_KEY(0x2a | 0x80); |
370 | b00052e4 | balrog | s->imodifiers |= 0x10;
|
371 | b00052e4 | balrog | } |
372 | b00052e4 | balrog | if ((code & FN ) && (s->modifiers & 2) && |
373 | b00052e4 | balrog | !(s->imodifiers & 0x20)) {
|
374 | b00052e4 | balrog | QUEUE_KEY(0x36 | 0x80); |
375 | b00052e4 | balrog | s->imodifiers |= 0x20;
|
376 | b00052e4 | balrog | } |
377 | b00052e4 | balrog | } |
378 | b00052e4 | balrog | #endif
|
379 | b00052e4 | balrog | } |
380 | b00052e4 | balrog | |
381 | b00052e4 | balrog | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); |
382 | b00052e4 | balrog | } |
383 | b00052e4 | balrog | |
384 | b00052e4 | balrog | static void spitz_keyboard_tick(void *opaque) |
385 | b00052e4 | balrog | { |
386 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
387 | b00052e4 | balrog | |
388 | b00052e4 | balrog | if (s->fifolen) {
|
389 | b00052e4 | balrog | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); |
390 | b00052e4 | balrog | s->fifolen --; |
391 | b00052e4 | balrog | if (s->fifopos >= 16) |
392 | b00052e4 | balrog | s->fifopos = 0;
|
393 | b00052e4 | balrog | } |
394 | b00052e4 | balrog | |
395 | b00052e4 | balrog | qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) + ticks_per_sec / 32);
|
396 | b00052e4 | balrog | } |
397 | b00052e4 | balrog | |
398 | bc24a225 | Paul Brook | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
399 | b00052e4 | balrog | { |
400 | b00052e4 | balrog | int i;
|
401 | b00052e4 | balrog | for (i = 0; i < 0x100; i ++) |
402 | b00052e4 | balrog | s->pre_map[i] = i; |
403 | b00052e4 | balrog | s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */ |
404 | b00052e4 | balrog | s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */ |
405 | b00052e4 | balrog | s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */ |
406 | b00052e4 | balrog | s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */ |
407 | b00052e4 | balrog | s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */ |
408 | b00052e4 | balrog | s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */ |
409 | b00052e4 | balrog | s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */ |
410 | b00052e4 | balrog | s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */ |
411 | b00052e4 | balrog | s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */ |
412 | b00052e4 | balrog | s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */ |
413 | b00052e4 | balrog | s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */ |
414 | b00052e4 | balrog | s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */ |
415 | b00052e4 | balrog | s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */ |
416 | b00052e4 | balrog | s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */ |
417 | b00052e4 | balrog | s->pre_map[0x0d ] = 0x12 | FN; /* equal */ |
418 | b00052e4 | balrog | s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */ |
419 | b00052e4 | balrog | s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */ |
420 | b00052e4 | balrog | s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */ |
421 | 2b76bdc9 | balrog | s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */ |
422 | 2b76bdc9 | balrog | s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */ |
423 | b00052e4 | balrog | s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */ |
424 | b00052e4 | balrog | s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */ |
425 | b00052e4 | balrog | s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */ |
426 | b00052e4 | balrog | s->pre_map[0x2b ] = 0x25 | FN; /* backslash */ |
427 | b00052e4 | balrog | s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */ |
428 | b00052e4 | balrog | s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */ |
429 | 2b76bdc9 | balrog | s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */ |
430 | b00052e4 | balrog | s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */ |
431 | 2b76bdc9 | balrog | s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */ |
432 | b00052e4 | balrog | s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */ |
433 | b00052e4 | balrog | s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */ |
434 | b00052e4 | balrog | s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */ |
435 | b00052e4 | balrog | |
436 | b00052e4 | balrog | s->modifiers = 0;
|
437 | b00052e4 | balrog | s->imodifiers = 0;
|
438 | b00052e4 | balrog | s->fifopos = 0;
|
439 | b00052e4 | balrog | s->fifolen = 0;
|
440 | b00052e4 | balrog | s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s); |
441 | b00052e4 | balrog | spitz_keyboard_tick(s); |
442 | b00052e4 | balrog | } |
443 | b00052e4 | balrog | |
444 | b00052e4 | balrog | #undef SHIFT
|
445 | b00052e4 | balrog | #undef CTRL
|
446 | b00052e4 | balrog | #undef FN
|
447 | b00052e4 | balrog | |
448 | aa941b94 | balrog | static void spitz_keyboard_save(QEMUFile *f, void *opaque) |
449 | aa941b94 | balrog | { |
450 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
451 | aa941b94 | balrog | int i;
|
452 | aa941b94 | balrog | |
453 | aa941b94 | balrog | qemu_put_be16s(f, &s->sense_state); |
454 | aa941b94 | balrog | qemu_put_be16s(f, &s->strobe_state); |
455 | aa941b94 | balrog | for (i = 0; i < 5; i ++) |
456 | aa941b94 | balrog | qemu_put_byte(f, spitz_gpio_invert[i]); |
457 | aa941b94 | balrog | } |
458 | aa941b94 | balrog | |
459 | aa941b94 | balrog | static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id) |
460 | aa941b94 | balrog | { |
461 | bc24a225 | Paul Brook | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
462 | aa941b94 | balrog | int i;
|
463 | aa941b94 | balrog | |
464 | aa941b94 | balrog | qemu_get_be16s(f, &s->sense_state); |
465 | aa941b94 | balrog | qemu_get_be16s(f, &s->strobe_state); |
466 | aa941b94 | balrog | for (i = 0; i < 5; i ++) |
467 | aa941b94 | balrog | spitz_gpio_invert[i] = qemu_get_byte(f); |
468 | aa941b94 | balrog | |
469 | aa941b94 | balrog | /* Release all pressed keys */
|
470 | aa941b94 | balrog | memset(s->keyrow, 0, sizeof(s->keyrow)); |
471 | aa941b94 | balrog | spitz_keyboard_sense_update(s); |
472 | aa941b94 | balrog | s->modifiers = 0;
|
473 | aa941b94 | balrog | s->imodifiers = 0;
|
474 | aa941b94 | balrog | s->fifopos = 0;
|
475 | aa941b94 | balrog | s->fifolen = 0;
|
476 | aa941b94 | balrog | |
477 | aa941b94 | balrog | return 0; |
478 | aa941b94 | balrog | } |
479 | aa941b94 | balrog | |
480 | bc24a225 | Paul Brook | static void spitz_keyboard_register(PXA2xxState *cpu) |
481 | b00052e4 | balrog | { |
482 | b00052e4 | balrog | int i, j;
|
483 | bc24a225 | Paul Brook | SpitzKeyboardState *s; |
484 | b00052e4 | balrog | |
485 | bc24a225 | Paul Brook | s = (SpitzKeyboardState *) |
486 | bc24a225 | Paul Brook | qemu_mallocz(sizeof(SpitzKeyboardState));
|
487 | bc24a225 | Paul Brook | memset(s, 0, sizeof(SpitzKeyboardState)); |
488 | b00052e4 | balrog | |
489 | b00052e4 | balrog | for (i = 0; i < 0x80; i ++) |
490 | b00052e4 | balrog | s->keymap[i] = -1;
|
491 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) |
492 | b00052e4 | balrog | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) |
493 | b00052e4 | balrog | if (spitz_keymap[i][j] != -1) |
494 | b00052e4 | balrog | s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
|
495 | b00052e4 | balrog | |
496 | 38641a52 | balrog | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
497 | 38641a52 | balrog | s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]]; |
498 | 38641a52 | balrog | |
499 | 38641a52 | balrog | for (i = 0; i < 5; i ++) |
500 | 38641a52 | balrog | s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]]; |
501 | 38641a52 | balrog | |
502 | 38641a52 | balrog | s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s, |
503 | 38641a52 | balrog | SPITZ_KEY_STROBE_NUM); |
504 | b00052e4 | balrog | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
505 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]); |
506 | b00052e4 | balrog | |
507 | b00052e4 | balrog | spitz_keyboard_pre_map(s); |
508 | b00052e4 | balrog | qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s); |
509 | aa941b94 | balrog | |
510 | aa941b94 | balrog | register_savevm("spitz_keyboard", 0, 0, |
511 | aa941b94 | balrog | spitz_keyboard_save, spitz_keyboard_load, s); |
512 | b00052e4 | balrog | } |
513 | b00052e4 | balrog | |
514 | b00052e4 | balrog | /* LCD backlight controller */
|
515 | b00052e4 | balrog | |
516 | b00052e4 | balrog | #define LCDTG_RESCTL 0x00 |
517 | b00052e4 | balrog | #define LCDTG_PHACTRL 0x01 |
518 | b00052e4 | balrog | #define LCDTG_DUTYCTRL 0x02 |
519 | b00052e4 | balrog | #define LCDTG_POWERREG0 0x03 |
520 | b00052e4 | balrog | #define LCDTG_POWERREG1 0x04 |
521 | b00052e4 | balrog | #define LCDTG_GPOR3 0x05 |
522 | b00052e4 | balrog | #define LCDTG_PICTRL 0x06 |
523 | b00052e4 | balrog | #define LCDTG_POLCTRL 0x07 |
524 | b00052e4 | balrog | |
525 | a984a69e | Paul Brook | typedef struct { |
526 | a984a69e | Paul Brook | SSISlave ssidev; |
527 | a984a69e | Paul Brook | int bl_intensity;
|
528 | a984a69e | Paul Brook | int bl_power;
|
529 | a984a69e | Paul Brook | } SpitzLCDTG; |
530 | b00052e4 | balrog | |
531 | a984a69e | Paul Brook | static void spitz_bl_update(SpitzLCDTG *s) |
532 | b00052e4 | balrog | { |
533 | a984a69e | Paul Brook | if (s->bl_power && s->bl_intensity)
|
534 | a984a69e | Paul Brook | zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
|
535 | b00052e4 | balrog | else
|
536 | 89cdb6af | balrog | zaurus_printf("LCD Backlight now off\n");
|
537 | b00052e4 | balrog | } |
538 | b00052e4 | balrog | |
539 | a984a69e | Paul Brook | /* FIXME: Implement GPIO properly and remove this hack. */
|
540 | a984a69e | Paul Brook | static SpitzLCDTG *spitz_lcdtg;
|
541 | a984a69e | Paul Brook | |
542 | 38641a52 | balrog | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
543 | b00052e4 | balrog | { |
544 | a984a69e | Paul Brook | SpitzLCDTG *s = spitz_lcdtg; |
545 | a984a69e | Paul Brook | int prev = s->bl_intensity;
|
546 | b00052e4 | balrog | |
547 | b00052e4 | balrog | if (level)
|
548 | a984a69e | Paul Brook | s->bl_intensity &= ~0x20;
|
549 | b00052e4 | balrog | else
|
550 | a984a69e | Paul Brook | s->bl_intensity |= 0x20;
|
551 | b00052e4 | balrog | |
552 | a984a69e | Paul Brook | if (s->bl_power && prev != s->bl_intensity)
|
553 | a984a69e | Paul Brook | spitz_bl_update(s); |
554 | b00052e4 | balrog | } |
555 | b00052e4 | balrog | |
556 | 38641a52 | balrog | static inline void spitz_bl_power(void *opaque, int line, int level) |
557 | b00052e4 | balrog | { |
558 | a984a69e | Paul Brook | SpitzLCDTG *s = spitz_lcdtg; |
559 | a984a69e | Paul Brook | s->bl_power = !!level; |
560 | a984a69e | Paul Brook | spitz_bl_update(s); |
561 | b00052e4 | balrog | } |
562 | b00052e4 | balrog | |
563 | a984a69e | Paul Brook | static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
|
564 | b00052e4 | balrog | { |
565 | a984a69e | Paul Brook | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
566 | a984a69e | Paul Brook | int addr;
|
567 | a984a69e | Paul Brook | addr = value >> 5;
|
568 | a984a69e | Paul Brook | value &= 0x1f;
|
569 | b00052e4 | balrog | |
570 | b00052e4 | balrog | switch (addr) {
|
571 | b00052e4 | balrog | case LCDTG_RESCTL:
|
572 | b00052e4 | balrog | if (value)
|
573 | 89cdb6af | balrog | zaurus_printf("LCD in QVGA mode\n");
|
574 | b00052e4 | balrog | else
|
575 | 89cdb6af | balrog | zaurus_printf("LCD in VGA mode\n");
|
576 | b00052e4 | balrog | break;
|
577 | b00052e4 | balrog | |
578 | b00052e4 | balrog | case LCDTG_DUTYCTRL:
|
579 | a984a69e | Paul Brook | s->bl_intensity &= ~0x1f;
|
580 | a984a69e | Paul Brook | s->bl_intensity |= value; |
581 | a984a69e | Paul Brook | if (s->bl_power)
|
582 | a984a69e | Paul Brook | spitz_bl_update(s); |
583 | b00052e4 | balrog | break;
|
584 | b00052e4 | balrog | |
585 | b00052e4 | balrog | case LCDTG_POWERREG0:
|
586 | b00052e4 | balrog | /* Set common voltage to M62332FP */
|
587 | b00052e4 | balrog | break;
|
588 | b00052e4 | balrog | } |
589 | a984a69e | Paul Brook | return 0; |
590 | a984a69e | Paul Brook | } |
591 | a984a69e | Paul Brook | |
592 | a984a69e | Paul Brook | static void spitz_lcdtg_save(QEMUFile *f, void *opaque) |
593 | a984a69e | Paul Brook | { |
594 | a984a69e | Paul Brook | SpitzLCDTG *s = (SpitzLCDTG *)opaque; |
595 | a984a69e | Paul Brook | qemu_put_be32(f, s->bl_intensity); |
596 | a984a69e | Paul Brook | qemu_put_be32(f, s->bl_power); |
597 | a984a69e | Paul Brook | } |
598 | a984a69e | Paul Brook | |
599 | a984a69e | Paul Brook | static int spitz_lcdtg_load(QEMUFile *f, void *opaque, int version_id) |
600 | a984a69e | Paul Brook | { |
601 | a984a69e | Paul Brook | SpitzLCDTG *s = (SpitzLCDTG *)opaque; |
602 | a984a69e | Paul Brook | s->bl_intensity = qemu_get_be32(f); |
603 | a984a69e | Paul Brook | s->bl_power = qemu_get_be32(f); |
604 | a984a69e | Paul Brook | return 0; |
605 | a984a69e | Paul Brook | } |
606 | a984a69e | Paul Brook | |
607 | a984a69e | Paul Brook | static void spitz_lcdtg_init(SSISlave *dev) |
608 | a984a69e | Paul Brook | { |
609 | a984a69e | Paul Brook | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
610 | a984a69e | Paul Brook | |
611 | a984a69e | Paul Brook | spitz_lcdtg = s; |
612 | a984a69e | Paul Brook | s->bl_power = 0;
|
613 | a984a69e | Paul Brook | s->bl_intensity = 0x20;
|
614 | a984a69e | Paul Brook | |
615 | a984a69e | Paul Brook | register_savevm("spitz-lcdtg", -1, 1, |
616 | a984a69e | Paul Brook | spitz_lcdtg_save, spitz_lcdtg_load, s); |
617 | b00052e4 | balrog | } |
618 | b00052e4 | balrog | |
619 | b00052e4 | balrog | /* SSP devices */
|
620 | b00052e4 | balrog | |
621 | b00052e4 | balrog | #define CORGI_SSP_PORT 2 |
622 | b00052e4 | balrog | |
623 | b00052e4 | balrog | #define SPITZ_GPIO_LCDCON_CS 53 |
624 | b00052e4 | balrog | #define SPITZ_GPIO_ADS7846_CS 14 |
625 | b00052e4 | balrog | #define SPITZ_GPIO_MAX1111_CS 20 |
626 | b00052e4 | balrog | #define SPITZ_GPIO_TP_INT 11 |
627 | b00052e4 | balrog | |
628 | a984a69e | Paul Brook | static DeviceState *max1111;
|
629 | b00052e4 | balrog | |
630 | b00052e4 | balrog | /* "Demux" the signal based on current chipselect */
|
631 | a984a69e | Paul Brook | typedef struct { |
632 | a984a69e | Paul Brook | SSISlave ssidev; |
633 | a984a69e | Paul Brook | SSIBus *bus[3];
|
634 | a984a69e | Paul Brook | int enable[3]; |
635 | a984a69e | Paul Brook | } CorgiSSPState; |
636 | b00052e4 | balrog | |
637 | a984a69e | Paul Brook | static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
|
638 | b00052e4 | balrog | { |
639 | a984a69e | Paul Brook | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
640 | a984a69e | Paul Brook | int i;
|
641 | a984a69e | Paul Brook | |
642 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
643 | a984a69e | Paul Brook | if (s->enable[i]) {
|
644 | a984a69e | Paul Brook | return ssi_transfer(s->bus[i], value);
|
645 | a984a69e | Paul Brook | } |
646 | a984a69e | Paul Brook | } |
647 | a984a69e | Paul Brook | return 0; |
648 | b00052e4 | balrog | } |
649 | b00052e4 | balrog | |
650 | 38641a52 | balrog | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
651 | b00052e4 | balrog | { |
652 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
653 | a984a69e | Paul Brook | assert(line >= 0 && line < 3); |
654 | a984a69e | Paul Brook | s->enable[line] = !level; |
655 | b00052e4 | balrog | } |
656 | b00052e4 | balrog | |
657 | b00052e4 | balrog | #define MAX1111_BATT_VOLT 1 |
658 | b00052e4 | balrog | #define MAX1111_BATT_TEMP 2 |
659 | b00052e4 | balrog | #define MAX1111_ACIN_VOLT 3 |
660 | b00052e4 | balrog | |
661 | b00052e4 | balrog | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ |
662 | b00052e4 | balrog | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ |
663 | b00052e4 | balrog | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ |
664 | b00052e4 | balrog | |
665 | 38641a52 | balrog | static void spitz_adc_temp_on(void *opaque, int line, int level) |
666 | b00052e4 | balrog | { |
667 | b00052e4 | balrog | if (!max1111)
|
668 | b00052e4 | balrog | return;
|
669 | b00052e4 | balrog | |
670 | b00052e4 | balrog | if (level)
|
671 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); |
672 | b00052e4 | balrog | else
|
673 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
674 | b00052e4 | balrog | } |
675 | b00052e4 | balrog | |
676 | aa941b94 | balrog | static void spitz_ssp_save(QEMUFile *f, void *opaque) |
677 | aa941b94 | balrog | { |
678 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
679 | a984a69e | Paul Brook | int i;
|
680 | a984a69e | Paul Brook | |
681 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
682 | a984a69e | Paul Brook | qemu_put_be32(f, s->enable[i]); |
683 | a984a69e | Paul Brook | } |
684 | aa941b94 | balrog | } |
685 | aa941b94 | balrog | |
686 | aa941b94 | balrog | static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id) |
687 | aa941b94 | balrog | { |
688 | a984a69e | Paul Brook | CorgiSSPState *s = (CorgiSSPState *)opaque; |
689 | a984a69e | Paul Brook | int i;
|
690 | aa941b94 | balrog | |
691 | a984a69e | Paul Brook | if (version_id != 1) { |
692 | a984a69e | Paul Brook | return -EINVAL;
|
693 | a984a69e | Paul Brook | } |
694 | a984a69e | Paul Brook | for (i = 0; i < 3; i++) { |
695 | a984a69e | Paul Brook | s->enable[i] = qemu_get_be32(f); |
696 | a984a69e | Paul Brook | } |
697 | aa941b94 | balrog | return 0; |
698 | aa941b94 | balrog | } |
699 | aa941b94 | balrog | |
700 | a984a69e | Paul Brook | static void corgi_ssp_init(SSISlave *dev) |
701 | a984a69e | Paul Brook | { |
702 | a984a69e | Paul Brook | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
703 | a984a69e | Paul Brook | |
704 | a984a69e | Paul Brook | qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
|
705 | 02e2da45 | Paul Brook | s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0"); |
706 | 02e2da45 | Paul Brook | s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1"); |
707 | 02e2da45 | Paul Brook | s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2"); |
708 | a984a69e | Paul Brook | |
709 | a984a69e | Paul Brook | register_savevm("spitz_ssp", -1, 1, spitz_ssp_save, spitz_ssp_load, s); |
710 | a984a69e | Paul Brook | } |
711 | a984a69e | Paul Brook | |
712 | bc24a225 | Paul Brook | static void spitz_ssp_attach(PXA2xxState *cpu) |
713 | b00052e4 | balrog | { |
714 | a984a69e | Paul Brook | DeviceState *mux; |
715 | a984a69e | Paul Brook | DeviceState *dev; |
716 | a984a69e | Paul Brook | void *bus;
|
717 | a984a69e | Paul Brook | |
718 | a984a69e | Paul Brook | mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); |
719 | 38641a52 | balrog | |
720 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi0");
|
721 | a984a69e | Paul Brook | dev = ssi_create_slave(bus, "spitz-lcdtg");
|
722 | b00052e4 | balrog | |
723 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi1");
|
724 | a984a69e | Paul Brook | dev = ssi_create_slave(bus, "ads7846");
|
725 | a984a69e | Paul Brook | qdev_connect_gpio_out(dev, 0,
|
726 | a984a69e | Paul Brook | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]); |
727 | b00052e4 | balrog | |
728 | a984a69e | Paul Brook | bus = qdev_get_child_bus(mux, "ssi2");
|
729 | a984a69e | Paul Brook | max1111 = ssi_create_slave(bus, "max1111");
|
730 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
731 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
732 | b00052e4 | balrog | max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); |
733 | b00052e4 | balrog | |
734 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
735 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 0));
|
736 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
737 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 1));
|
738 | a984a69e | Paul Brook | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
739 | a984a69e | Paul Brook | qdev_get_gpio_in(mux, 2));
|
740 | b00052e4 | balrog | } |
741 | b00052e4 | balrog | |
742 | b00052e4 | balrog | /* CF Microdrive */
|
743 | b00052e4 | balrog | |
744 | bc24a225 | Paul Brook | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
745 | b00052e4 | balrog | { |
746 | bc24a225 | Paul Brook | PCMCIACardState *md; |
747 | e4bcb14c | ths | int index;
|
748 | e4bcb14c | ths | BlockDriverState *bs; |
749 | b00052e4 | balrog | |
750 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 0, 0); |
751 | e4bcb14c | ths | if (index == -1) |
752 | e4bcb14c | ths | return;
|
753 | e4bcb14c | ths | bs = drives_table[index].bdrv; |
754 | e4bcb14c | ths | if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
|
755 | b00052e4 | balrog | md = dscm1xxxx_init(bs); |
756 | 15b18ec2 | balrog | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); |
757 | b00052e4 | balrog | } |
758 | b00052e4 | balrog | } |
759 | b00052e4 | balrog | |
760 | adb86c37 | balrog | /* Wm8750 and Max7310 on I2C */
|
761 | adb86c37 | balrog | |
762 | adb86c37 | balrog | #define AKITA_MAX_ADDR 0x18 |
763 | 611d7189 | balrog | #define SPITZ_WM_ADDRL 0x1b |
764 | 611d7189 | balrog | #define SPITZ_WM_ADDRH 0x1a |
765 | adb86c37 | balrog | |
766 | adb86c37 | balrog | #define SPITZ_GPIO_WM 5 |
767 | adb86c37 | balrog | |
768 | adb86c37 | balrog | #ifdef HAS_AUDIO
|
769 | 38641a52 | balrog | static void spitz_wm8750_addr(void *opaque, int line, int level) |
770 | adb86c37 | balrog | { |
771 | adb86c37 | balrog | i2c_slave *wm = (i2c_slave *) opaque; |
772 | adb86c37 | balrog | if (level)
|
773 | adb86c37 | balrog | i2c_set_slave_address(wm, SPITZ_WM_ADDRH); |
774 | adb86c37 | balrog | else
|
775 | adb86c37 | balrog | i2c_set_slave_address(wm, SPITZ_WM_ADDRL); |
776 | adb86c37 | balrog | } |
777 | adb86c37 | balrog | #endif
|
778 | adb86c37 | balrog | |
779 | bc24a225 | Paul Brook | static void spitz_i2c_setup(PXA2xxState *cpu) |
780 | adb86c37 | balrog | { |
781 | adb86c37 | balrog | /* Attach the CPU on one end of our I2C bus. */
|
782 | adb86c37 | balrog | i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
|
783 | adb86c37 | balrog | |
784 | adb86c37 | balrog | #ifdef HAS_AUDIO
|
785 | cdbe40ca | Paul Brook | DeviceState *wm; |
786 | adb86c37 | balrog | |
787 | adb86c37 | balrog | /* Attach a WM8750 to the bus */
|
788 | cdbe40ca | Paul Brook | wm = i2c_create_slave(bus, "wm8750", 0); |
789 | adb86c37 | balrog | |
790 | 38641a52 | balrog | spitz_wm8750_addr(wm, 0, 0); |
791 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM, |
792 | 38641a52 | balrog | qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); |
793 | adb86c37 | balrog | /* .. and to the sound interface. */
|
794 | adb86c37 | balrog | cpu->i2s->opaque = wm; |
795 | adb86c37 | balrog | cpu->i2s->codec_out = wm8750_dac_dat; |
796 | adb86c37 | balrog | cpu->i2s->codec_in = wm8750_adc_dat; |
797 | adb86c37 | balrog | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); |
798 | adb86c37 | balrog | #endif
|
799 | adb86c37 | balrog | } |
800 | adb86c37 | balrog | |
801 | bc24a225 | Paul Brook | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
802 | adb86c37 | balrog | { |
803 | adb86c37 | balrog | /* Attach a Max7310 to Akita I2C bus. */
|
804 | 6c0bd6bd | Paul Brook | i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
805 | 6c0bd6bd | Paul Brook | AKITA_MAX_ADDR); |
806 | adb86c37 | balrog | } |
807 | adb86c37 | balrog | |
808 | b00052e4 | balrog | /* Other peripherals */
|
809 | b00052e4 | balrog | |
810 | 38641a52 | balrog | static void spitz_out_switch(void *opaque, int line, int level) |
811 | b00052e4 | balrog | { |
812 | 38641a52 | balrog | switch (line) {
|
813 | 38641a52 | balrog | case 0: |
814 | 89cdb6af | balrog | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
815 | 38641a52 | balrog | break;
|
816 | 38641a52 | balrog | case 1: |
817 | 89cdb6af | balrog | zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
818 | 38641a52 | balrog | break;
|
819 | 38641a52 | balrog | case 2: |
820 | 89cdb6af | balrog | zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
821 | 38641a52 | balrog | break;
|
822 | 38641a52 | balrog | case 3: |
823 | 89cdb6af | balrog | zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
824 | 38641a52 | balrog | break;
|
825 | 38641a52 | balrog | case 4: |
826 | 38641a52 | balrog | spitz_bl_bit5(opaque, line, level); |
827 | 38641a52 | balrog | break;
|
828 | 38641a52 | balrog | case 5: |
829 | 38641a52 | balrog | spitz_bl_power(opaque, line, level); |
830 | 38641a52 | balrog | break;
|
831 | 38641a52 | balrog | case 6: |
832 | 38641a52 | balrog | spitz_adc_temp_on(opaque, line, level); |
833 | 38641a52 | balrog | break;
|
834 | 38641a52 | balrog | } |
835 | b00052e4 | balrog | } |
836 | b00052e4 | balrog | |
837 | b00052e4 | balrog | #define SPITZ_SCP_LED_GREEN 1 |
838 | b00052e4 | balrog | #define SPITZ_SCP_JK_B 2 |
839 | b00052e4 | balrog | #define SPITZ_SCP_CHRG_ON 3 |
840 | b00052e4 | balrog | #define SPITZ_SCP_MUTE_L 4 |
841 | b00052e4 | balrog | #define SPITZ_SCP_MUTE_R 5 |
842 | b00052e4 | balrog | #define SPITZ_SCP_CF_POWER 6 |
843 | b00052e4 | balrog | #define SPITZ_SCP_LED_ORANGE 7 |
844 | b00052e4 | balrog | #define SPITZ_SCP_JK_A 8 |
845 | b00052e4 | balrog | #define SPITZ_SCP_ADC_TEMP_ON 9 |
846 | b00052e4 | balrog | #define SPITZ_SCP2_IR_ON 1 |
847 | b00052e4 | balrog | #define SPITZ_SCP2_AKIN_PULLUP 2 |
848 | b00052e4 | balrog | #define SPITZ_SCP2_BACKLIGHT_CONT 7 |
849 | b00052e4 | balrog | #define SPITZ_SCP2_BACKLIGHT_ON 8 |
850 | b00052e4 | balrog | #define SPITZ_SCP2_MIC_BIAS 9 |
851 | b00052e4 | balrog | |
852 | bc24a225 | Paul Brook | static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
853 | bc24a225 | Paul Brook | ScoopInfo *scp0, ScoopInfo *scp1) |
854 | b00052e4 | balrog | { |
855 | 38641a52 | balrog | qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
|
856 | 38641a52 | balrog | |
857 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
|
858 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
|
859 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
|
860 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
|
861 | b00052e4 | balrog | |
862 | e33d8cdb | balrog | if (scp1) {
|
863 | e33d8cdb | balrog | scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
|
864 | e33d8cdb | balrog | scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
|
865 | b00052e4 | balrog | } |
866 | b00052e4 | balrog | |
867 | e33d8cdb | balrog | scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
|
868 | b00052e4 | balrog | } |
869 | b00052e4 | balrog | |
870 | b00052e4 | balrog | #define SPITZ_GPIO_HSYNC 22 |
871 | b00052e4 | balrog | #define SPITZ_GPIO_SD_DETECT 9 |
872 | b00052e4 | balrog | #define SPITZ_GPIO_SD_WP 81 |
873 | b00052e4 | balrog | #define SPITZ_GPIO_ON_RESET 89 |
874 | b00052e4 | balrog | #define SPITZ_GPIO_BAT_COVER 90 |
875 | b00052e4 | balrog | #define SPITZ_GPIO_CF1_IRQ 105 |
876 | b00052e4 | balrog | #define SPITZ_GPIO_CF1_CD 94 |
877 | b00052e4 | balrog | #define SPITZ_GPIO_CF2_IRQ 106 |
878 | b00052e4 | balrog | #define SPITZ_GPIO_CF2_CD 93 |
879 | b00052e4 | balrog | |
880 | 38641a52 | balrog | static int spitz_hsync; |
881 | b00052e4 | balrog | |
882 | 38641a52 | balrog | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
883 | b00052e4 | balrog | { |
884 | bc24a225 | Paul Brook | PXA2xxState *cpu = (PXA2xxState *) opaque; |
885 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync); |
886 | b00052e4 | balrog | spitz_hsync ^= 1;
|
887 | b00052e4 | balrog | } |
888 | b00052e4 | balrog | |
889 | bc24a225 | Paul Brook | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
890 | b00052e4 | balrog | { |
891 | 38641a52 | balrog | qemu_irq lcd_hsync; |
892 | b00052e4 | balrog | /*
|
893 | b00052e4 | balrog | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
|
894 | b00052e4 | balrog | * read to satisfy broken guests that poll-wait for hsync.
|
895 | b00052e4 | balrog | * Simulating a real hsync event would be less practical and
|
896 | b00052e4 | balrog | * wouldn't guarantee that a guest ever exits the loop.
|
897 | b00052e4 | balrog | */
|
898 | b00052e4 | balrog | spitz_hsync = 0;
|
899 | 38641a52 | balrog | lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0]; |
900 | 38641a52 | balrog | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
901 | 38641a52 | balrog | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); |
902 | b00052e4 | balrog | |
903 | b00052e4 | balrog | /* MMC/SD host */
|
904 | 02ce600c | balrog | pxa2xx_mmci_handlers(cpu->mmc, |
905 | 02ce600c | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], |
906 | 02ce600c | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]); |
907 | b00052e4 | balrog | |
908 | b00052e4 | balrog | /* Battery lock always closed */
|
909 | 38641a52 | balrog | qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]); |
910 | b00052e4 | balrog | |
911 | b00052e4 | balrog | /* Handle reset */
|
912 | 38641a52 | balrog | pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); |
913 | b00052e4 | balrog | |
914 | b00052e4 | balrog | /* PCMCIA signals: card's IRQ and Card-Detect */
|
915 | b00052e4 | balrog | if (slots >= 1) |
916 | 38641a52 | balrog | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
|
917 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ], |
918 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]); |
919 | b00052e4 | balrog | if (slots >= 2) |
920 | 38641a52 | balrog | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
|
921 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ], |
922 | 38641a52 | balrog | pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]); |
923 | b00052e4 | balrog | |
924 | b00052e4 | balrog | /* Initialise the screen rotation related signals */
|
925 | b00052e4 | balrog | spitz_gpio_invert[3] = 0; /* Always open */ |
926 | b00052e4 | balrog | if (graphic_rotate) { /* Tablet mode */ |
927 | b00052e4 | balrog | spitz_gpio_invert[4] = 0; |
928 | b00052e4 | balrog | } else { /* Portrait mode */ |
929 | b00052e4 | balrog | spitz_gpio_invert[4] = 1; |
930 | b00052e4 | balrog | } |
931 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA], |
932 | 38641a52 | balrog | spitz_gpio_invert[3]);
|
933 | 38641a52 | balrog | qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB], |
934 | 38641a52 | balrog | spitz_gpio_invert[4]);
|
935 | b00052e4 | balrog | } |
936 | b00052e4 | balrog | |
937 | b00052e4 | balrog | /* Board init. */
|
938 | b00052e4 | balrog | enum spitz_model_e { spitz, akita, borzoi, terrier };
|
939 | b00052e4 | balrog | |
940 | 7fb4fdcf | balrog | #define SPITZ_RAM 0x04000000 |
941 | 7fb4fdcf | balrog | #define SPITZ_ROM 0x00800000 |
942 | 7fb4fdcf | balrog | |
943 | f93eb9ff | balrog | static struct arm_boot_info spitz_binfo = { |
944 | f93eb9ff | balrog | .loader_start = PXA2XX_SDRAM_BASE, |
945 | f93eb9ff | balrog | .ram_size = 0x04000000,
|
946 | f93eb9ff | balrog | }; |
947 | f93eb9ff | balrog | |
948 | fbe1b595 | Paul Brook | static void spitz_common_init(ram_addr_t ram_size, |
949 | 3023f332 | aliguori | const char *kernel_filename, |
950 | b00052e4 | balrog | const char *kernel_cmdline, const char *initrd_filename, |
951 | 4207117c | balrog | const char *cpu_model, enum spitz_model_e model, int arm_id) |
952 | b00052e4 | balrog | { |
953 | bc24a225 | Paul Brook | PXA2xxState *cpu; |
954 | bc24a225 | Paul Brook | ScoopInfo *scp0, *scp1 = NULL;
|
955 | b00052e4 | balrog | |
956 | 4207117c | balrog | if (!cpu_model)
|
957 | 4207117c | balrog | cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; |
958 | b00052e4 | balrog | |
959 | d95b2f8d | balrog | /* Setup CPU & memory */
|
960 | 3023f332 | aliguori | cpu = pxa270_init(spitz_binfo.ram_size, cpu_model); |
961 | b00052e4 | balrog | |
962 | b00052e4 | balrog | sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
963 | b00052e4 | balrog | |
964 | 7fb4fdcf | balrog | cpu_register_physical_memory(0, SPITZ_ROM,
|
965 | 7fb4fdcf | balrog | qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM); |
966 | b00052e4 | balrog | |
967 | b00052e4 | balrog | /* Setup peripherals */
|
968 | b00052e4 | balrog | spitz_keyboard_register(cpu); |
969 | b00052e4 | balrog | |
970 | b00052e4 | balrog | spitz_ssp_attach(cpu); |
971 | b00052e4 | balrog | |
972 | e33d8cdb | balrog | scp0 = scoop_init(cpu, 0, 0x10800000); |
973 | e33d8cdb | balrog | if (model != akita) {
|
974 | e33d8cdb | balrog | scp1 = scoop_init(cpu, 1, 0x08800040); |
975 | e33d8cdb | balrog | } |
976 | b00052e4 | balrog | |
977 | e33d8cdb | balrog | spitz_scoop_gpio_setup(cpu, scp0, scp1); |
978 | b00052e4 | balrog | |
979 | b00052e4 | balrog | spitz_gpio_setup(cpu, (model == akita) ? 1 : 2); |
980 | b00052e4 | balrog | |
981 | adb86c37 | balrog | spitz_i2c_setup(cpu); |
982 | adb86c37 | balrog | |
983 | adb86c37 | balrog | if (model == akita)
|
984 | adb86c37 | balrog | spitz_akita_i2c_setup(cpu); |
985 | adb86c37 | balrog | |
986 | b00052e4 | balrog | if (model == terrier)
|
987 | bf5ee248 | balrog | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
|
988 | 15b18ec2 | balrog | spitz_microdrive_attach(cpu, 1);
|
989 | b00052e4 | balrog | else if (model != akita) |
990 | 15b18ec2 | balrog | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
|
991 | 15b18ec2 | balrog | spitz_microdrive_attach(cpu, 0);
|
992 | b00052e4 | balrog | |
993 | b00052e4 | balrog | /* Setup initial (reset) machine state */
|
994 | f93eb9ff | balrog | cpu->env->regs[15] = spitz_binfo.loader_start;
|
995 | b00052e4 | balrog | |
996 | f93eb9ff | balrog | spitz_binfo.kernel_filename = kernel_filename; |
997 | f93eb9ff | balrog | spitz_binfo.kernel_cmdline = kernel_cmdline; |
998 | f93eb9ff | balrog | spitz_binfo.initrd_filename = initrd_filename; |
999 | f93eb9ff | balrog | spitz_binfo.board_id = arm_id; |
1000 | f93eb9ff | balrog | arm_load_kernel(cpu->env, &spitz_binfo); |
1001 | f78630ab | pbrook | sl_bootparam_write(SL_PXA_PARAM_BASE); |
1002 | b00052e4 | balrog | } |
1003 | b00052e4 | balrog | |
1004 | fbe1b595 | Paul Brook | static void spitz_init(ram_addr_t ram_size, |
1005 | 3023f332 | aliguori | const char *boot_device, |
1006 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1007 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1008 | b00052e4 | balrog | { |
1009 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1010 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
1011 | b00052e4 | balrog | } |
1012 | b00052e4 | balrog | |
1013 | fbe1b595 | Paul Brook | static void borzoi_init(ram_addr_t ram_size, |
1014 | 3023f332 | aliguori | const char *boot_device, |
1015 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1016 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1017 | b00052e4 | balrog | { |
1018 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1019 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
1020 | b00052e4 | balrog | } |
1021 | b00052e4 | balrog | |
1022 | fbe1b595 | Paul Brook | static void akita_init(ram_addr_t ram_size, |
1023 | 3023f332 | aliguori | const char *boot_device, |
1024 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1025 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1026 | b00052e4 | balrog | { |
1027 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1028 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
1029 | b00052e4 | balrog | } |
1030 | b00052e4 | balrog | |
1031 | fbe1b595 | Paul Brook | static void terrier_init(ram_addr_t ram_size, |
1032 | 3023f332 | aliguori | const char *boot_device, |
1033 | b00052e4 | balrog | const char *kernel_filename, const char *kernel_cmdline, |
1034 | b00052e4 | balrog | const char *initrd_filename, const char *cpu_model) |
1035 | b00052e4 | balrog | { |
1036 | fbe1b595 | Paul Brook | spitz_common_init(ram_size, kernel_filename, |
1037 | 4207117c | balrog | kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
1038 | b00052e4 | balrog | } |
1039 | b00052e4 | balrog | |
1040 | 11be4b3e | Stefan Weil | static QEMUMachine akitapda_machine = {
|
1041 | 4b32e168 | aliguori | .name = "akita",
|
1042 | 4b32e168 | aliguori | .desc = "Akita PDA (PXA270)",
|
1043 | 4b32e168 | aliguori | .init = akita_init, |
1044 | b00052e4 | balrog | }; |
1045 | b00052e4 | balrog | |
1046 | f80f9ec9 | Anthony Liguori | static QEMUMachine spitzpda_machine = {
|
1047 | 4b32e168 | aliguori | .name = "spitz",
|
1048 | 4b32e168 | aliguori | .desc = "Spitz PDA (PXA270)",
|
1049 | 4b32e168 | aliguori | .init = spitz_init, |
1050 | b00052e4 | balrog | }; |
1051 | b00052e4 | balrog | |
1052 | f80f9ec9 | Anthony Liguori | static QEMUMachine borzoipda_machine = {
|
1053 | 4b32e168 | aliguori | .name = "borzoi",
|
1054 | 4b32e168 | aliguori | .desc = "Borzoi PDA (PXA270)",
|
1055 | 4b32e168 | aliguori | .init = borzoi_init, |
1056 | b00052e4 | balrog | }; |
1057 | b00052e4 | balrog | |
1058 | f80f9ec9 | Anthony Liguori | static QEMUMachine terrierpda_machine = {
|
1059 | 4b32e168 | aliguori | .name = "terrier",
|
1060 | 4b32e168 | aliguori | .desc = "Terrier PDA (PXA270)",
|
1061 | 4b32e168 | aliguori | .init = terrier_init, |
1062 | b00052e4 | balrog | }; |
1063 | a984a69e | Paul Brook | |
1064 | f80f9ec9 | Anthony Liguori | static void spitz_machine_init(void) |
1065 | f80f9ec9 | Anthony Liguori | { |
1066 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&akitapda_machine); |
1067 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&spitzpda_machine); |
1068 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&borzoipda_machine); |
1069 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&terrierpda_machine); |
1070 | f80f9ec9 | Anthony Liguori | } |
1071 | f80f9ec9 | Anthony Liguori | |
1072 | f80f9ec9 | Anthony Liguori | machine_init(spitz_machine_init); |
1073 | f80f9ec9 | Anthony Liguori | |
1074 | a984a69e | Paul Brook | static SSISlaveInfo corgi_ssp_info = {
|
1075 | 074f2fff | Gerd Hoffmann | .qdev.name = "corgi-ssp",
|
1076 | 074f2fff | Gerd Hoffmann | .qdev.size = sizeof(CorgiSSPState),
|
1077 | a984a69e | Paul Brook | .init = corgi_ssp_init, |
1078 | a984a69e | Paul Brook | .transfer = corgi_ssp_transfer |
1079 | a984a69e | Paul Brook | }; |
1080 | a984a69e | Paul Brook | |
1081 | a984a69e | Paul Brook | static SSISlaveInfo spitz_lcdtg_info = {
|
1082 | 074f2fff | Gerd Hoffmann | .qdev.name = "spitz-lcdtg",
|
1083 | 074f2fff | Gerd Hoffmann | .qdev.size = sizeof(SpitzLCDTG),
|
1084 | a984a69e | Paul Brook | .init = spitz_lcdtg_init, |
1085 | a984a69e | Paul Brook | .transfer = spitz_lcdtg_transfer |
1086 | a984a69e | Paul Brook | }; |
1087 | a984a69e | Paul Brook | |
1088 | a984a69e | Paul Brook | static void spitz_register_devices(void) |
1089 | a984a69e | Paul Brook | { |
1090 | 074f2fff | Gerd Hoffmann | ssi_register_slave(&corgi_ssp_info); |
1091 | 074f2fff | Gerd Hoffmann | ssi_register_slave(&spitz_lcdtg_info); |
1092 | a984a69e | Paul Brook | } |
1093 | a984a69e | Paul Brook | |
1094 | a984a69e | Paul Brook | device_init(spitz_register_devices) |