Revision 33c263df target-i386/op_helper.c
| b/target-i386/op_helper.c | ||
|---|---|---|
| 3005 | 3005 |
} |
| 3006 | 3006 |
helper_svm_check_intercept_param(SVM_EXIT_RDTSC, 0); |
| 3007 | 3007 |
|
| 3008 |
val = cpu_get_tsc(env); |
|
| 3008 |
val = cpu_get_tsc(env) + env->tsc_offset;
|
|
| 3009 | 3009 |
EAX = (uint32_t)(val); |
| 3010 | 3010 |
EDX = (uint32_t)(val >> 32); |
| 3011 | 3011 |
} |
| ... | ... | |
| 4851 | 4851 |
/* enable intercepts */ |
| 4852 | 4852 |
env->hflags |= HF_SVMI_MASK; |
| 4853 | 4853 |
|
| 4854 |
env->tsc_offset = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.tsc_offset)); |
|
| 4855 |
|
|
| 4854 | 4856 |
env->gdt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base)); |
| 4855 | 4857 |
env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit)); |
| 4856 | 4858 |
|
| ... | ... | |
| 5226 | 5228 |
env->intercept = 0; |
| 5227 | 5229 |
env->intercept_exceptions = 0; |
| 5228 | 5230 |
env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; |
| 5231 |
env->tsc_offset = 0; |
|
| 5229 | 5232 |
|
| 5230 | 5233 |
env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base)); |
| 5231 | 5234 |
env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit)); |
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