Revision 3475187d hw/sun4m.c
b/hw/sun4m.c | ||
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// bits |
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#define PHYS_JJ_IOMMU 0x10000000 /* I/O MMU */ |
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#define PHYS_JJ_TCX_FB 0x50000000 /* TCX frame buffer */ |
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#define PHYS_JJ_SLAVIO 0x70000000 /* Slavio base */ |
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#define PHYS_JJ_ESPDMA 0x78400000 /* ESP DMA controller */ |
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#define PHYS_JJ_ESP 0x78800000 /* ESP SCSI */ |
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#define PHYS_JJ_ESP_IRQ 18 |
... | ... | |
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#define PHYS_JJ_SER_IRQ 15 |
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#define PHYS_JJ_FDC 0x71400000 /* Floppy */ |
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#define PHYS_JJ_FLOPPY_IRQ 22 |
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#define PHYS_JJ_ME_IRQ 30 /* Module error, power fail */ |
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/* TSC handling */ |
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... | ... | |
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return iommu_translate_local(iommu, addr); |
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} |
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static void *slavio_misc; |
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void qemu_system_powerdown(void) |
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{ |
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slavio_set_power_fail(slavio_misc, 1); |
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} |
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/* Sun4m hardware initialisation */ |
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static void sun4m_init(int ram_size, int vga_ram_size, int boot_device, |
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DisplayState *ds, const char **fd_filename, int snapshot, |
... | ... | |
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slavio_serial_init(PHYS_JJ_SER, PHYS_JJ_SER_IRQ, serial_hds[1], serial_hds[0]); |
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fdctrl_init(PHYS_JJ_FLOPPY_IRQ, 0, 1, PHYS_JJ_FDC, fd_table); |
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esp_init(bs_table, PHYS_JJ_ESP_IRQ, PHYS_JJ_ESP, PHYS_JJ_ESPDMA); |
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slavio_misc = slavio_misc_init(PHYS_JJ_SLAVIO, PHYS_JJ_ME_IRQ); |
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prom_offset = ram_size + vram_size; |
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