root / hw / pcie_aer.h @ 34e65944
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1 | 34e65944 | Isaku Yamahata | /*
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2 | 34e65944 | Isaku Yamahata | * pcie_aer.h
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3 | 34e65944 | Isaku Yamahata | *
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4 | 34e65944 | Isaku Yamahata | * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
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5 | 34e65944 | Isaku Yamahata | * VA Linux Systems Japan K.K.
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6 | 34e65944 | Isaku Yamahata | *
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7 | 34e65944 | Isaku Yamahata | * This program is free software; you can redistribute it and/or modify
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8 | 34e65944 | Isaku Yamahata | * it under the terms of the GNU General Public License as published by
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9 | 34e65944 | Isaku Yamahata | * the Free Software Foundation; either version 2 of the License, or
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10 | 34e65944 | Isaku Yamahata | * (at your option) any later version.
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11 | 34e65944 | Isaku Yamahata | *
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12 | 34e65944 | Isaku Yamahata | * This program is distributed in the hope that it will be useful,
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13 | 34e65944 | Isaku Yamahata | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 34e65944 | Isaku Yamahata | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | 34e65944 | Isaku Yamahata | * GNU General Public License for more details.
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16 | 34e65944 | Isaku Yamahata | *
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17 | 34e65944 | Isaku Yamahata | * You should have received a copy of the GNU General Public License along
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18 | 34e65944 | Isaku Yamahata | * with this program; if not, see <http://www.gnu.org/licenses/>.
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19 | 34e65944 | Isaku Yamahata | */
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20 | 34e65944 | Isaku Yamahata | |
21 | 34e65944 | Isaku Yamahata | #ifndef QEMU_PCIE_AER_H
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22 | 34e65944 | Isaku Yamahata | #define QEMU_PCIE_AER_H
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23 | 34e65944 | Isaku Yamahata | |
24 | 34e65944 | Isaku Yamahata | #include "hw.h" |
25 | 34e65944 | Isaku Yamahata | |
26 | 34e65944 | Isaku Yamahata | /* definitions which PCIExpressDevice uses */
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27 | 34e65944 | Isaku Yamahata | |
28 | 34e65944 | Isaku Yamahata | /* AER log */
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29 | 34e65944 | Isaku Yamahata | struct PCIEAERLog {
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30 | 34e65944 | Isaku Yamahata | /* This structure is saved/loaded.
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31 | 34e65944 | Isaku Yamahata | So explicitly size them instead of unsigned int */
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32 | 34e65944 | Isaku Yamahata | |
33 | 34e65944 | Isaku Yamahata | /* the number of currently recorded log in log member */
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34 | 34e65944 | Isaku Yamahata | uint16_t log_num; |
35 | 34e65944 | Isaku Yamahata | |
36 | 34e65944 | Isaku Yamahata | /*
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37 | 34e65944 | Isaku Yamahata | * The maximum number of the log. Errors can be logged up to this.
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38 | 34e65944 | Isaku Yamahata | *
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39 | 34e65944 | Isaku Yamahata | * This is configurable property.
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40 | 34e65944 | Isaku Yamahata | * The specified value will be clipped down to PCIE_AER_LOG_MAX_LIMIT
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41 | 34e65944 | Isaku Yamahata | * to avoid unreasonable memory usage.
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42 | 34e65944 | Isaku Yamahata | * I bet that 128 log size would be big enough, otherwise too many errors
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43 | 34e65944 | Isaku Yamahata | * for system to function normaly. But could consecutive errors occur?
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44 | 34e65944 | Isaku Yamahata | */
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45 | 34e65944 | Isaku Yamahata | #define PCIE_AER_LOG_MAX_DEFAULT 8 |
46 | 34e65944 | Isaku Yamahata | #define PCIE_AER_LOG_MAX_LIMIT 128 |
47 | 34e65944 | Isaku Yamahata | #define PCIE_AER_LOG_MAX_UNSET 0xffff |
48 | 34e65944 | Isaku Yamahata | uint16_t log_max; |
49 | 34e65944 | Isaku Yamahata | |
50 | 34e65944 | Isaku Yamahata | /* Error log. log_max-sized array */
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51 | 34e65944 | Isaku Yamahata | PCIEAERErr *log; |
52 | 34e65944 | Isaku Yamahata | }; |
53 | 34e65944 | Isaku Yamahata | |
54 | 34e65944 | Isaku Yamahata | /* aer error message: error signaling message has only error sevirity and
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55 | 34e65944 | Isaku Yamahata | source id. See 2.2.8.3 error signaling messages */
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56 | 34e65944 | Isaku Yamahata | struct PCIEAERMsg {
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57 | 34e65944 | Isaku Yamahata | /*
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58 | 34e65944 | Isaku Yamahata | * PCI_ERR_ROOT_CMD_{COR, NONFATAL, FATAL}_EN
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59 | 34e65944 | Isaku Yamahata | * = PCI_EXP_DEVCTL_{CERE, NFERE, FERE}
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60 | 34e65944 | Isaku Yamahata | */
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61 | 34e65944 | Isaku Yamahata | uint32_t severity; |
62 | 34e65944 | Isaku Yamahata | |
63 | 34e65944 | Isaku Yamahata | uint16_t source_id; /* bdf */
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64 | 34e65944 | Isaku Yamahata | }; |
65 | 34e65944 | Isaku Yamahata | |
66 | 34e65944 | Isaku Yamahata | static inline bool |
67 | 34e65944 | Isaku Yamahata | pcie_aer_msg_is_uncor(const PCIEAERMsg *msg)
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68 | 34e65944 | Isaku Yamahata | { |
69 | 34e65944 | Isaku Yamahata | return msg->severity == PCI_ERR_ROOT_CMD_NONFATAL_EN ||
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70 | 34e65944 | Isaku Yamahata | msg->severity == PCI_ERR_ROOT_CMD_FATAL_EN; |
71 | 34e65944 | Isaku Yamahata | } |
72 | 34e65944 | Isaku Yamahata | |
73 | 34e65944 | Isaku Yamahata | /* error */
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74 | 34e65944 | Isaku Yamahata | struct PCIEAERErr {
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75 | 34e65944 | Isaku Yamahata | uint32_t status; /* error status bits */
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76 | 34e65944 | Isaku Yamahata | uint16_t source_id; /* bdf */
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77 | 34e65944 | Isaku Yamahata | |
78 | 34e65944 | Isaku Yamahata | #define PCIE_AER_ERR_IS_CORRECTABLE 0x1 /* correctable/uncorrectable */ |
79 | 34e65944 | Isaku Yamahata | #define PCIE_AER_ERR_MAYBE_ADVISORY 0x2 /* maybe advisory non-fatal */ |
80 | 34e65944 | Isaku Yamahata | #define PCIE_AER_ERR_HEADER_VALID 0x4 /* TLP header is logged */ |
81 | 34e65944 | Isaku Yamahata | #define PCIE_AER_ERR_TLP_PREFIX_PRESENT 0x8 /* TLP Prefix is logged */ |
82 | 34e65944 | Isaku Yamahata | uint16_t flags; |
83 | 34e65944 | Isaku Yamahata | |
84 | 34e65944 | Isaku Yamahata | uint32_t header[4]; /* TLP header */ |
85 | 34e65944 | Isaku Yamahata | uint32_t prefix[4]; /* TLP header prefix */ |
86 | 34e65944 | Isaku Yamahata | }; |
87 | 34e65944 | Isaku Yamahata | |
88 | 34e65944 | Isaku Yamahata | extern const VMStateDescription vmstate_pcie_aer_log; |
89 | 34e65944 | Isaku Yamahata | |
90 | 34e65944 | Isaku Yamahata | int pcie_aer_init(PCIDevice *dev, uint16_t offset);
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91 | 34e65944 | Isaku Yamahata | void pcie_aer_exit(PCIDevice *dev);
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92 | 34e65944 | Isaku Yamahata | void pcie_aer_write_config(PCIDevice *dev,
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93 | 34e65944 | Isaku Yamahata | uint32_t addr, uint32_t val, int len);
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94 | 34e65944 | Isaku Yamahata | |
95 | 34e65944 | Isaku Yamahata | /* aer root port */
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96 | 34e65944 | Isaku Yamahata | void pcie_aer_root_set_vector(PCIDevice *dev, unsigned int vector); |
97 | 34e65944 | Isaku Yamahata | void pcie_aer_root_init(PCIDevice *dev);
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98 | 34e65944 | Isaku Yamahata | void pcie_aer_root_reset(PCIDevice *dev);
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99 | 34e65944 | Isaku Yamahata | void pcie_aer_root_write_config(PCIDevice *dev,
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100 | 34e65944 | Isaku Yamahata | uint32_t addr, uint32_t val, int len,
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101 | 34e65944 | Isaku Yamahata | uint32_t root_cmd_prev); |
102 | 34e65944 | Isaku Yamahata | |
103 | 34e65944 | Isaku Yamahata | /* error injection */
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104 | 34e65944 | Isaku Yamahata | int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err); |
105 | 34e65944 | Isaku Yamahata | |
106 | 34e65944 | Isaku Yamahata | #endif /* QEMU_PCIE_AER_H */ |