Revision 360a6f2d target-arm/translate-a64.c

b/target-arm/translate-a64.c
5108 5108
    tcg_temp_free_i64(tmp);
5109 5109
}
5110 5110

  
5111
/* C6.3.31 DUP (element, scalar)
5112
 *  31                   21 20    16 15        10  9    5 4    0
5113
 * +-----------------------+--------+-------------+------+------+
5114
 * | 0 1 0 1 1 1 1 0 0 0 0 |  imm5  | 0 0 0 0 0 1 |  Rn  |  Rd  |
5115
 * +-----------------------+--------+-------------+------+------+
5116
 */
5117
static void handle_simd_dupes(DisasContext *s, int rd, int rn,
5118
                              int imm5)
5119
{
5120
    int size = ctz32(imm5);
5121
    int index;
5122
    TCGv_i64 tmp;
5123

  
5124
    if (size > 3) {
5125
        unallocated_encoding(s);
5126
        return;
5127
    }
5128

  
5129
    index = imm5 >> (size + 1);
5130

  
5131
    /* This instruction just extracts the specified element and
5132
     * zero-extends it into the bottom of the destination register.
5133
     */
5134
    tmp = tcg_temp_new_i64();
5135
    read_vec_element(s, tmp, rn, index, size);
5136
    write_fp_dreg(s, rd, tmp);
5137
    tcg_temp_free_i64(tmp);
5138
}
5139

  
5111 5140
/* C6.3.32 DUP (General)
5112 5141
 *
5113 5142
 *  31  30   29              21 20    16 15        10  9    5 4    0
......
5425 5454
 */
5426 5455
static void disas_simd_scalar_copy(DisasContext *s, uint32_t insn)
5427 5456
{
5428
    unsupported_encoding(s, insn);
5457
    int rd = extract32(insn, 0, 5);
5458
    int rn = extract32(insn, 5, 5);
5459
    int imm4 = extract32(insn, 11, 4);
5460
    int imm5 = extract32(insn, 16, 5);
5461
    int op = extract32(insn, 29, 1);
5462

  
5463
    if (op != 0 || imm4 != 0) {
5464
        unallocated_encoding(s);
5465
        return;
5466
    }
5467

  
5468
    /* DUP (element, scalar) */
5469
    handle_simd_dupes(s, rd, rn, imm5);
5429 5470
}
5430 5471

  
5431 5472
/* C3.6.8 AdvSIMD scalar pairwise

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