Revision 3627757e
b/hw/ppce500_mpc8544ds.c | ||
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90 | 90 |
const char *kernel_cmdline) |
91 | 91 |
{ |
92 | 92 |
int ret = -1; |
93 |
uint32_t mem_reg_property[] = {0, cpu_to_be32(ramsize)};
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93 |
uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
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94 | 94 |
int fdt_size; |
95 | 95 |
void *fdt; |
96 | 96 |
uint8_t hypercall[16]; |
... | ... | |
108 | 108 |
char gutil[128]; |
109 | 109 |
char pci[128]; |
110 | 110 |
uint32_t pci_map[9 * 8]; |
111 |
uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0, |
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112 |
0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000, |
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113 |
0x0, 0x10000 }; |
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111 |
uint32_t pci_ranges[14] = |
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112 |
{ |
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113 |
0x2000000, 0x0, 0xc0000000, |
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114 |
0x0, 0xc0000000, |
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115 |
0x0, 0x20000000, |
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116 |
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117 |
0x1000000, 0x0, 0x0, |
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118 |
0x0, 0xe1000000, |
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119 |
0x0, 0x10000, |
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120 |
}; |
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114 | 121 |
QemuOpts *machine_opts; |
115 | 122 |
const char *dumpdtb = NULL; |
116 | 123 |
const char *dtb_file = NULL; |
... | ... | |
144 | 151 |
qemu_devtree_setprop_string(fdt, "/", "model", model); |
145 | 152 |
qemu_devtree_setprop(fdt, "/", "compatible", compatible, |
146 | 153 |
sizeof(compatible)); |
147 |
qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 1);
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148 |
qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 1);
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154 |
qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2);
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155 |
qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2);
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149 | 156 |
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150 | 157 |
qemu_devtree_add_subnode(fdt, "/memory"); |
151 | 158 |
qemu_devtree_setprop_string(fdt, "/memory", "device_type", "memory"); |
... | ... | |
239 | 246 |
sizeof(compatible_sb)); |
240 | 247 |
qemu_devtree_setprop_cell(fdt, soc, "#address-cells", 1); |
241 | 248 |
qemu_devtree_setprop_cell(fdt, soc, "#size-cells", 1); |
242 |
qemu_devtree_setprop_cells(fdt, soc, "ranges", 0x0, MPC8544_CCSRBAR_BASE, |
|
249 |
qemu_devtree_setprop_cells(fdt, soc, "ranges", 0x0, |
|
250 |
MPC8544_CCSRBAR_BASE >> 32, MPC8544_CCSRBAR_BASE, |
|
243 | 251 |
MPC8544_CCSRBAR_SIZE); |
244 | 252 |
/* XXX should contain a reasonable value */ |
245 | 253 |
qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0); |
... | ... | |
313 | 321 |
qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic); |
314 | 322 |
qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2, 0, 0); |
315 | 323 |
qemu_devtree_setprop_cells(fdt, pci, "bus-range", 0, 255); |
316 |
for (i = 0; i < 12; i++) {
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324 |
for (i = 0; i < 14; i++) {
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317 | 325 |
pci_ranges[i] = cpu_to_be32(pci_ranges[i]); |
318 | 326 |
} |
319 | 327 |
qemu_devtree_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges)); |
320 |
qemu_devtree_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE, |
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321 |
0x1000); |
|
328 |
qemu_devtree_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE >> 32,
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329 |
MPC8544_PCI_REGS_BASE, 0, 0x1000);
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322 | 330 |
qemu_devtree_setprop_cell(fdt, pci, "clock-frequency", 66666666); |
323 | 331 |
qemu_devtree_setprop_cell(fdt, pci, "#interrupt-cells", 1); |
324 | 332 |
qemu_devtree_setprop_cell(fdt, pci, "#size-cells", 2); |
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