Revision 363be49c target-ppc/translate_init.c
| b/target-ppc/translate_init.c | ||
|---|---|---|
| 893 | 893 |
&spr_read_generic, SPR_NOACCESS, |
| 894 | 894 |
0x00000000); |
| 895 | 895 |
/* Exception processing */ |
| 896 |
spr_register(env, SPR_CSRR0, "CSRR0", |
|
| 896 |
spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
|
| 897 | 897 |
SPR_NOACCESS, SPR_NOACCESS, |
| 898 | 898 |
&spr_read_generic, &spr_write_generic, |
| 899 | 899 |
0x00000000); |
| 900 |
spr_register(env, SPR_CSRR1, "CSRR1", |
|
| 900 |
spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
|
|
| 901 | 901 |
SPR_NOACCESS, SPR_NOACCESS, |
| 902 | 902 |
&spr_read_generic, &spr_write_generic, |
| 903 | 903 |
0x00000000); |
| ... | ... | |
| 1060 | 1060 |
&spr_read_generic, &spr_write_pir, |
| 1061 | 1061 |
0x00000000); |
| 1062 | 1062 |
/* Interrupt processing */ |
| 1063 |
spr_register(env, SPR_CSRR0, "CSRR0", |
|
| 1063 |
spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
|
| 1064 | 1064 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1065 | 1065 |
&spr_read_generic, &spr_write_generic, |
| 1066 | 1066 |
0x00000000); |
| 1067 |
spr_register(env, SPR_CSRR1, "CSRR1", |
|
| 1067 |
spr_register(env, SPR_BOOKE_CSRR1, "CSRR1", |
|
| 1068 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1069 |
&spr_read_generic, &spr_write_generic, |
|
| 1070 |
0x00000000); |
|
| 1071 |
spr_register(env, SPR_BOOKE_DSRR0, "DSRR0", |
|
| 1072 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1073 |
&spr_read_generic, &spr_write_generic, |
|
| 1074 |
0x00000000); |
|
| 1075 |
spr_register(env, SPR_BOOKE_DSRR1, "DSRR1", |
|
| 1076 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1077 |
&spr_read_generic, &spr_write_generic, |
|
| 1078 |
0x00000000); |
|
| 1079 |
spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0", |
|
| 1080 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1081 |
&spr_read_generic, &spr_write_generic, |
|
| 1082 |
0x00000000); |
|
| 1083 |
spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1", |
|
| 1068 | 1084 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1069 | 1085 |
&spr_read_generic, &spr_write_generic, |
| 1070 | 1086 |
0x00000000); |
| ... | ... | |
| 1137 | 1153 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1138 | 1154 |
&spr_read_generic, &spr_write_generic, |
| 1139 | 1155 |
0x00000000); |
| 1140 |
spr_register(env, SPR_BOOKE_EVPR, "EVPR", |
|
| 1156 |
spr_register(env, SPR_BOOKE_IVPR, "IVPR", |
|
| 1157 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1158 |
&spr_read_generic, &spr_write_generic, |
|
| 1159 |
0x00000000); |
|
| 1160 |
/* Exception vectors */ |
|
| 1161 |
spr_register(env, SPR_BOOKE_IVPR, "IVPR", |
|
| 1141 | 1162 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1142 | 1163 |
&spr_read_generic, &spr_write_generic, |
| 1143 | 1164 |
0x00000000); |
| ... | ... | |
| 1205 | 1226 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1206 | 1227 |
&spr_read_generic, &spr_write_generic, |
| 1207 | 1228 |
0x00000000); |
| 1229 |
spr_register(env, SPR_BOOKE_IVOR32, "IVOR32", |
|
| 1230 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1231 |
&spr_read_generic, &spr_write_generic, |
|
| 1232 |
0x00000000); |
|
| 1233 |
spr_register(env, SPR_BOOKE_IVOR33, "IVOR33", |
|
| 1234 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1235 |
&spr_read_generic, &spr_write_generic, |
|
| 1236 |
0x00000000); |
|
| 1237 |
spr_register(env, SPR_BOOKE_IVOR34, "IVOR34", |
|
| 1238 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1239 |
&spr_read_generic, &spr_write_generic, |
|
| 1240 |
0x00000000); |
|
| 1241 |
spr_register(env, SPR_BOOKE_IVOR35, "IVOR35", |
|
| 1242 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1243 |
&spr_read_generic, &spr_write_generic, |
|
| 1244 |
0x00000000); |
|
| 1245 |
spr_register(env, SPR_BOOKE_IVOR36, "IVOR36", |
|
| 1246 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1247 |
&spr_read_generic, &spr_write_generic, |
|
| 1248 |
0x00000000); |
|
| 1249 |
spr_register(env, SPR_BOOKE_IVOR37, "IVOR37", |
|
| 1250 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1251 |
&spr_read_generic, &spr_write_generic, |
|
| 1252 |
0x00000000); |
|
| 1208 | 1253 |
spr_register(env, SPR_BOOKE_PID, "PID", |
| 1209 | 1254 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1210 | 1255 |
&spr_read_generic, &spr_write_generic, |
| ... | ... | |
| 1265 | 1310 |
0x00000000); |
| 1266 | 1311 |
} |
| 1267 | 1312 |
|
| 1313 |
/* FSL storage control registers */ |
|
| 1314 |
static void gen_spr_BookE_FSL (CPUPPCState *env) |
|
| 1315 |
{
|
|
| 1316 |
/* TLB assist registers */ |
|
| 1317 |
spr_register(env, SPR_BOOKE_MAS0, "MAS0", |
|
| 1318 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1319 |
&spr_read_generic, &spr_write_generic, |
|
| 1320 |
0x00000000); |
|
| 1321 |
spr_register(env, SPR_BOOKE_MAS1, "MAS2", |
|
| 1322 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1323 |
&spr_read_generic, &spr_write_generic, |
|
| 1324 |
0x00000000); |
|
| 1325 |
spr_register(env, SPR_BOOKE_MAS2, "MAS3", |
|
| 1326 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1327 |
&spr_read_generic, &spr_write_generic, |
|
| 1328 |
0x00000000); |
|
| 1329 |
spr_register(env, SPR_BOOKE_MAS3, "MAS4", |
|
| 1330 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1331 |
&spr_read_generic, &spr_write_generic, |
|
| 1332 |
0x00000000); |
|
| 1333 |
spr_register(env, SPR_BOOKE_MAS4, "MAS5", |
|
| 1334 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1335 |
&spr_read_generic, &spr_write_generic, |
|
| 1336 |
0x00000000); |
|
| 1337 |
spr_register(env, SPR_BOOKE_MAS6, "MAS6", |
|
| 1338 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1339 |
&spr_read_generic, &spr_write_generic, |
|
| 1340 |
0x00000000); |
|
| 1341 |
spr_register(env, SPR_BOOKE_MAS7, "MAS7", |
|
| 1342 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1343 |
&spr_read_generic, &spr_write_generic, |
|
| 1344 |
0x00000000); |
|
| 1345 |
if (env->nb_pids > 1) {
|
|
| 1346 |
spr_register(env, SPR_BOOKE_PID1, "PID1", |
|
| 1347 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1348 |
&spr_read_generic, &spr_write_generic, |
|
| 1349 |
0x00000000); |
|
| 1350 |
} |
|
| 1351 |
if (env->nb_pids > 2) {
|
|
| 1352 |
spr_register(env, SPR_BOOKE_PID2, "PID2", |
|
| 1353 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1354 |
&spr_read_generic, &spr_write_generic, |
|
| 1355 |
0x00000000); |
|
| 1356 |
} |
|
| 1357 |
spr_register(env, SPR_BOOKE_MMUCFG, "MMUCFG", |
|
| 1358 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1359 |
&spr_read_generic, SPR_NOACCESS, |
|
| 1360 |
0x00000000); /* TOFIX */ |
|
| 1361 |
spr_register(env, SPR_BOOKE_MMUCSR0, "MMUCSR0", |
|
| 1362 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1363 |
&spr_read_generic, &spr_write_generic, |
|
| 1364 |
0x00000000); /* TOFIX */ |
|
| 1365 |
switch (env->nb_ways) {
|
|
| 1366 |
case 4: |
|
| 1367 |
spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG", |
|
| 1368 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1369 |
&spr_read_generic, SPR_NOACCESS, |
|
| 1370 |
0x00000000); /* TOFIX */ |
|
| 1371 |
/* Fallthru */ |
|
| 1372 |
case 3: |
|
| 1373 |
spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG", |
|
| 1374 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1375 |
&spr_read_generic, SPR_NOACCESS, |
|
| 1376 |
0x00000000); /* TOFIX */ |
|
| 1377 |
/* Fallthru */ |
|
| 1378 |
case 2: |
|
| 1379 |
spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG", |
|
| 1380 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1381 |
&spr_read_generic, SPR_NOACCESS, |
|
| 1382 |
0x00000000); /* TOFIX */ |
|
| 1383 |
/* Fallthru */ |
|
| 1384 |
case 1: |
|
| 1385 |
spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG", |
|
| 1386 |
SPR_NOACCESS, SPR_NOACCESS, |
|
| 1387 |
&spr_read_generic, SPR_NOACCESS, |
|
| 1388 |
0x00000000); /* TOFIX */ |
|
| 1389 |
/* Fallthru */ |
|
| 1390 |
case 0: |
|
| 1391 |
default: |
|
| 1392 |
break; |
|
| 1393 |
} |
|
| 1394 |
} |
|
| 1395 |
|
|
| 1268 | 1396 |
/* SPR specific to PowerPC 440 implementation */ |
| 1269 | 1397 |
static void gen_spr_440 (CPUPPCState *env) |
| 1270 | 1398 |
{
|
| ... | ... | |
| 1361 | 1489 |
0x00000000); |
| 1362 | 1490 |
/* Cache debug */ |
| 1363 | 1491 |
/* XXX : not implemented */ |
| 1364 |
spr_register(env, SPR_440_DCBTRH, "DCBTRH",
|
|
| 1492 |
spr_register(env, SPR_BOOKE_DCBTRH, "DCBTRH",
|
|
| 1365 | 1493 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1366 | 1494 |
&spr_read_generic, SPR_NOACCESS, |
| 1367 | 1495 |
0x00000000); |
| 1368 | 1496 |
/* XXX : not implemented */ |
| 1369 |
spr_register(env, SPR_440_DCBTRL, "DCBTRL",
|
|
| 1497 |
spr_register(env, SPR_BOOKE_DCBTRL, "DCBTRL",
|
|
| 1370 | 1498 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1371 | 1499 |
&spr_read_generic, SPR_NOACCESS, |
| 1372 | 1500 |
0x00000000); |
| 1373 | 1501 |
/* XXX : not implemented */ |
| 1374 |
spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
|
|
| 1502 |
spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
|
|
| 1375 | 1503 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1376 | 1504 |
&spr_read_generic, SPR_NOACCESS, |
| 1377 | 1505 |
0x00000000); |
| 1378 | 1506 |
/* XXX : not implemented */ |
| 1379 |
spr_register(env, SPR_440_ICBTRH, "ICBTRH",
|
|
| 1507 |
spr_register(env, SPR_BOOKE_ICBTRH, "ICBTRH",
|
|
| 1380 | 1508 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1381 | 1509 |
&spr_read_generic, SPR_NOACCESS, |
| 1382 | 1510 |
0x00000000); |
| 1383 | 1511 |
/* XXX : not implemented */ |
| 1384 |
spr_register(env, SPR_440_ICBTRL, "ICBTRL",
|
|
| 1512 |
spr_register(env, SPR_BOOKE_ICBTRL, "ICBTRL",
|
|
| 1385 | 1513 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1386 | 1514 |
&spr_read_generic, SPR_NOACCESS, |
| 1387 | 1515 |
0x00000000); |
| ... | ... | |
| 1426 | 1554 |
&spr_read_generic, &spr_write_generic, |
| 1427 | 1555 |
0x00000000); |
| 1428 | 1556 |
/* XXX : not implemented */ |
| 1429 |
spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
|
|
| 1557 |
spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
|
|
| 1430 | 1558 |
SPR_NOACCESS, SPR_NOACCESS, |
| 1431 | 1559 |
&spr_read_generic, SPR_NOACCESS, |
| 1432 | 1560 |
0x00000000); |
| ... | ... | |
| 1861 | 1989 |
/* Time base */ |
| 1862 | 1990 |
gen_tbl(env); |
| 1863 | 1991 |
gen_spr_BookE(env); |
| 1992 |
gen_spr_BookE_FSL(env); |
|
| 1864 | 1993 |
env->nb_BATs = 0; |
| 1865 | 1994 |
env->nb_tlb = 64; |
| 1866 | 1995 |
env->nb_ways = 1; |
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