root / hw / sh_pci.c @ 37f32f0f
History | View | Annotate | Download (5.5 kB)
1 | 1e5459a3 | balrog | /*
|
---|---|---|---|
2 | 1e5459a3 | balrog | * SuperH on-chip PCIC emulation.
|
3 | 1e5459a3 | balrog | *
|
4 | 1e5459a3 | balrog | * Copyright (c) 2008 Takashi YOSHII
|
5 | 1e5459a3 | balrog | *
|
6 | 1e5459a3 | balrog | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 1e5459a3 | balrog | * of this software and associated documentation files (the "Software"), to deal
|
8 | 1e5459a3 | balrog | * in the Software without restriction, including without limitation the rights
|
9 | 1e5459a3 | balrog | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 1e5459a3 | balrog | * copies of the Software, and to permit persons to whom the Software is
|
11 | 1e5459a3 | balrog | * furnished to do so, subject to the following conditions:
|
12 | 1e5459a3 | balrog | *
|
13 | 1e5459a3 | balrog | * The above copyright notice and this permission notice shall be included in
|
14 | 1e5459a3 | balrog | * all copies or substantial portions of the Software.
|
15 | 1e5459a3 | balrog | *
|
16 | 1e5459a3 | balrog | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 1e5459a3 | balrog | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 1e5459a3 | balrog | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 1e5459a3 | balrog | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 1e5459a3 | balrog | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 1e5459a3 | balrog | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 1e5459a3 | balrog | * THE SOFTWARE.
|
23 | 1e5459a3 | balrog | */
|
24 | cf154394 | Aurelien Jarno | #include "sysbus.h" |
25 | 1e5459a3 | balrog | #include "sh.h" |
26 | 1e5459a3 | balrog | #include "pci.h" |
27 | b6243d99 | Isaku Yamahata | #include "pci_host.h" |
28 | 1e5459a3 | balrog | #include "bswap.h" |
29 | 1e39101c | Avi Kivity | #include "exec-memory.h" |
30 | 1e5459a3 | balrog | |
31 | cf154394 | Aurelien Jarno | typedef struct SHPCIState { |
32 | cf154394 | Aurelien Jarno | SysBusDevice busdev; |
33 | 1e5459a3 | balrog | PCIBus *bus; |
34 | 1e5459a3 | balrog | PCIDevice *dev; |
35 | cf154394 | Aurelien Jarno | qemu_irq irq[4];
|
36 | fb57117a | Avi Kivity | MemoryRegion memconfig_p4; |
37 | fb57117a | Avi Kivity | MemoryRegion memconfig_a7; |
38 | fb57117a | Avi Kivity | MemoryRegion isa; |
39 | 1e5459a3 | balrog | uint32_t par; |
40 | 1e5459a3 | balrog | uint32_t mbr; |
41 | 1e5459a3 | balrog | uint32_t iobr; |
42 | cf154394 | Aurelien Jarno | } SHPCIState; |
43 | 1e5459a3 | balrog | |
44 | fb57117a | Avi Kivity | static void sh_pci_reg_write (void *p, target_phys_addr_t addr, uint64_t val, |
45 | fb57117a | Avi Kivity | unsigned size)
|
46 | 1e5459a3 | balrog | { |
47 | cf154394 | Aurelien Jarno | SHPCIState *pcic = p; |
48 | 1e5459a3 | balrog | switch(addr) {
|
49 | 1e5459a3 | balrog | case 0 ... 0xfc: |
50 | 1e5459a3 | balrog | cpu_to_le32w((uint32_t*)(pcic->dev->config + addr), val); |
51 | 1e5459a3 | balrog | break;
|
52 | 1e5459a3 | balrog | case 0x1c0: |
53 | 1e5459a3 | balrog | pcic->par = val; |
54 | 1e5459a3 | balrog | break;
|
55 | 1e5459a3 | balrog | case 0x1c4: |
56 | 5ba9e952 | Aurelien Jarno | pcic->mbr = val & 0xff000001;
|
57 | 1e5459a3 | balrog | break;
|
58 | 1e5459a3 | balrog | case 0x1c8: |
59 | 5ba9e952 | Aurelien Jarno | if ((val & 0xfffc0000) != (pcic->iobr & 0xfffc0000)) { |
60 | fb57117a | Avi Kivity | memory_region_del_subregion(get_system_memory(), &pcic->isa); |
61 | 5ba9e952 | Aurelien Jarno | pcic->iobr = val & 0xfffc0001;
|
62 | fb57117a | Avi Kivity | memory_region_add_subregion(get_system_memory(), |
63 | fb57117a | Avi Kivity | pcic->iobr & 0xfffc0000, &pcic->isa);
|
64 | 5ba9e952 | Aurelien Jarno | } |
65 | 1e5459a3 | balrog | break;
|
66 | 1e5459a3 | balrog | case 0x220: |
67 | 1e5459a3 | balrog | pci_data_write(pcic->bus, pcic->par, val, 4);
|
68 | 1e5459a3 | balrog | break;
|
69 | 1e5459a3 | balrog | } |
70 | 1e5459a3 | balrog | } |
71 | 1e5459a3 | balrog | |
72 | fb57117a | Avi Kivity | static uint64_t sh_pci_reg_read (void *p, target_phys_addr_t addr, |
73 | fb57117a | Avi Kivity | unsigned size)
|
74 | 1e5459a3 | balrog | { |
75 | cf154394 | Aurelien Jarno | SHPCIState *pcic = p; |
76 | 1e5459a3 | balrog | switch(addr) {
|
77 | 1e5459a3 | balrog | case 0 ... 0xfc: |
78 | 1e5459a3 | balrog | return le32_to_cpup((uint32_t*)(pcic->dev->config + addr));
|
79 | 1e5459a3 | balrog | case 0x1c0: |
80 | 1e5459a3 | balrog | return pcic->par;
|
81 | 5ba9e952 | Aurelien Jarno | case 0x1c4: |
82 | 5ba9e952 | Aurelien Jarno | return pcic->mbr;
|
83 | 5ba9e952 | Aurelien Jarno | case 0x1c8: |
84 | 5ba9e952 | Aurelien Jarno | return pcic->iobr;
|
85 | 1e5459a3 | balrog | case 0x220: |
86 | 1e5459a3 | balrog | return pci_data_read(pcic->bus, pcic->par, 4); |
87 | 1e5459a3 | balrog | } |
88 | 1e5459a3 | balrog | return 0; |
89 | 1e5459a3 | balrog | } |
90 | 1e5459a3 | balrog | |
91 | fb57117a | Avi Kivity | static const MemoryRegionOps sh_pci_reg_ops = { |
92 | fb57117a | Avi Kivity | .read = sh_pci_reg_read, |
93 | fb57117a | Avi Kivity | .write = sh_pci_reg_write, |
94 | fb57117a | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
95 | fb57117a | Avi Kivity | .valid = { |
96 | fb57117a | Avi Kivity | .min_access_size = 4,
|
97 | fb57117a | Avi Kivity | .max_access_size = 4,
|
98 | fb57117a | Avi Kivity | }, |
99 | 1e5459a3 | balrog | }; |
100 | 1e5459a3 | balrog | |
101 | cf154394 | Aurelien Jarno | static int sh_pci_map_irq(PCIDevice *d, int irq_num) |
102 | cf154394 | Aurelien Jarno | { |
103 | cf154394 | Aurelien Jarno | return (d->devfn >> 3); |
104 | cf154394 | Aurelien Jarno | } |
105 | cf154394 | Aurelien Jarno | |
106 | cf154394 | Aurelien Jarno | static void sh_pci_set_irq(void *opaque, int irq_num, int level) |
107 | cf154394 | Aurelien Jarno | { |
108 | cf154394 | Aurelien Jarno | qemu_irq *pic = opaque; |
109 | cf154394 | Aurelien Jarno | |
110 | cf154394 | Aurelien Jarno | qemu_set_irq(pic[irq_num], level); |
111 | cf154394 | Aurelien Jarno | } |
112 | cf154394 | Aurelien Jarno | |
113 | 999e12bb | Anthony Liguori | static int sh_pci_device_init(SysBusDevice *dev) |
114 | cf154394 | Aurelien Jarno | { |
115 | cf154394 | Aurelien Jarno | SHPCIState *s; |
116 | cf154394 | Aurelien Jarno | int i;
|
117 | cf154394 | Aurelien Jarno | |
118 | cf154394 | Aurelien Jarno | s = FROM_SYSBUS(SHPCIState, dev); |
119 | cf154394 | Aurelien Jarno | for (i = 0; i < 4; i++) { |
120 | cf154394 | Aurelien Jarno | sysbus_init_irq(dev, &s->irq[i]); |
121 | cf154394 | Aurelien Jarno | } |
122 | cf154394 | Aurelien Jarno | s->bus = pci_register_bus(&s->busdev.qdev, "pci",
|
123 | cf154394 | Aurelien Jarno | sh_pci_set_irq, sh_pci_map_irq, |
124 | aee97b84 | Avi Kivity | s->irq, |
125 | aee97b84 | Avi Kivity | get_system_memory(), |
126 | aee97b84 | Avi Kivity | get_system_io(), |
127 | 1e39101c | Avi Kivity | PCI_DEVFN(0, 0), 4); |
128 | fb57117a | Avi Kivity | memory_region_init_io(&s->memconfig_p4, &sh_pci_reg_ops, s, |
129 | fb57117a | Avi Kivity | "sh_pci", 0x224); |
130 | 73c92f9a | Avi Kivity | memory_region_init_alias(&s->memconfig_a7, "sh_pci.2", &s->memconfig_p4,
|
131 | fb57117a | Avi Kivity | 0, 0x224); |
132 | fb57117a | Avi Kivity | isa_mmio_setup(&s->isa, 0x40000);
|
133 | 8c106233 | Benoît Canet | sysbus_init_mmio(dev, &s->memconfig_p4); |
134 | 750ecd44 | Avi Kivity | sysbus_init_mmio(dev, &s->memconfig_a7); |
135 | 8c106233 | Benoît Canet | s->iobr = 0xfe240000;
|
136 | 8c106233 | Benoît Canet | memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); |
137 | 8c106233 | Benoît Canet | |
138 | cf154394 | Aurelien Jarno | s->dev = pci_create_simple(s->bus, PCI_DEVFN(0, 0), "sh_pci_host"); |
139 | cf154394 | Aurelien Jarno | return 0; |
140 | cf154394 | Aurelien Jarno | } |
141 | cf154394 | Aurelien Jarno | |
142 | cf154394 | Aurelien Jarno | static int sh_pci_host_init(PCIDevice *d) |
143 | cf154394 | Aurelien Jarno | { |
144 | cf154394 | Aurelien Jarno | pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT); |
145 | cf154394 | Aurelien Jarno | pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST | |
146 | cf154394 | Aurelien Jarno | PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); |
147 | cf154394 | Aurelien Jarno | return 0; |
148 | cf154394 | Aurelien Jarno | } |
149 | cf154394 | Aurelien Jarno | |
150 | 40021f08 | Anthony Liguori | static void sh_pci_host_class_init(ObjectClass *klass, void *data) |
151 | 40021f08 | Anthony Liguori | { |
152 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
153 | 40021f08 | Anthony Liguori | |
154 | 40021f08 | Anthony Liguori | k->init = sh_pci_host_init; |
155 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_HITACHI; |
156 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R; |
157 | 40021f08 | Anthony Liguori | } |
158 | 40021f08 | Anthony Liguori | |
159 | 39bffca2 | Anthony Liguori | static TypeInfo sh_pci_host_info = {
|
160 | 39bffca2 | Anthony Liguori | .name = "sh_pci_host",
|
161 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
162 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PCIDevice),
|
163 | 39bffca2 | Anthony Liguori | .class_init = sh_pci_host_class_init, |
164 | cf154394 | Aurelien Jarno | }; |
165 | cf154394 | Aurelien Jarno | |
166 | 999e12bb | Anthony Liguori | static void sh_pci_device_class_init(ObjectClass *klass, void *data) |
167 | 999e12bb | Anthony Liguori | { |
168 | 999e12bb | Anthony Liguori | SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); |
169 | 999e12bb | Anthony Liguori | |
170 | 999e12bb | Anthony Liguori | sdc->init = sh_pci_device_init; |
171 | 999e12bb | Anthony Liguori | } |
172 | 999e12bb | Anthony Liguori | |
173 | 39bffca2 | Anthony Liguori | static TypeInfo sh_pci_device_info = {
|
174 | 39bffca2 | Anthony Liguori | .name = "sh_pci",
|
175 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
176 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(SHPCIState),
|
177 | 39bffca2 | Anthony Liguori | .class_init = sh_pci_device_class_init, |
178 | 999e12bb | Anthony Liguori | }; |
179 | 999e12bb | Anthony Liguori | |
180 | cf154394 | Aurelien Jarno | static void sh_pci_register_devices(void) |
181 | 1e5459a3 | balrog | { |
182 | 39bffca2 | Anthony Liguori | type_register_static(&sh_pci_device_info); |
183 | 39bffca2 | Anthony Liguori | type_register_static(&sh_pci_host_info); |
184 | 1e5459a3 | balrog | } |
185 | cf154394 | Aurelien Jarno | |
186 | cf154394 | Aurelien Jarno | device_init(sh_pci_register_devices) |