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1 | e9f186e5 | Peter A. G. Crosthwaite | /*
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2 | e9f186e5 | Peter A. G. Crosthwaite | * QEMU Xilinx GEM emulation
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3 | e9f186e5 | Peter A. G. Crosthwaite | *
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4 | e9f186e5 | Peter A. G. Crosthwaite | * Copyright (c) 2011 Xilinx, Inc.
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5 | e9f186e5 | Peter A. G. Crosthwaite | *
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6 | e9f186e5 | Peter A. G. Crosthwaite | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | e9f186e5 | Peter A. G. Crosthwaite | * of this software and associated documentation files (the "Software"), to deal
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8 | e9f186e5 | Peter A. G. Crosthwaite | * in the Software without restriction, including without limitation the rights
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9 | e9f186e5 | Peter A. G. Crosthwaite | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | e9f186e5 | Peter A. G. Crosthwaite | * copies of the Software, and to permit persons to whom the Software is
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11 | e9f186e5 | Peter A. G. Crosthwaite | * furnished to do so, subject to the following conditions:
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12 | e9f186e5 | Peter A. G. Crosthwaite | *
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13 | e9f186e5 | Peter A. G. Crosthwaite | * The above copyright notice and this permission notice shall be included in
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14 | e9f186e5 | Peter A. G. Crosthwaite | * all copies or substantial portions of the Software.
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15 | e9f186e5 | Peter A. G. Crosthwaite | *
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16 | e9f186e5 | Peter A. G. Crosthwaite | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | e9f186e5 | Peter A. G. Crosthwaite | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | e9f186e5 | Peter A. G. Crosthwaite | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | e9f186e5 | Peter A. G. Crosthwaite | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | e9f186e5 | Peter A. G. Crosthwaite | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | e9f186e5 | Peter A. G. Crosthwaite | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | e9f186e5 | Peter A. G. Crosthwaite | * THE SOFTWARE.
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23 | e9f186e5 | Peter A. G. Crosthwaite | */
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24 | e9f186e5 | Peter A. G. Crosthwaite | |
25 | e9f186e5 | Peter A. G. Crosthwaite | #include <zlib.h> /* For crc32 */ |
26 | e9f186e5 | Peter A. G. Crosthwaite | |
27 | e9f186e5 | Peter A. G. Crosthwaite | #include "sysbus.h" |
28 | e9f186e5 | Peter A. G. Crosthwaite | #include "net.h" |
29 | e9f186e5 | Peter A. G. Crosthwaite | #include "net/checksum.h" |
30 | e9f186e5 | Peter A. G. Crosthwaite | |
31 | e9f186e5 | Peter A. G. Crosthwaite | #ifdef CADENCE_GEM_ERR_DEBUG
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32 | e9f186e5 | Peter A. G. Crosthwaite | #define DB_PRINT(...) do { \ |
33 | e9f186e5 | Peter A. G. Crosthwaite | fprintf(stderr, ": %s: ", __func__); \
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34 | e9f186e5 | Peter A. G. Crosthwaite | fprintf(stderr, ## __VA_ARGS__); \ |
35 | e9f186e5 | Peter A. G. Crosthwaite | } while (0); |
36 | e9f186e5 | Peter A. G. Crosthwaite | #else
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37 | e9f186e5 | Peter A. G. Crosthwaite | #define DB_PRINT(...)
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38 | e9f186e5 | Peter A. G. Crosthwaite | #endif
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39 | e9f186e5 | Peter A. G. Crosthwaite | |
40 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCTRL (0x00000000/4) /* Network Control reg */ |
41 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG (0x00000004/4) /* Network Config reg */ |
42 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWSTATUS (0x00000008/4) /* Network Status reg */ |
43 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_USERIO (0x0000000C/4) /* User IO reg */ |
44 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DMACFG (0x00000010/4) /* DMA Control reg */ |
45 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXSTATUS (0x00000014/4) /* TX Status reg */ |
46 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXQBASE (0x00000018/4) /* RX Q Base address reg */ |
47 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXQBASE (0x0000001C/4) /* TX Q Base address reg */ |
48 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXSTATUS (0x00000020/4) /* RX Status reg */ |
49 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_ISR (0x00000024/4) /* Interrupt Status reg */ |
50 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_IER (0x00000028/4) /* Interrupt Enable reg */ |
51 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_IDR (0x0000002C/4) /* Interrupt Disable reg */ |
52 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_IMR (0x00000030/4) /* Interrupt Mask reg */ |
53 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC (0x00000034/4) /* Phy Maintaince reg */ |
54 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXPAUSE (0x00000038/4) /* RX Pause Time reg */ |
55 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXPAUSE (0x0000003C/4) /* TX Pause Time reg */ |
56 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXPARTIALSF (0x00000040/4) /* TX Partial Store and Forward */ |
57 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXPARTIALSF (0x00000044/4) /* RX Partial Store and Forward */ |
58 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_HASHLO (0x00000080/4) /* Hash Low address reg */ |
59 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_HASHHI (0x00000084/4) /* Hash High address reg */ |
60 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR1LO (0x00000088/4) /* Specific addr 1 low reg */ |
61 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR1HI (0x0000008C/4) /* Specific addr 1 high reg */ |
62 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR2LO (0x00000090/4) /* Specific addr 2 low reg */ |
63 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR2HI (0x00000094/4) /* Specific addr 2 high reg */ |
64 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR3LO (0x00000098/4) /* Specific addr 3 low reg */ |
65 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR3HI (0x0000009C/4) /* Specific addr 3 high reg */ |
66 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR4LO (0x000000A0/4) /* Specific addr 4 low reg */ |
67 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SPADDR4HI (0x000000A4/4) /* Specific addr 4 high reg */ |
68 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TIDMATCH1 (0x000000A8/4) /* Type ID1 Match reg */ |
69 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TIDMATCH2 (0x000000AC/4) /* Type ID2 Match reg */ |
70 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TIDMATCH3 (0x000000B0/4) /* Type ID3 Match reg */ |
71 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TIDMATCH4 (0x000000B4/4) /* Type ID4 Match reg */ |
72 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_WOLAN (0x000000B8/4) /* Wake on LAN reg */ |
73 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_IPGSTRETCH (0x000000BC/4) /* IPG Stretch reg */ |
74 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SVLAN (0x000000C0/4) /* Stacked VLAN reg */ |
75 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_MODID (0x000000FC/4) /* Module ID reg */ |
76 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_OCTTXLO (0x00000100/4) /* Octects transmitted Low reg */ |
77 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_OCTTXHI (0x00000104/4) /* Octects transmitted High reg */ |
78 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXCNT (0x00000108/4) /* Error-free Frames transmitted */ |
79 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXBCNT (0x0000010C/4) /* Error-free Broadcast Frames */ |
80 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXMCNT (0x00000110/4) /* Error-free Multicast Frame */ |
81 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXPAUSECNT (0x00000114/4) /* Pause Frames Transmitted */ |
82 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX64CNT (0x00000118/4) /* Error-free 64 TX */ |
83 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX65CNT (0x0000011C/4) /* Error-free 65-127 TX */ |
84 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX128CNT (0x00000120/4) /* Error-free 128-255 TX */ |
85 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX256CNT (0x00000124/4) /* Error-free 256-511 */ |
86 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX512CNT (0x00000128/4) /* Error-free 512-1023 TX */ |
87 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX1024CNT (0x0000012C/4) /* Error-free 1024-1518 TX */ |
88 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TX1519CNT (0x00000130/4) /* Error-free larger than 1519 TX */ |
89 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXURUNCNT (0x00000134/4) /* TX under run error counter */ |
90 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_SINGLECOLLCNT (0x00000138/4) /* Single Collision Frames */ |
91 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_MULTCOLLCNT (0x0000013C/4) /* Multiple Collision Frames */ |
92 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_EXCESSCOLLCNT (0x00000140/4) /* Excessive Collision Frames */ |
93 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_LATECOLLCNT (0x00000144/4) /* Late Collision Frames */ |
94 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DEFERTXCNT (0x00000148/4) /* Deferred Transmission Frames */ |
95 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_CSENSECNT (0x0000014C/4) /* Carrier Sense Error Counter */ |
96 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_OCTRXLO (0x00000150/4) /* Octects Received register Low */ |
97 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_OCTRXHI (0x00000154/4) /* Octects Received register High */ |
98 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXCNT (0x00000158/4) /* Error-free Frames Received */ |
99 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXBROADCNT (0x0000015C/4) /* Error-free Broadcast Frames RX */ |
100 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXMULTICNT (0x00000160/4) /* Error-free Multicast Frames RX */ |
101 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXPAUSECNT (0x00000164/4) /* Pause Frames Received Counter */ |
102 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX64CNT (0x00000168/4) /* Error-free 64 byte Frames RX */ |
103 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX65CNT (0x0000016C/4) /* Error-free 65-127B Frames RX */ |
104 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX128CNT (0x00000170/4) /* Error-free 128-255B Frames RX */ |
105 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX256CNT (0x00000174/4) /* Error-free 256-512B Frames RX */ |
106 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX512CNT (0x00000178/4) /* Error-free 512-1023B Frames RX */ |
107 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX1024CNT (0x0000017C/4) /* Error-free 1024-1518B Frames RX */ |
108 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX1519CNT (0x00000180/4) /* Error-free 1519-max Frames RX */ |
109 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXUNDERCNT (0x00000184/4) /* Undersize Frames Received */ |
110 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXOVERCNT (0x00000188/4) /* Oversize Frames Received */ |
111 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXJABCNT (0x0000018C/4) /* Jabbers Received Counter */ |
112 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXFCSCNT (0x00000190/4) /* Frame Check seq. Error Counter */ |
113 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXLENERRCNT (0x00000194/4) /* Length Field Error Counter */ |
114 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXSYMERRCNT (0x00000198/4) /* Symbol Error Counter */ |
115 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXALIGNERRCNT (0x0000019C/4) /* Alignment Error Counter */ |
116 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXRSCERRCNT (0x000001A0/4) /* Receive Resource Error Counter */ |
117 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXORUNCNT (0x000001A4/4) /* Receive Overrun Counter */ |
118 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXIPCSERRCNT (0x000001A8/4) /* IP header Checksum Error Counter */ |
119 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXTCPCCNT (0x000001AC/4) /* TCP Checksum Error Counter */ |
120 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXUDPCCNT (0x000001B0/4) /* UDP Checksum Error Counter */ |
121 | e9f186e5 | Peter A. G. Crosthwaite | |
122 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_1588S (0x000001D0/4) /* 1588 Timer Seconds */ |
123 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_1588NS (0x000001D4/4) /* 1588 Timer Nanoseconds */ |
124 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_1588ADJ (0x000001D8/4) /* 1588 Timer Adjust */ |
125 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_1588INC (0x000001DC/4) /* 1588 Timer Increment */ |
126 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPETXS (0x000001E0/4) /* PTP Event Frame Transmitted (s) */ |
127 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPETXNS (0x000001E4/4) /* PTP Event Frame Transmitted (ns) */ |
128 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPERXS (0x000001E8/4) /* PTP Event Frame Received (s) */ |
129 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPERXNS (0x000001EC/4) /* PTP Event Frame Received (ns) */ |
130 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPPTXS (0x000001E0/4) /* PTP Peer Frame Transmitted (s) */ |
131 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPPTXNS (0x000001E4/4) /* PTP Peer Frame Transmitted (ns) */ |
132 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPPRXS (0x000001E8/4) /* PTP Peer Frame Received (s) */ |
133 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PTPPRXNS (0x000001EC/4) /* PTP Peer Frame Received (ns) */ |
134 | e9f186e5 | Peter A. G. Crosthwaite | |
135 | e9f186e5 | Peter A. G. Crosthwaite | /* Design Configuration Registers */
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136 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF (0x00000280/4) |
137 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF2 (0x00000284/4) |
138 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF3 (0x00000288/4) |
139 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF4 (0x0000028C/4) |
140 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF5 (0x00000290/4) |
141 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF6 (0x00000294/4) |
142 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DESCONF7 (0x00000298/4) |
143 | e9f186e5 | Peter A. G. Crosthwaite | |
144 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_MAXREG (0x00000640/4) /* Last valid GEM address */ |
145 | e9f186e5 | Peter A. G. Crosthwaite | |
146 | e9f186e5 | Peter A. G. Crosthwaite | /*****************************************/
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147 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCTRL_TXSTART 0x00000200 /* Transmit Enable */ |
148 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCTRL_TXENA 0x00000008 /* Transmit Enable */ |
149 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCTRL_RXENA 0x00000004 /* Receive Enable */ |
150 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCTRL_LOCALLOOP 0x00000002 /* Local Loopback */ |
151 | e9f186e5 | Peter A. G. Crosthwaite | |
152 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_STRIP_FCS 0x00020000 /* Strip FCS field */ |
153 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_LERR_DISC 0x00010000 /* Discard RX frames with lenth err */ |
154 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_BUFF_OFST_M 0x0000C000 /* Receive buffer offset mask */ |
155 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_BUFF_OFST_S 14 /* Receive buffer offset shift */ |
156 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_UCAST_HASH 0x00000080 /* accept unicast if hash match */ |
157 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_MCAST_HASH 0x00000040 /* accept multicast if hash match */ |
158 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_BCAST_REJ 0x00000020 /* Reject broadcast packets */ |
159 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_NWCFG_PROMISC 0x00000010 /* Accept all packets */ |
160 | e9f186e5 | Peter A. G. Crosthwaite | |
161 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DMACFG_RBUFSZ_M 0x007F0000 /* DMA RX Buffer Size mask */ |
162 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DMACFG_RBUFSZ_S 16 /* DMA RX Buffer Size shift */ |
163 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DMACFG_RBUFSZ_MUL 64 /* DMA RX Buffer Size multiplier */ |
164 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_DMACFG_TXCSUM_OFFL 0x00000800 /* Transmit checksum offload */ |
165 | e9f186e5 | Peter A. G. Crosthwaite | |
166 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXSTATUS_TXCMPL 0x00000020 /* Transmit Complete */ |
167 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_TXSTATUS_USED 0x00000001 /* sw owned descriptor encountered */ |
168 | e9f186e5 | Peter A. G. Crosthwaite | |
169 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXSTATUS_FRMRCVD 0x00000002 /* Frame received */ |
170 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RXSTATUS_NOBUF 0x00000001 /* Buffer unavailable */ |
171 | e9f186e5 | Peter A. G. Crosthwaite | |
172 | e9f186e5 | Peter A. G. Crosthwaite | /* GEM_ISR GEM_IER GEM_IDR GEM_IMR */
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173 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_INT_TXCMPL 0x00000080 /* Transmit Complete */ |
174 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_INT_TXUSED 0x00000008 |
175 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_INT_RXUSED 0x00000004 |
176 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_INT_RXCMPL 0x00000002 |
177 | e9f186e5 | Peter A. G. Crosthwaite | |
178 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_OP_R 0x20000000 /* read operation */ |
179 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_OP_W 0x10000000 /* write operation */ |
180 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_ADDR 0x0F800000 /* Address bits */ |
181 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_ADDR_SHFT 23 |
182 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_REG 0x007C0000 /* register bits */ |
183 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_PHYMNTNC_REG_SHIFT 18 |
184 | e9f186e5 | Peter A. G. Crosthwaite | |
185 | e9f186e5 | Peter A. G. Crosthwaite | /* Marvell PHY definitions */
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186 | e9f186e5 | Peter A. G. Crosthwaite | #define BOARD_PHY_ADDRESS 23 /* PHY address we will emulate a device at */ |
187 | e9f186e5 | Peter A. G. Crosthwaite | |
188 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_CONTROL 0 |
189 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_STATUS 1 |
190 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_PHYID1 2 |
191 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_PHYID2 3 |
192 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_ANEGADV 4 |
193 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_LINKPABIL 5 |
194 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_ANEGEXP 6 |
195 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_NEXTP 7 |
196 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_LINKPNEXTP 8 |
197 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_100BTCTRL 9 |
198 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_1000BTSTAT 10 |
199 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_EXTSTAT 15 |
200 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_PHYSPCFC_CTL 16 |
201 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_PHYSPCFC_ST 17 |
202 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_INT_EN 18 |
203 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_INT_ST 19 |
204 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_EXT_PHYSPCFC_CTL 20 |
205 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_RXERR 21 |
206 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_EACD 22 |
207 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_LED 24 |
208 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_LED_OVRD 25 |
209 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_EXT_PHYSPCFC_CTL2 26 |
210 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_EXT_PHYSPCFC_ST 27 |
211 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_CABLE_DIAG 28 |
212 | e9f186e5 | Peter A. G. Crosthwaite | |
213 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_CONTROL_RST 0x8000 |
214 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_CONTROL_LOOP 0x4000 |
215 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_CONTROL_ANEG 0x1000 |
216 | e9f186e5 | Peter A. G. Crosthwaite | |
217 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_STATUS_LINK 0x0004 |
218 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_STATUS_ANEGCMPL 0x0020 |
219 | e9f186e5 | Peter A. G. Crosthwaite | |
220 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_INT_ST_ANEGCMPL 0x0800 |
221 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_INT_ST_LINKC 0x0400 |
222 | e9f186e5 | Peter A. G. Crosthwaite | #define PHY_REG_INT_ST_ENERGY 0x0010 |
223 | e9f186e5 | Peter A. G. Crosthwaite | |
224 | e9f186e5 | Peter A. G. Crosthwaite | /***********************************************************************/
|
225 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX_REJECT 1 |
226 | e9f186e5 | Peter A. G. Crosthwaite | #define GEM_RX_ACCEPT 0 |
227 | e9f186e5 | Peter A. G. Crosthwaite | |
228 | e9f186e5 | Peter A. G. Crosthwaite | /***********************************************************************/
|
229 | e9f186e5 | Peter A. G. Crosthwaite | |
230 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_USED 0x80000000 |
231 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_LENGTH 0x00001FFF |
232 | e9f186e5 | Peter A. G. Crosthwaite | |
233 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_TX_WRAP 0x40000000 |
234 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_TX_LAST 0x00008000 |
235 | e9f186e5 | Peter A. G. Crosthwaite | |
236 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_0_RX_WRAP 0x00000002 |
237 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_0_RX_OWNERSHIP 0x00000001 |
238 | e9f186e5 | Peter A. G. Crosthwaite | |
239 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_RX_SOF 0x00004000 |
240 | e9f186e5 | Peter A. G. Crosthwaite | #define DESC_1_RX_EOF 0x00008000 |
241 | e9f186e5 | Peter A. G. Crosthwaite | |
242 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned tx_desc_get_buffer(unsigned *desc) |
243 | e9f186e5 | Peter A. G. Crosthwaite | { |
244 | e9f186e5 | Peter A. G. Crosthwaite | return desc[0]; |
245 | e9f186e5 | Peter A. G. Crosthwaite | } |
246 | e9f186e5 | Peter A. G. Crosthwaite | |
247 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned tx_desc_get_used(unsigned *desc) |
248 | e9f186e5 | Peter A. G. Crosthwaite | { |
249 | e9f186e5 | Peter A. G. Crosthwaite | return (desc[1] & DESC_1_USED) ? 1 : 0; |
250 | e9f186e5 | Peter A. G. Crosthwaite | } |
251 | e9f186e5 | Peter A. G. Crosthwaite | |
252 | e9f186e5 | Peter A. G. Crosthwaite | static inline void tx_desc_set_used(unsigned *desc) |
253 | e9f186e5 | Peter A. G. Crosthwaite | { |
254 | e9f186e5 | Peter A. G. Crosthwaite | desc[1] |= DESC_1_USED;
|
255 | e9f186e5 | Peter A. G. Crosthwaite | } |
256 | e9f186e5 | Peter A. G. Crosthwaite | |
257 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned tx_desc_get_wrap(unsigned *desc) |
258 | e9f186e5 | Peter A. G. Crosthwaite | { |
259 | e9f186e5 | Peter A. G. Crosthwaite | return (desc[1] & DESC_1_TX_WRAP) ? 1 : 0; |
260 | e9f186e5 | Peter A. G. Crosthwaite | } |
261 | e9f186e5 | Peter A. G. Crosthwaite | |
262 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned tx_desc_get_last(unsigned *desc) |
263 | e9f186e5 | Peter A. G. Crosthwaite | { |
264 | e9f186e5 | Peter A. G. Crosthwaite | return (desc[1] & DESC_1_TX_LAST) ? 1 : 0; |
265 | e9f186e5 | Peter A. G. Crosthwaite | } |
266 | e9f186e5 | Peter A. G. Crosthwaite | |
267 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned tx_desc_get_length(unsigned *desc) |
268 | e9f186e5 | Peter A. G. Crosthwaite | { |
269 | e9f186e5 | Peter A. G. Crosthwaite | return desc[1] & DESC_1_LENGTH; |
270 | e9f186e5 | Peter A. G. Crosthwaite | } |
271 | e9f186e5 | Peter A. G. Crosthwaite | |
272 | e9f186e5 | Peter A. G. Crosthwaite | static inline void print_gem_tx_desc(unsigned *desc) |
273 | e9f186e5 | Peter A. G. Crosthwaite | { |
274 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("TXDESC:\n");
|
275 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("bufaddr: 0x%08x\n", *desc);
|
276 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("used_hw: %d\n", tx_desc_get_used(desc));
|
277 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("wrap: %d\n", tx_desc_get_wrap(desc));
|
278 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("last: %d\n", tx_desc_get_last(desc));
|
279 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("length: %d\n", tx_desc_get_length(desc));
|
280 | e9f186e5 | Peter A. G. Crosthwaite | } |
281 | e9f186e5 | Peter A. G. Crosthwaite | |
282 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned rx_desc_get_buffer(unsigned *desc) |
283 | e9f186e5 | Peter A. G. Crosthwaite | { |
284 | e9f186e5 | Peter A. G. Crosthwaite | return desc[0] & ~0x3UL; |
285 | e9f186e5 | Peter A. G. Crosthwaite | } |
286 | e9f186e5 | Peter A. G. Crosthwaite | |
287 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned rx_desc_get_wrap(unsigned *desc) |
288 | e9f186e5 | Peter A. G. Crosthwaite | { |
289 | e9f186e5 | Peter A. G. Crosthwaite | return desc[0] & DESC_0_RX_WRAP ? 1 : 0; |
290 | e9f186e5 | Peter A. G. Crosthwaite | } |
291 | e9f186e5 | Peter A. G. Crosthwaite | |
292 | e9f186e5 | Peter A. G. Crosthwaite | static inline unsigned rx_desc_get_ownership(unsigned *desc) |
293 | e9f186e5 | Peter A. G. Crosthwaite | { |
294 | e9f186e5 | Peter A. G. Crosthwaite | return desc[0] & DESC_0_RX_OWNERSHIP ? 1 : 0; |
295 | e9f186e5 | Peter A. G. Crosthwaite | } |
296 | e9f186e5 | Peter A. G. Crosthwaite | |
297 | e9f186e5 | Peter A. G. Crosthwaite | static inline void rx_desc_set_ownership(unsigned *desc) |
298 | e9f186e5 | Peter A. G. Crosthwaite | { |
299 | e9f186e5 | Peter A. G. Crosthwaite | desc[0] |= DESC_0_RX_OWNERSHIP;
|
300 | e9f186e5 | Peter A. G. Crosthwaite | } |
301 | e9f186e5 | Peter A. G. Crosthwaite | |
302 | e9f186e5 | Peter A. G. Crosthwaite | static inline void rx_desc_set_sof(unsigned *desc) |
303 | e9f186e5 | Peter A. G. Crosthwaite | { |
304 | e9f186e5 | Peter A. G. Crosthwaite | desc[1] |= DESC_1_RX_SOF;
|
305 | e9f186e5 | Peter A. G. Crosthwaite | } |
306 | e9f186e5 | Peter A. G. Crosthwaite | |
307 | e9f186e5 | Peter A. G. Crosthwaite | static inline void rx_desc_set_eof(unsigned *desc) |
308 | e9f186e5 | Peter A. G. Crosthwaite | { |
309 | e9f186e5 | Peter A. G. Crosthwaite | desc[1] |= DESC_1_RX_EOF;
|
310 | e9f186e5 | Peter A. G. Crosthwaite | } |
311 | e9f186e5 | Peter A. G. Crosthwaite | |
312 | e9f186e5 | Peter A. G. Crosthwaite | static inline void rx_desc_set_length(unsigned *desc, unsigned len) |
313 | e9f186e5 | Peter A. G. Crosthwaite | { |
314 | e9f186e5 | Peter A. G. Crosthwaite | desc[1] &= ~DESC_1_LENGTH;
|
315 | e9f186e5 | Peter A. G. Crosthwaite | desc[1] |= len;
|
316 | e9f186e5 | Peter A. G. Crosthwaite | } |
317 | e9f186e5 | Peter A. G. Crosthwaite | |
318 | e9f186e5 | Peter A. G. Crosthwaite | typedef struct { |
319 | e9f186e5 | Peter A. G. Crosthwaite | SysBusDevice busdev; |
320 | e9f186e5 | Peter A. G. Crosthwaite | MemoryRegion iomem; |
321 | e9f186e5 | Peter A. G. Crosthwaite | NICState *nic; |
322 | e9f186e5 | Peter A. G. Crosthwaite | NICConf conf; |
323 | e9f186e5 | Peter A. G. Crosthwaite | qemu_irq irq; |
324 | e9f186e5 | Peter A. G. Crosthwaite | |
325 | e9f186e5 | Peter A. G. Crosthwaite | /* GEM registers backing store */
|
326 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t regs[GEM_MAXREG]; |
327 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are write only */
|
328 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t regs_wo[GEM_MAXREG]; |
329 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are read only */
|
330 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t regs_ro[GEM_MAXREG]; |
331 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are clear on read */
|
332 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t regs_rtc[GEM_MAXREG]; |
333 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are write 1 to clear */
|
334 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t regs_w1c[GEM_MAXREG]; |
335 | e9f186e5 | Peter A. G. Crosthwaite | |
336 | e9f186e5 | Peter A. G. Crosthwaite | /* PHY registers backing store */
|
337 | e9f186e5 | Peter A. G. Crosthwaite | uint16_t phy_regs[32];
|
338 | e9f186e5 | Peter A. G. Crosthwaite | |
339 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t phy_loop; /* Are we in phy loopback? */
|
340 | e9f186e5 | Peter A. G. Crosthwaite | |
341 | e9f186e5 | Peter A. G. Crosthwaite | /* The current DMA descriptor pointers */
|
342 | e9f186e5 | Peter A. G. Crosthwaite | target_phys_addr_t rx_desc_addr; |
343 | e9f186e5 | Peter A. G. Crosthwaite | target_phys_addr_t tx_desc_addr; |
344 | e9f186e5 | Peter A. G. Crosthwaite | |
345 | e9f186e5 | Peter A. G. Crosthwaite | } GemState; |
346 | e9f186e5 | Peter A. G. Crosthwaite | |
347 | e9f186e5 | Peter A. G. Crosthwaite | /* The broadcast MAC address: 0xFFFFFFFFFFFF */
|
348 | e9f186e5 | Peter A. G. Crosthwaite | const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
349 | e9f186e5 | Peter A. G. Crosthwaite | |
350 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
351 | e9f186e5 | Peter A. G. Crosthwaite | * gem_init_register_masks:
|
352 | e9f186e5 | Peter A. G. Crosthwaite | * One time initialization.
|
353 | e9f186e5 | Peter A. G. Crosthwaite | * Set masks to identify which register bits have magical clear properties
|
354 | e9f186e5 | Peter A. G. Crosthwaite | */
|
355 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_init_register_masks(GemState *s) |
356 | e9f186e5 | Peter A. G. Crosthwaite | { |
357 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are read only*/
|
358 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->regs_ro[0], 0, sizeof(s->regs_ro)); |
359 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_NWCTRL] = 0xFFF80000;
|
360 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_NWSTATUS] = 0xFFFFFFFF;
|
361 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_DMACFG] = 0xFE00F000;
|
362 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_TXSTATUS] = 0xFFFFFE08;
|
363 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_RXQBASE] = 0x00000003;
|
364 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_TXQBASE] = 0x00000003;
|
365 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_RXSTATUS] = 0xFFFFFFF0;
|
366 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_ISR] = 0xFFFFFFFF;
|
367 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_IMR] = 0xFFFFFFFF;
|
368 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_ro[GEM_MODID] = 0xFFFFFFFF;
|
369 | e9f186e5 | Peter A. G. Crosthwaite | |
370 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are clear on read */
|
371 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->regs_rtc[0], 0, sizeof(s->regs_rtc)); |
372 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_rtc[GEM_ISR] = 0xFFFFFFFF;
|
373 | e9f186e5 | Peter A. G. Crosthwaite | |
374 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are write 1 to clear */
|
375 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->regs_w1c[0], 0, sizeof(s->regs_w1c)); |
376 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_w1c[GEM_TXSTATUS] = 0x000001F7;
|
377 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_w1c[GEM_RXSTATUS] = 0x0000000F;
|
378 | e9f186e5 | Peter A. G. Crosthwaite | |
379 | e9f186e5 | Peter A. G. Crosthwaite | /* Mask of register bits which are write only */
|
380 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->regs_wo[0], 0, sizeof(s->regs_wo)); |
381 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_wo[GEM_NWCTRL] = 0x00073E60;
|
382 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_wo[GEM_IER] = 0x07FFFFFF;
|
383 | e9f186e5 | Peter A. G. Crosthwaite | s->regs_wo[GEM_IDR] = 0x07FFFFFF;
|
384 | e9f186e5 | Peter A. G. Crosthwaite | } |
385 | e9f186e5 | Peter A. G. Crosthwaite | |
386 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
387 | e9f186e5 | Peter A. G. Crosthwaite | * phy_update_link:
|
388 | e9f186e5 | Peter A. G. Crosthwaite | * Make the emulated PHY link state match the QEMU "interface" state.
|
389 | e9f186e5 | Peter A. G. Crosthwaite | */
|
390 | e9f186e5 | Peter A. G. Crosthwaite | static void phy_update_link(GemState *s) |
391 | e9f186e5 | Peter A. G. Crosthwaite | { |
392 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("down %d\n", s->nic->nc.link_down);
|
393 | e9f186e5 | Peter A. G. Crosthwaite | |
394 | e9f186e5 | Peter A. G. Crosthwaite | /* Autonegotiation status mirrors link status. */
|
395 | e9f186e5 | Peter A. G. Crosthwaite | if (s->nic->nc.link_down) {
|
396 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_STATUS] &= ~(PHY_REG_STATUS_ANEGCMPL | |
397 | e9f186e5 | Peter A. G. Crosthwaite | PHY_REG_STATUS_LINK); |
398 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_INT_ST] |= PHY_REG_INT_ST_LINKC; |
399 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
400 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_STATUS] |= (PHY_REG_STATUS_ANEGCMPL | |
401 | e9f186e5 | Peter A. G. Crosthwaite | PHY_REG_STATUS_LINK); |
402 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_INT_ST] |= (PHY_REG_INT_ST_LINKC | |
403 | e9f186e5 | Peter A. G. Crosthwaite | PHY_REG_INT_ST_ANEGCMPL | |
404 | e9f186e5 | Peter A. G. Crosthwaite | PHY_REG_INT_ST_ENERGY); |
405 | e9f186e5 | Peter A. G. Crosthwaite | } |
406 | e9f186e5 | Peter A. G. Crosthwaite | } |
407 | e9f186e5 | Peter A. G. Crosthwaite | |
408 | e9f186e5 | Peter A. G. Crosthwaite | static int gem_can_receive(VLANClientState *nc) |
409 | e9f186e5 | Peter A. G. Crosthwaite | { |
410 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s; |
411 | e9f186e5 | Peter A. G. Crosthwaite | |
412 | e9f186e5 | Peter A. G. Crosthwaite | s = DO_UPCAST(NICState, nc, nc)->opaque; |
413 | e9f186e5 | Peter A. G. Crosthwaite | |
414 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
415 | e9f186e5 | Peter A. G. Crosthwaite | |
416 | e9f186e5 | Peter A. G. Crosthwaite | /* Do nothing if receive is not enabled. */
|
417 | e9f186e5 | Peter A. G. Crosthwaite | if (!(s->regs[GEM_NWCTRL] & GEM_NWCTRL_RXENA)) {
|
418 | e9f186e5 | Peter A. G. Crosthwaite | return 0; |
419 | e9f186e5 | Peter A. G. Crosthwaite | } |
420 | e9f186e5 | Peter A. G. Crosthwaite | |
421 | e9f186e5 | Peter A. G. Crosthwaite | return 1; |
422 | e9f186e5 | Peter A. G. Crosthwaite | } |
423 | e9f186e5 | Peter A. G. Crosthwaite | |
424 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
425 | e9f186e5 | Peter A. G. Crosthwaite | * gem_update_int_status:
|
426 | e9f186e5 | Peter A. G. Crosthwaite | * Raise or lower interrupt based on current status.
|
427 | e9f186e5 | Peter A. G. Crosthwaite | */
|
428 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_update_int_status(GemState *s) |
429 | e9f186e5 | Peter A. G. Crosthwaite | { |
430 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t new_interrupts = 0;
|
431 | e9f186e5 | Peter A. G. Crosthwaite | /* Packet transmitted ? */
|
432 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_TXSTATUS] & GEM_TXSTATUS_TXCMPL) {
|
433 | e9f186e5 | Peter A. G. Crosthwaite | new_interrupts |= GEM_INT_TXCMPL; |
434 | e9f186e5 | Peter A. G. Crosthwaite | } |
435 | e9f186e5 | Peter A. G. Crosthwaite | /* End of TX ring ? */
|
436 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_TXSTATUS] & GEM_TXSTATUS_USED) {
|
437 | e9f186e5 | Peter A. G. Crosthwaite | new_interrupts |= GEM_INT_TXUSED; |
438 | e9f186e5 | Peter A. G. Crosthwaite | } |
439 | e9f186e5 | Peter A. G. Crosthwaite | |
440 | e9f186e5 | Peter A. G. Crosthwaite | /* Frame received ? */
|
441 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_RXSTATUS] & GEM_RXSTATUS_FRMRCVD) {
|
442 | e9f186e5 | Peter A. G. Crosthwaite | new_interrupts |= GEM_INT_RXCMPL; |
443 | e9f186e5 | Peter A. G. Crosthwaite | } |
444 | e9f186e5 | Peter A. G. Crosthwaite | /* RX ring full ? */
|
445 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_RXSTATUS] & GEM_RXSTATUS_NOBUF) {
|
446 | e9f186e5 | Peter A. G. Crosthwaite | new_interrupts |= GEM_INT_RXUSED; |
447 | e9f186e5 | Peter A. G. Crosthwaite | } |
448 | e9f186e5 | Peter A. G. Crosthwaite | |
449 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_ISR] |= new_interrupts & ~(s->regs[GEM_IMR]); |
450 | e9f186e5 | Peter A. G. Crosthwaite | |
451 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_ISR]) {
|
452 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("asserting int. (0x%08x)\n", s->regs[GEM_ISR]);
|
453 | e9f186e5 | Peter A. G. Crosthwaite | qemu_set_irq(s->irq, 1);
|
454 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
455 | e9f186e5 | Peter A. G. Crosthwaite | qemu_set_irq(s->irq, 0);
|
456 | e9f186e5 | Peter A. G. Crosthwaite | } |
457 | e9f186e5 | Peter A. G. Crosthwaite | } |
458 | e9f186e5 | Peter A. G. Crosthwaite | |
459 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
460 | e9f186e5 | Peter A. G. Crosthwaite | * gem_receive_updatestats:
|
461 | e9f186e5 | Peter A. G. Crosthwaite | * Increment receive statistics.
|
462 | e9f186e5 | Peter A. G. Crosthwaite | */
|
463 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_receive_updatestats(GemState *s, const uint8_t *packet, |
464 | e9f186e5 | Peter A. G. Crosthwaite | unsigned bytes)
|
465 | e9f186e5 | Peter A. G. Crosthwaite | { |
466 | e9f186e5 | Peter A. G. Crosthwaite | uint64_t octets; |
467 | e9f186e5 | Peter A. G. Crosthwaite | |
468 | e9f186e5 | Peter A. G. Crosthwaite | /* Total octets (bytes) received */
|
469 | e9f186e5 | Peter A. G. Crosthwaite | octets = ((uint64_t)(s->regs[GEM_OCTRXLO]) << 32) |
|
470 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTRXHI]; |
471 | e9f186e5 | Peter A. G. Crosthwaite | octets += bytes; |
472 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTRXLO] = octets >> 32;
|
473 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTRXHI] = octets; |
474 | e9f186e5 | Peter A. G. Crosthwaite | |
475 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Frames received */
|
476 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXCNT]++; |
477 | e9f186e5 | Peter A. G. Crosthwaite | |
478 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Broadcast Frames counter */
|
479 | e9f186e5 | Peter A. G. Crosthwaite | if (!memcmp(packet, broadcast_addr, 6)) { |
480 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXBROADCNT]++; |
481 | e9f186e5 | Peter A. G. Crosthwaite | } |
482 | e9f186e5 | Peter A. G. Crosthwaite | |
483 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Multicast Frames counter */
|
484 | e9f186e5 | Peter A. G. Crosthwaite | if (packet[0] == 0x01) { |
485 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXMULTICNT]++; |
486 | e9f186e5 | Peter A. G. Crosthwaite | } |
487 | e9f186e5 | Peter A. G. Crosthwaite | |
488 | e9f186e5 | Peter A. G. Crosthwaite | if (bytes <= 64) { |
489 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX64CNT]++; |
490 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 127) { |
491 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX65CNT]++; |
492 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 255) { |
493 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX128CNT]++; |
494 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 511) { |
495 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX256CNT]++; |
496 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 1023) { |
497 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX512CNT]++; |
498 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 1518) { |
499 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX1024CNT]++; |
500 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
501 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RX1519CNT]++; |
502 | e9f186e5 | Peter A. G. Crosthwaite | } |
503 | e9f186e5 | Peter A. G. Crosthwaite | } |
504 | e9f186e5 | Peter A. G. Crosthwaite | |
505 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
506 | e9f186e5 | Peter A. G. Crosthwaite | * Get the MAC Address bit from the specified position
|
507 | e9f186e5 | Peter A. G. Crosthwaite | */
|
508 | e9f186e5 | Peter A. G. Crosthwaite | static unsigned get_bit(const uint8_t *mac, unsigned bit) |
509 | e9f186e5 | Peter A. G. Crosthwaite | { |
510 | e9f186e5 | Peter A. G. Crosthwaite | unsigned byte;
|
511 | e9f186e5 | Peter A. G. Crosthwaite | |
512 | e9f186e5 | Peter A. G. Crosthwaite | byte = mac[bit / 8];
|
513 | e9f186e5 | Peter A. G. Crosthwaite | byte >>= (bit & 0x7);
|
514 | e9f186e5 | Peter A. G. Crosthwaite | byte &= 1;
|
515 | e9f186e5 | Peter A. G. Crosthwaite | |
516 | e9f186e5 | Peter A. G. Crosthwaite | return byte;
|
517 | e9f186e5 | Peter A. G. Crosthwaite | } |
518 | e9f186e5 | Peter A. G. Crosthwaite | |
519 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
520 | e9f186e5 | Peter A. G. Crosthwaite | * Calculate a GEM MAC Address hash index
|
521 | e9f186e5 | Peter A. G. Crosthwaite | */
|
522 | e9f186e5 | Peter A. G. Crosthwaite | static unsigned calc_mac_hash(const uint8_t *mac) |
523 | e9f186e5 | Peter A. G. Crosthwaite | { |
524 | e9f186e5 | Peter A. G. Crosthwaite | int index_bit, mac_bit;
|
525 | e9f186e5 | Peter A. G. Crosthwaite | unsigned hash_index;
|
526 | e9f186e5 | Peter A. G. Crosthwaite | |
527 | e9f186e5 | Peter A. G. Crosthwaite | hash_index = 0;
|
528 | e9f186e5 | Peter A. G. Crosthwaite | mac_bit = 5;
|
529 | e9f186e5 | Peter A. G. Crosthwaite | for (index_bit = 5; index_bit >= 0; index_bit--) { |
530 | e9f186e5 | Peter A. G. Crosthwaite | hash_index |= (get_bit(mac, mac_bit) ^ |
531 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 6) ^
|
532 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 12) ^
|
533 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 18) ^
|
534 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 24) ^
|
535 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 30) ^
|
536 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 36) ^
|
537 | e9f186e5 | Peter A. G. Crosthwaite | get_bit(mac, mac_bit + 42)) << index_bit;
|
538 | e9f186e5 | Peter A. G. Crosthwaite | mac_bit--; |
539 | e9f186e5 | Peter A. G. Crosthwaite | } |
540 | e9f186e5 | Peter A. G. Crosthwaite | |
541 | e9f186e5 | Peter A. G. Crosthwaite | return hash_index;
|
542 | e9f186e5 | Peter A. G. Crosthwaite | } |
543 | e9f186e5 | Peter A. G. Crosthwaite | |
544 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
545 | e9f186e5 | Peter A. G. Crosthwaite | * gem_mac_address_filter:
|
546 | e9f186e5 | Peter A. G. Crosthwaite | * Accept or reject this destination address?
|
547 | e9f186e5 | Peter A. G. Crosthwaite | * Returns:
|
548 | e9f186e5 | Peter A. G. Crosthwaite | * GEM_RX_REJECT: reject
|
549 | e9f186e5 | Peter A. G. Crosthwaite | * GEM_RX_ACCEPT: accept
|
550 | e9f186e5 | Peter A. G. Crosthwaite | */
|
551 | e9f186e5 | Peter A. G. Crosthwaite | static int gem_mac_address_filter(GemState *s, const uint8_t *packet) |
552 | e9f186e5 | Peter A. G. Crosthwaite | { |
553 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t *gem_spaddr; |
554 | e9f186e5 | Peter A. G. Crosthwaite | int i;
|
555 | e9f186e5 | Peter A. G. Crosthwaite | |
556 | e9f186e5 | Peter A. G. Crosthwaite | /* Promiscuous mode? */
|
557 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_NWCFG] & GEM_NWCFG_PROMISC) {
|
558 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_ACCEPT;
|
559 | e9f186e5 | Peter A. G. Crosthwaite | } |
560 | e9f186e5 | Peter A. G. Crosthwaite | |
561 | e9f186e5 | Peter A. G. Crosthwaite | if (!memcmp(packet, broadcast_addr, 6)) { |
562 | e9f186e5 | Peter A. G. Crosthwaite | /* Reject broadcast packets? */
|
563 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_NWCFG] & GEM_NWCFG_BCAST_REJ) {
|
564 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_REJECT;
|
565 | e9f186e5 | Peter A. G. Crosthwaite | } |
566 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_ACCEPT;
|
567 | e9f186e5 | Peter A. G. Crosthwaite | } |
568 | e9f186e5 | Peter A. G. Crosthwaite | |
569 | e9f186e5 | Peter A. G. Crosthwaite | /* Accept packets -w- hash match? */
|
570 | e9f186e5 | Peter A. G. Crosthwaite | if ((packet[0] == 0x01 && (s->regs[GEM_NWCFG] & GEM_NWCFG_MCAST_HASH)) || |
571 | e9f186e5 | Peter A. G. Crosthwaite | (packet[0] != 0x01 && (s->regs[GEM_NWCFG] & GEM_NWCFG_UCAST_HASH))) { |
572 | e9f186e5 | Peter A. G. Crosthwaite | unsigned hash_index;
|
573 | e9f186e5 | Peter A. G. Crosthwaite | |
574 | e9f186e5 | Peter A. G. Crosthwaite | hash_index = calc_mac_hash(packet); |
575 | e9f186e5 | Peter A. G. Crosthwaite | if (hash_index < 32) { |
576 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_HASHLO] & (1<<hash_index)) { |
577 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_ACCEPT;
|
578 | e9f186e5 | Peter A. G. Crosthwaite | } |
579 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
580 | e9f186e5 | Peter A. G. Crosthwaite | hash_index -= 32;
|
581 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_HASHHI] & (1<<hash_index)) { |
582 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_ACCEPT;
|
583 | e9f186e5 | Peter A. G. Crosthwaite | } |
584 | e9f186e5 | Peter A. G. Crosthwaite | } |
585 | e9f186e5 | Peter A. G. Crosthwaite | } |
586 | e9f186e5 | Peter A. G. Crosthwaite | |
587 | e9f186e5 | Peter A. G. Crosthwaite | /* Check all 4 specific addresses */
|
588 | e9f186e5 | Peter A. G. Crosthwaite | gem_spaddr = (uint8_t *)&(s->regs[GEM_SPADDR1LO]); |
589 | e9f186e5 | Peter A. G. Crosthwaite | for (i = 0; i < 4; i++) { |
590 | e9f186e5 | Peter A. G. Crosthwaite | if (!memcmp(packet, gem_spaddr, 6)) { |
591 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_ACCEPT;
|
592 | e9f186e5 | Peter A. G. Crosthwaite | } |
593 | e9f186e5 | Peter A. G. Crosthwaite | |
594 | e9f186e5 | Peter A. G. Crosthwaite | gem_spaddr += 8;
|
595 | e9f186e5 | Peter A. G. Crosthwaite | } |
596 | e9f186e5 | Peter A. G. Crosthwaite | |
597 | e9f186e5 | Peter A. G. Crosthwaite | /* No address match; reject the packet */
|
598 | e9f186e5 | Peter A. G. Crosthwaite | return GEM_RX_REJECT;
|
599 | e9f186e5 | Peter A. G. Crosthwaite | } |
600 | e9f186e5 | Peter A. G. Crosthwaite | |
601 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
602 | e9f186e5 | Peter A. G. Crosthwaite | * gem_receive:
|
603 | e9f186e5 | Peter A. G. Crosthwaite | * Fit a packet handed to us by QEMU into the receive descriptor ring.
|
604 | e9f186e5 | Peter A. G. Crosthwaite | */
|
605 | e9f186e5 | Peter A. G. Crosthwaite | static ssize_t gem_receive(VLANClientState *nc, const uint8_t *buf, size_t size) |
606 | e9f186e5 | Peter A. G. Crosthwaite | { |
607 | e9f186e5 | Peter A. G. Crosthwaite | unsigned desc[2]; |
608 | e9f186e5 | Peter A. G. Crosthwaite | target_phys_addr_t packet_desc_addr, last_desc_addr; |
609 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s; |
610 | e9f186e5 | Peter A. G. Crosthwaite | unsigned rxbufsize, bytes_to_copy;
|
611 | e9f186e5 | Peter A. G. Crosthwaite | unsigned rxbuf_offset;
|
612 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t rxbuf[2048];
|
613 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t *rxbuf_ptr; |
614 | e9f186e5 | Peter A. G. Crosthwaite | |
615 | e9f186e5 | Peter A. G. Crosthwaite | s = DO_UPCAST(NICState, nc, nc)->opaque; |
616 | e9f186e5 | Peter A. G. Crosthwaite | |
617 | e9f186e5 | Peter A. G. Crosthwaite | /* Do nothing if receive is not enabled. */
|
618 | e9f186e5 | Peter A. G. Crosthwaite | if (!(s->regs[GEM_NWCTRL] & GEM_NWCTRL_RXENA)) {
|
619 | e9f186e5 | Peter A. G. Crosthwaite | return -1; |
620 | e9f186e5 | Peter A. G. Crosthwaite | } |
621 | e9f186e5 | Peter A. G. Crosthwaite | |
622 | e9f186e5 | Peter A. G. Crosthwaite | /* Is this destination MAC address "for us" ? */
|
623 | e9f186e5 | Peter A. G. Crosthwaite | if (gem_mac_address_filter(s, buf) == GEM_RX_REJECT) {
|
624 | e9f186e5 | Peter A. G. Crosthwaite | return -1; |
625 | e9f186e5 | Peter A. G. Crosthwaite | } |
626 | e9f186e5 | Peter A. G. Crosthwaite | |
627 | e9f186e5 | Peter A. G. Crosthwaite | /* Discard packets with receive length error enabled ? */
|
628 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_NWCFG] & GEM_NWCFG_LERR_DISC) {
|
629 | e9f186e5 | Peter A. G. Crosthwaite | unsigned type_len;
|
630 | e9f186e5 | Peter A. G. Crosthwaite | |
631 | e9f186e5 | Peter A. G. Crosthwaite | /* Fish the ethertype / length field out of the RX packet */
|
632 | e9f186e5 | Peter A. G. Crosthwaite | type_len = buf[12] << 8 | buf[13]; |
633 | e9f186e5 | Peter A. G. Crosthwaite | /* It is a length field, not an ethertype */
|
634 | e9f186e5 | Peter A. G. Crosthwaite | if (type_len < 0x600) { |
635 | e9f186e5 | Peter A. G. Crosthwaite | if (size < type_len) {
|
636 | e9f186e5 | Peter A. G. Crosthwaite | /* discard */
|
637 | e9f186e5 | Peter A. G. Crosthwaite | return -1; |
638 | e9f186e5 | Peter A. G. Crosthwaite | } |
639 | e9f186e5 | Peter A. G. Crosthwaite | } |
640 | e9f186e5 | Peter A. G. Crosthwaite | } |
641 | e9f186e5 | Peter A. G. Crosthwaite | |
642 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
643 | e9f186e5 | Peter A. G. Crosthwaite | * Determine configured receive buffer offset (probably 0)
|
644 | e9f186e5 | Peter A. G. Crosthwaite | */
|
645 | e9f186e5 | Peter A. G. Crosthwaite | rxbuf_offset = (s->regs[GEM_NWCFG] & GEM_NWCFG_BUFF_OFST_M) >> |
646 | e9f186e5 | Peter A. G. Crosthwaite | GEM_NWCFG_BUFF_OFST_S; |
647 | e9f186e5 | Peter A. G. Crosthwaite | |
648 | e9f186e5 | Peter A. G. Crosthwaite | /* The configure size of each receive buffer. Determines how many
|
649 | e9f186e5 | Peter A. G. Crosthwaite | * buffers needed to hold this packet.
|
650 | e9f186e5 | Peter A. G. Crosthwaite | */
|
651 | e9f186e5 | Peter A. G. Crosthwaite | rxbufsize = ((s->regs[GEM_DMACFG] & GEM_DMACFG_RBUFSZ_M) >> |
652 | e9f186e5 | Peter A. G. Crosthwaite | GEM_DMACFG_RBUFSZ_S) * GEM_DMACFG_RBUFSZ_MUL; |
653 | e9f186e5 | Peter A. G. Crosthwaite | bytes_to_copy = size; |
654 | e9f186e5 | Peter A. G. Crosthwaite | |
655 | e9f186e5 | Peter A. G. Crosthwaite | /* Strip of FCS field ? (usually yes) */
|
656 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_NWCFG] & GEM_NWCFG_STRIP_FCS) {
|
657 | e9f186e5 | Peter A. G. Crosthwaite | rxbuf_ptr = (void *)buf;
|
658 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
659 | e9f186e5 | Peter A. G. Crosthwaite | unsigned crc_val;
|
660 | e9f186e5 | Peter A. G. Crosthwaite | int crc_offset;
|
661 | e9f186e5 | Peter A. G. Crosthwaite | |
662 | e9f186e5 | Peter A. G. Crosthwaite | /* The application wants the FCS field, which QEMU does not provide.
|
663 | e9f186e5 | Peter A. G. Crosthwaite | * We must try and caclculate one.
|
664 | e9f186e5 | Peter A. G. Crosthwaite | */
|
665 | e9f186e5 | Peter A. G. Crosthwaite | |
666 | e9f186e5 | Peter A. G. Crosthwaite | memcpy(rxbuf, buf, size); |
667 | e9f186e5 | Peter A. G. Crosthwaite | memset(rxbuf + size, 0, sizeof(rxbuf - size)); |
668 | e9f186e5 | Peter A. G. Crosthwaite | rxbuf_ptr = rxbuf; |
669 | e9f186e5 | Peter A. G. Crosthwaite | crc_val = cpu_to_le32(crc32(0, rxbuf, MAX(size, 60))); |
670 | e9f186e5 | Peter A. G. Crosthwaite | if (size < 60) { |
671 | e9f186e5 | Peter A. G. Crosthwaite | crc_offset = 60;
|
672 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
673 | e9f186e5 | Peter A. G. Crosthwaite | crc_offset = size; |
674 | e9f186e5 | Peter A. G. Crosthwaite | } |
675 | e9f186e5 | Peter A. G. Crosthwaite | memcpy(rxbuf + crc_offset, &crc_val, sizeof(crc_val));
|
676 | e9f186e5 | Peter A. G. Crosthwaite | |
677 | e9f186e5 | Peter A. G. Crosthwaite | bytes_to_copy += 4;
|
678 | e9f186e5 | Peter A. G. Crosthwaite | size += 4;
|
679 | e9f186e5 | Peter A. G. Crosthwaite | } |
680 | e9f186e5 | Peter A. G. Crosthwaite | |
681 | e9f186e5 | Peter A. G. Crosthwaite | /* Pad to minimum length */
|
682 | e9f186e5 | Peter A. G. Crosthwaite | if (size < 64) { |
683 | e9f186e5 | Peter A. G. Crosthwaite | size = 64;
|
684 | e9f186e5 | Peter A. G. Crosthwaite | } |
685 | e9f186e5 | Peter A. G. Crosthwaite | |
686 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("config bufsize: %d packet size: %ld\n", rxbufsize, size);
|
687 | e9f186e5 | Peter A. G. Crosthwaite | |
688 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr = s->rx_desc_addr; |
689 | e9f186e5 | Peter A. G. Crosthwaite | while (1) { |
690 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("read descriptor 0x%x\n", packet_desc_addr);
|
691 | e9f186e5 | Peter A. G. Crosthwaite | /* read current descriptor */
|
692 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(packet_desc_addr, |
693 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
694 | e9f186e5 | Peter A. G. Crosthwaite | |
695 | e9f186e5 | Peter A. G. Crosthwaite | /* Descriptor owned by software ? */
|
696 | e9f186e5 | Peter A. G. Crosthwaite | if (rx_desc_get_ownership(desc) == 1) { |
697 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("descriptor 0x%x owned by sw.\n", packet_desc_addr);
|
698 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_NOBUF; |
699 | e9f186e5 | Peter A. G. Crosthwaite | /* Handle interrupt consequences */
|
700 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
701 | e9f186e5 | Peter A. G. Crosthwaite | return -1; |
702 | e9f186e5 | Peter A. G. Crosthwaite | } |
703 | e9f186e5 | Peter A. G. Crosthwaite | |
704 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("copy %d bytes to 0x%x\n", MIN(bytes_to_copy, rxbufsize),
|
705 | e9f186e5 | Peter A. G. Crosthwaite | rx_desc_get_buffer(desc)); |
706 | e9f186e5 | Peter A. G. Crosthwaite | |
707 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
708 | e9f186e5 | Peter A. G. Crosthwaite | * Let's have QEMU lend a helping hand.
|
709 | e9f186e5 | Peter A. G. Crosthwaite | */
|
710 | e9f186e5 | Peter A. G. Crosthwaite | if (rx_desc_get_buffer(desc) == 0) { |
711 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("Invalid RX buffer (NULL) for descriptor 0x%x\n",
|
712 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr); |
713 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
714 | e9f186e5 | Peter A. G. Crosthwaite | } |
715 | e9f186e5 | Peter A. G. Crosthwaite | |
716 | e9f186e5 | Peter A. G. Crosthwaite | /* Copy packet data to emulated DMA buffer */
|
717 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_write(rx_desc_get_buffer(desc) + rxbuf_offset, |
718 | e9f186e5 | Peter A. G. Crosthwaite | rxbuf_ptr, MIN(bytes_to_copy, rxbufsize)); |
719 | e9f186e5 | Peter A. G. Crosthwaite | bytes_to_copy -= MIN(bytes_to_copy, rxbufsize); |
720 | e9f186e5 | Peter A. G. Crosthwaite | rxbuf_ptr += MIN(bytes_to_copy, rxbufsize); |
721 | e9f186e5 | Peter A. G. Crosthwaite | if (bytes_to_copy == 0) { |
722 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
723 | e9f186e5 | Peter A. G. Crosthwaite | } |
724 | e9f186e5 | Peter A. G. Crosthwaite | |
725 | e9f186e5 | Peter A. G. Crosthwaite | /* Next descriptor */
|
726 | e9f186e5 | Peter A. G. Crosthwaite | if (rx_desc_get_wrap(desc)) {
|
727 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr = s->regs[GEM_RXQBASE]; |
728 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
729 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr += 8;
|
730 | e9f186e5 | Peter A. G. Crosthwaite | } |
731 | e9f186e5 | Peter A. G. Crosthwaite | } |
732 | e9f186e5 | Peter A. G. Crosthwaite | |
733 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("set length: %ld, EOF on descriptor 0x%x\n", size,
|
734 | e9f186e5 | Peter A. G. Crosthwaite | (unsigned)packet_desc_addr);
|
735 | e9f186e5 | Peter A. G. Crosthwaite | |
736 | e9f186e5 | Peter A. G. Crosthwaite | /* Update last descriptor with EOF and total length */
|
737 | e9f186e5 | Peter A. G. Crosthwaite | rx_desc_set_eof(desc); |
738 | e9f186e5 | Peter A. G. Crosthwaite | rx_desc_set_length(desc, size); |
739 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_write(packet_desc_addr, |
740 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
741 | e9f186e5 | Peter A. G. Crosthwaite | |
742 | e9f186e5 | Peter A. G. Crosthwaite | /* Advance RX packet descriptor Q */
|
743 | e9f186e5 | Peter A. G. Crosthwaite | last_desc_addr = packet_desc_addr; |
744 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr = s->rx_desc_addr; |
745 | e9f186e5 | Peter A. G. Crosthwaite | s->rx_desc_addr = last_desc_addr; |
746 | e9f186e5 | Peter A. G. Crosthwaite | if (rx_desc_get_wrap(desc)) {
|
747 | e9f186e5 | Peter A. G. Crosthwaite | s->rx_desc_addr = s->regs[GEM_RXQBASE]; |
748 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
749 | e9f186e5 | Peter A. G. Crosthwaite | s->rx_desc_addr += 8;
|
750 | e9f186e5 | Peter A. G. Crosthwaite | } |
751 | e9f186e5 | Peter A. G. Crosthwaite | |
752 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("set SOF, OWN on descriptor 0x%08x\n", packet_desc_addr);
|
753 | e9f186e5 | Peter A. G. Crosthwaite | |
754 | e9f186e5 | Peter A. G. Crosthwaite | /* Count it */
|
755 | e9f186e5 | Peter A. G. Crosthwaite | gem_receive_updatestats(s, buf, size); |
756 | e9f186e5 | Peter A. G. Crosthwaite | |
757 | e9f186e5 | Peter A. G. Crosthwaite | /* Update first descriptor (which could also be the last) */
|
758 | e9f186e5 | Peter A. G. Crosthwaite | /* read descriptor */
|
759 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(packet_desc_addr, |
760 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
761 | e9f186e5 | Peter A. G. Crosthwaite | rx_desc_set_sof(desc); |
762 | e9f186e5 | Peter A. G. Crosthwaite | rx_desc_set_ownership(desc); |
763 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_write(packet_desc_addr, |
764 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
765 | e9f186e5 | Peter A. G. Crosthwaite | |
766 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_FRMRCVD; |
767 | e9f186e5 | Peter A. G. Crosthwaite | |
768 | e9f186e5 | Peter A. G. Crosthwaite | /* Handle interrupt consequences */
|
769 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
770 | e9f186e5 | Peter A. G. Crosthwaite | |
771 | e9f186e5 | Peter A. G. Crosthwaite | return size;
|
772 | e9f186e5 | Peter A. G. Crosthwaite | } |
773 | e9f186e5 | Peter A. G. Crosthwaite | |
774 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
775 | e9f186e5 | Peter A. G. Crosthwaite | * gem_transmit_updatestats:
|
776 | e9f186e5 | Peter A. G. Crosthwaite | * Increment transmit statistics.
|
777 | e9f186e5 | Peter A. G. Crosthwaite | */
|
778 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_transmit_updatestats(GemState *s, const uint8_t *packet, |
779 | e9f186e5 | Peter A. G. Crosthwaite | unsigned bytes)
|
780 | e9f186e5 | Peter A. G. Crosthwaite | { |
781 | e9f186e5 | Peter A. G. Crosthwaite | uint64_t octets; |
782 | e9f186e5 | Peter A. G. Crosthwaite | |
783 | e9f186e5 | Peter A. G. Crosthwaite | /* Total octets (bytes) transmitted */
|
784 | e9f186e5 | Peter A. G. Crosthwaite | octets = ((uint64_t)(s->regs[GEM_OCTTXLO]) << 32) |
|
785 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTTXHI]; |
786 | e9f186e5 | Peter A. G. Crosthwaite | octets += bytes; |
787 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTTXLO] = octets >> 32;
|
788 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_OCTTXHI] = octets; |
789 | e9f186e5 | Peter A. G. Crosthwaite | |
790 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Frames transmitted */
|
791 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXCNT]++; |
792 | e9f186e5 | Peter A. G. Crosthwaite | |
793 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Broadcast Frames counter */
|
794 | e9f186e5 | Peter A. G. Crosthwaite | if (!memcmp(packet, broadcast_addr, 6)) { |
795 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXBCNT]++; |
796 | e9f186e5 | Peter A. G. Crosthwaite | } |
797 | e9f186e5 | Peter A. G. Crosthwaite | |
798 | e9f186e5 | Peter A. G. Crosthwaite | /* Error-free Multicast Frames counter */
|
799 | e9f186e5 | Peter A. G. Crosthwaite | if (packet[0] == 0x01) { |
800 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXMCNT]++; |
801 | e9f186e5 | Peter A. G. Crosthwaite | } |
802 | e9f186e5 | Peter A. G. Crosthwaite | |
803 | e9f186e5 | Peter A. G. Crosthwaite | if (bytes <= 64) { |
804 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX64CNT]++; |
805 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 127) { |
806 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX65CNT]++; |
807 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 255) { |
808 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX128CNT]++; |
809 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 511) { |
810 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX256CNT]++; |
811 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 1023) { |
812 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX512CNT]++; |
813 | e9f186e5 | Peter A. G. Crosthwaite | } else if (bytes <= 1518) { |
814 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX1024CNT]++; |
815 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
816 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TX1519CNT]++; |
817 | e9f186e5 | Peter A. G. Crosthwaite | } |
818 | e9f186e5 | Peter A. G. Crosthwaite | } |
819 | e9f186e5 | Peter A. G. Crosthwaite | |
820 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
821 | e9f186e5 | Peter A. G. Crosthwaite | * gem_transmit:
|
822 | e9f186e5 | Peter A. G. Crosthwaite | * Fish packets out of the descriptor ring and feed them to QEMU
|
823 | e9f186e5 | Peter A. G. Crosthwaite | */
|
824 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_transmit(GemState *s) |
825 | e9f186e5 | Peter A. G. Crosthwaite | { |
826 | e9f186e5 | Peter A. G. Crosthwaite | unsigned desc[2]; |
827 | e9f186e5 | Peter A. G. Crosthwaite | target_phys_addr_t packet_desc_addr; |
828 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t tx_packet[2048];
|
829 | e9f186e5 | Peter A. G. Crosthwaite | uint8_t *p; |
830 | e9f186e5 | Peter A. G. Crosthwaite | unsigned total_bytes;
|
831 | e9f186e5 | Peter A. G. Crosthwaite | |
832 | e9f186e5 | Peter A. G. Crosthwaite | /* Do nothing if transmit is not enabled. */
|
833 | e9f186e5 | Peter A. G. Crosthwaite | if (!(s->regs[GEM_NWCTRL] & GEM_NWCTRL_TXENA)) {
|
834 | e9f186e5 | Peter A. G. Crosthwaite | return;
|
835 | e9f186e5 | Peter A. G. Crosthwaite | } |
836 | e9f186e5 | Peter A. G. Crosthwaite | |
837 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
838 | e9f186e5 | Peter A. G. Crosthwaite | |
839 | e9f186e5 | Peter A. G. Crosthwaite | /* The packet we will hand off to qemu.
|
840 | e9f186e5 | Peter A. G. Crosthwaite | * Packets scattered across multiple descriptors are gathered to this
|
841 | e9f186e5 | Peter A. G. Crosthwaite | * one contiguous buffer first.
|
842 | e9f186e5 | Peter A. G. Crosthwaite | */
|
843 | e9f186e5 | Peter A. G. Crosthwaite | p = tx_packet; |
844 | e9f186e5 | Peter A. G. Crosthwaite | total_bytes = 0;
|
845 | e9f186e5 | Peter A. G. Crosthwaite | |
846 | e9f186e5 | Peter A. G. Crosthwaite | /* read current descriptor */
|
847 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr = s->tx_desc_addr; |
848 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(packet_desc_addr, |
849 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
850 | e9f186e5 | Peter A. G. Crosthwaite | /* Handle all descriptors owned by hardware */
|
851 | e9f186e5 | Peter A. G. Crosthwaite | while (tx_desc_get_used(desc) == 0) { |
852 | e9f186e5 | Peter A. G. Crosthwaite | |
853 | e9f186e5 | Peter A. G. Crosthwaite | /* Do nothing if transmit is not enabled. */
|
854 | e9f186e5 | Peter A. G. Crosthwaite | if (!(s->regs[GEM_NWCTRL] & GEM_NWCTRL_TXENA)) {
|
855 | e9f186e5 | Peter A. G. Crosthwaite | return;
|
856 | e9f186e5 | Peter A. G. Crosthwaite | } |
857 | e9f186e5 | Peter A. G. Crosthwaite | print_gem_tx_desc(desc); |
858 | e9f186e5 | Peter A. G. Crosthwaite | |
859 | e9f186e5 | Peter A. G. Crosthwaite | /* The real hardware would eat this (and possibly crash).
|
860 | e9f186e5 | Peter A. G. Crosthwaite | * For QEMU let's lend a helping hand.
|
861 | e9f186e5 | Peter A. G. Crosthwaite | */
|
862 | e9f186e5 | Peter A. G. Crosthwaite | if ((tx_desc_get_buffer(desc) == 0) || |
863 | e9f186e5 | Peter A. G. Crosthwaite | (tx_desc_get_length(desc) == 0)) {
|
864 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("Invalid TX descriptor @ 0x%x\n", packet_desc_addr);
|
865 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
866 | e9f186e5 | Peter A. G. Crosthwaite | } |
867 | e9f186e5 | Peter A. G. Crosthwaite | |
868 | e9f186e5 | Peter A. G. Crosthwaite | /* Gather this fragment of the packet from "dma memory" to our contig.
|
869 | e9f186e5 | Peter A. G. Crosthwaite | * buffer.
|
870 | e9f186e5 | Peter A. G. Crosthwaite | */
|
871 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(tx_desc_get_buffer(desc), p, |
872 | e9f186e5 | Peter A. G. Crosthwaite | tx_desc_get_length(desc)); |
873 | e9f186e5 | Peter A. G. Crosthwaite | p += tx_desc_get_length(desc); |
874 | e9f186e5 | Peter A. G. Crosthwaite | total_bytes += tx_desc_get_length(desc); |
875 | e9f186e5 | Peter A. G. Crosthwaite | |
876 | e9f186e5 | Peter A. G. Crosthwaite | /* Last descriptor for this packet; hand the whole thing off */
|
877 | e9f186e5 | Peter A. G. Crosthwaite | if (tx_desc_get_last(desc)) {
|
878 | e9f186e5 | Peter A. G. Crosthwaite | /* Modify the 1st descriptor of this packet to be owned by
|
879 | e9f186e5 | Peter A. G. Crosthwaite | * the processor.
|
880 | e9f186e5 | Peter A. G. Crosthwaite | */
|
881 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(s->tx_desc_addr, |
882 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
883 | e9f186e5 | Peter A. G. Crosthwaite | tx_desc_set_used(desc); |
884 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_write(s->tx_desc_addr, |
885 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
886 | e9f186e5 | Peter A. G. Crosthwaite | /* Advance the hardare current descriptor past this packet */
|
887 | e9f186e5 | Peter A. G. Crosthwaite | if (tx_desc_get_wrap(desc)) {
|
888 | e9f186e5 | Peter A. G. Crosthwaite | s->tx_desc_addr = s->regs[GEM_TXQBASE]; |
889 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
890 | e9f186e5 | Peter A. G. Crosthwaite | s->tx_desc_addr = packet_desc_addr + 8;
|
891 | e9f186e5 | Peter A. G. Crosthwaite | } |
892 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("TX descriptor next: 0x%08x\n", s->tx_desc_addr);
|
893 | e9f186e5 | Peter A. G. Crosthwaite | |
894 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_TXCMPL; |
895 | e9f186e5 | Peter A. G. Crosthwaite | |
896 | e9f186e5 | Peter A. G. Crosthwaite | /* Handle interrupt consequences */
|
897 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
898 | e9f186e5 | Peter A. G. Crosthwaite | |
899 | e9f186e5 | Peter A. G. Crosthwaite | /* Is checksum offload enabled? */
|
900 | e9f186e5 | Peter A. G. Crosthwaite | if (s->regs[GEM_DMACFG] & GEM_DMACFG_TXCSUM_OFFL) {
|
901 | e9f186e5 | Peter A. G. Crosthwaite | net_checksum_calculate(tx_packet, total_bytes); |
902 | e9f186e5 | Peter A. G. Crosthwaite | } |
903 | e9f186e5 | Peter A. G. Crosthwaite | |
904 | e9f186e5 | Peter A. G. Crosthwaite | /* Update MAC statistics */
|
905 | e9f186e5 | Peter A. G. Crosthwaite | gem_transmit_updatestats(s, tx_packet, total_bytes); |
906 | e9f186e5 | Peter A. G. Crosthwaite | |
907 | e9f186e5 | Peter A. G. Crosthwaite | /* Send the packet somewhere */
|
908 | e9f186e5 | Peter A. G. Crosthwaite | if (s->phy_loop) {
|
909 | e9f186e5 | Peter A. G. Crosthwaite | gem_receive(&s->nic->nc, tx_packet, total_bytes); |
910 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
911 | e9f186e5 | Peter A. G. Crosthwaite | qemu_send_packet(&s->nic->nc, tx_packet, total_bytes); |
912 | e9f186e5 | Peter A. G. Crosthwaite | } |
913 | e9f186e5 | Peter A. G. Crosthwaite | |
914 | e9f186e5 | Peter A. G. Crosthwaite | /* Prepare for next packet */
|
915 | e9f186e5 | Peter A. G. Crosthwaite | p = tx_packet; |
916 | e9f186e5 | Peter A. G. Crosthwaite | total_bytes = 0;
|
917 | e9f186e5 | Peter A. G. Crosthwaite | } |
918 | e9f186e5 | Peter A. G. Crosthwaite | |
919 | e9f186e5 | Peter A. G. Crosthwaite | /* read next descriptor */
|
920 | e9f186e5 | Peter A. G. Crosthwaite | if (tx_desc_get_wrap(desc)) {
|
921 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr = s->regs[GEM_TXQBASE]; |
922 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
923 | e9f186e5 | Peter A. G. Crosthwaite | packet_desc_addr += 8;
|
924 | e9f186e5 | Peter A. G. Crosthwaite | } |
925 | e9f186e5 | Peter A. G. Crosthwaite | cpu_physical_memory_read(packet_desc_addr, |
926 | e9f186e5 | Peter A. G. Crosthwaite | (uint8_t *)&desc[0], sizeof(desc)); |
927 | e9f186e5 | Peter A. G. Crosthwaite | } |
928 | e9f186e5 | Peter A. G. Crosthwaite | |
929 | e9f186e5 | Peter A. G. Crosthwaite | if (tx_desc_get_used(desc)) {
|
930 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_USED; |
931 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
932 | e9f186e5 | Peter A. G. Crosthwaite | } |
933 | e9f186e5 | Peter A. G. Crosthwaite | } |
934 | e9f186e5 | Peter A. G. Crosthwaite | |
935 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_phy_reset(GemState *s) |
936 | e9f186e5 | Peter A. G. Crosthwaite | { |
937 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->phy_regs[0], 0, sizeof(s->phy_regs)); |
938 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_CONTROL] = 0x1140;
|
939 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_STATUS] = 0x7969;
|
940 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_PHYID1] = 0x0141;
|
941 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_PHYID2] = 0x0CC2;
|
942 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_ANEGADV] = 0x01E1;
|
943 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_LINKPABIL] = 0xCDE1;
|
944 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_ANEGEXP] = 0x000F;
|
945 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_NEXTP] = 0x2001;
|
946 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_LINKPNEXTP] = 0x40E6;
|
947 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_100BTCTRL] = 0x0300;
|
948 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_1000BTSTAT] = 0x7C00;
|
949 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_EXTSTAT] = 0x3000;
|
950 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_PHYSPCFC_CTL] = 0x0078;
|
951 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_PHYSPCFC_ST] = 0xBC00;
|
952 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_EXT_PHYSPCFC_CTL] = 0x0C60;
|
953 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_LED] = 0x4100;
|
954 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_EXT_PHYSPCFC_CTL2] = 0x000A;
|
955 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_EXT_PHYSPCFC_ST] = 0x848B;
|
956 | e9f186e5 | Peter A. G. Crosthwaite | |
957 | e9f186e5 | Peter A. G. Crosthwaite | phy_update_link(s); |
958 | e9f186e5 | Peter A. G. Crosthwaite | } |
959 | e9f186e5 | Peter A. G. Crosthwaite | |
960 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_reset(DeviceState *d) |
961 | e9f186e5 | Peter A. G. Crosthwaite | { |
962 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s = FROM_SYSBUS(GemState, sysbus_from_qdev(d)); |
963 | e9f186e5 | Peter A. G. Crosthwaite | |
964 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
965 | e9f186e5 | Peter A. G. Crosthwaite | |
966 | e9f186e5 | Peter A. G. Crosthwaite | /* Set post reset register values */
|
967 | e9f186e5 | Peter A. G. Crosthwaite | memset(&s->regs[0], 0, sizeof(s->regs)); |
968 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_NWCFG] = 0x00080000;
|
969 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_NWSTATUS] = 0x00000006;
|
970 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_DMACFG] = 0x00020784;
|
971 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_IMR] = 0x07ffffff;
|
972 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXPAUSE] = 0x0000ffff;
|
973 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_TXPARTIALSF] = 0x000003ff;
|
974 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_RXPARTIALSF] = 0x000003ff;
|
975 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_MODID] = 0x00020118;
|
976 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_DESCONF] = 0x02500111;
|
977 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_DESCONF2] = 0x2ab13fff;
|
978 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_DESCONF5] = 0x002f2145;
|
979 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_DESCONF6] = 0x00000200;
|
980 | e9f186e5 | Peter A. G. Crosthwaite | |
981 | e9f186e5 | Peter A. G. Crosthwaite | gem_phy_reset(s); |
982 | e9f186e5 | Peter A. G. Crosthwaite | |
983 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
984 | e9f186e5 | Peter A. G. Crosthwaite | } |
985 | e9f186e5 | Peter A. G. Crosthwaite | |
986 | e9f186e5 | Peter A. G. Crosthwaite | static uint16_t gem_phy_read(GemState *s, unsigned reg_num) |
987 | e9f186e5 | Peter A. G. Crosthwaite | { |
988 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("reg: %d value: 0x%04x\n", reg_num, s->phy_regs[reg_num]);
|
989 | e9f186e5 | Peter A. G. Crosthwaite | return s->phy_regs[reg_num];
|
990 | e9f186e5 | Peter A. G. Crosthwaite | } |
991 | e9f186e5 | Peter A. G. Crosthwaite | |
992 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_phy_write(GemState *s, unsigned reg_num, uint16_t val) |
993 | e9f186e5 | Peter A. G. Crosthwaite | { |
994 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("reg: %d value: 0x%04x\n", reg_num, val);
|
995 | e9f186e5 | Peter A. G. Crosthwaite | |
996 | e9f186e5 | Peter A. G. Crosthwaite | switch (reg_num) {
|
997 | e9f186e5 | Peter A. G. Crosthwaite | case PHY_REG_CONTROL:
|
998 | e9f186e5 | Peter A. G. Crosthwaite | if (val & PHY_REG_CONTROL_RST) {
|
999 | e9f186e5 | Peter A. G. Crosthwaite | /* Phy reset */
|
1000 | e9f186e5 | Peter A. G. Crosthwaite | gem_phy_reset(s); |
1001 | e9f186e5 | Peter A. G. Crosthwaite | val &= ~(PHY_REG_CONTROL_RST | PHY_REG_CONTROL_LOOP); |
1002 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_loop = 0;
|
1003 | e9f186e5 | Peter A. G. Crosthwaite | } |
1004 | e9f186e5 | Peter A. G. Crosthwaite | if (val & PHY_REG_CONTROL_ANEG) {
|
1005 | e9f186e5 | Peter A. G. Crosthwaite | /* Complete autonegotiation immediately */
|
1006 | e9f186e5 | Peter A. G. Crosthwaite | val &= ~PHY_REG_CONTROL_ANEG; |
1007 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[PHY_REG_STATUS] |= PHY_REG_STATUS_ANEGCMPL; |
1008 | e9f186e5 | Peter A. G. Crosthwaite | } |
1009 | e9f186e5 | Peter A. G. Crosthwaite | if (val & PHY_REG_CONTROL_LOOP) {
|
1010 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("PHY placed in loopback\n");
|
1011 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_loop = 1;
|
1012 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
1013 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_loop = 0;
|
1014 | e9f186e5 | Peter A. G. Crosthwaite | } |
1015 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1016 | e9f186e5 | Peter A. G. Crosthwaite | } |
1017 | e9f186e5 | Peter A. G. Crosthwaite | s->phy_regs[reg_num] = val; |
1018 | e9f186e5 | Peter A. G. Crosthwaite | } |
1019 | e9f186e5 | Peter A. G. Crosthwaite | |
1020 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
1021 | e9f186e5 | Peter A. G. Crosthwaite | * gem_read32:
|
1022 | e9f186e5 | Peter A. G. Crosthwaite | * Read a GEM register.
|
1023 | e9f186e5 | Peter A. G. Crosthwaite | */
|
1024 | e9f186e5 | Peter A. G. Crosthwaite | static uint64_t gem_read(void *opaque, target_phys_addr_t offset, unsigned size) |
1025 | e9f186e5 | Peter A. G. Crosthwaite | { |
1026 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s; |
1027 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t retval; |
1028 | e9f186e5 | Peter A. G. Crosthwaite | |
1029 | e9f186e5 | Peter A. G. Crosthwaite | s = (GemState *)opaque; |
1030 | e9f186e5 | Peter A. G. Crosthwaite | |
1031 | e9f186e5 | Peter A. G. Crosthwaite | offset >>= 2;
|
1032 | e9f186e5 | Peter A. G. Crosthwaite | retval = s->regs[offset]; |
1033 | e9f186e5 | Peter A. G. Crosthwaite | |
1034 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("offset: 0x%04x read: 0x%08x\n", offset*4, retval); |
1035 | e9f186e5 | Peter A. G. Crosthwaite | |
1036 | e9f186e5 | Peter A. G. Crosthwaite | switch (offset) {
|
1037 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_ISR:
|
1038 | e9f186e5 | Peter A. G. Crosthwaite | qemu_set_irq(s->irq, 0);
|
1039 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1040 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_PHYMNTNC:
|
1041 | e9f186e5 | Peter A. G. Crosthwaite | if (retval & GEM_PHYMNTNC_OP_R) {
|
1042 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t phy_addr, reg_num; |
1043 | e9f186e5 | Peter A. G. Crosthwaite | |
1044 | e9f186e5 | Peter A. G. Crosthwaite | phy_addr = (retval & GEM_PHYMNTNC_ADDR) >> GEM_PHYMNTNC_ADDR_SHFT; |
1045 | e9f186e5 | Peter A. G. Crosthwaite | if (phy_addr == BOARD_PHY_ADDRESS) {
|
1046 | e9f186e5 | Peter A. G. Crosthwaite | reg_num = (retval & GEM_PHYMNTNC_REG) >> GEM_PHYMNTNC_REG_SHIFT; |
1047 | e9f186e5 | Peter A. G. Crosthwaite | retval &= 0xFFFF0000;
|
1048 | e9f186e5 | Peter A. G. Crosthwaite | retval |= gem_phy_read(s, reg_num); |
1049 | e9f186e5 | Peter A. G. Crosthwaite | } else {
|
1050 | e9f186e5 | Peter A. G. Crosthwaite | retval |= 0xFFFF; /* No device at this address */ |
1051 | e9f186e5 | Peter A. G. Crosthwaite | } |
1052 | e9f186e5 | Peter A. G. Crosthwaite | } |
1053 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1054 | e9f186e5 | Peter A. G. Crosthwaite | } |
1055 | e9f186e5 | Peter A. G. Crosthwaite | |
1056 | e9f186e5 | Peter A. G. Crosthwaite | /* Squash read to clear bits */
|
1057 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[offset] &= ~(s->regs_rtc[offset]); |
1058 | e9f186e5 | Peter A. G. Crosthwaite | |
1059 | e9f186e5 | Peter A. G. Crosthwaite | /* Do not provide write only bits */
|
1060 | e9f186e5 | Peter A. G. Crosthwaite | retval &= ~(s->regs_wo[offset]); |
1061 | e9f186e5 | Peter A. G. Crosthwaite | |
1062 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("0x%08x\n", retval);
|
1063 | e9f186e5 | Peter A. G. Crosthwaite | return retval;
|
1064 | e9f186e5 | Peter A. G. Crosthwaite | } |
1065 | e9f186e5 | Peter A. G. Crosthwaite | |
1066 | e9f186e5 | Peter A. G. Crosthwaite | /*
|
1067 | e9f186e5 | Peter A. G. Crosthwaite | * gem_write32:
|
1068 | e9f186e5 | Peter A. G. Crosthwaite | * Write a GEM register.
|
1069 | e9f186e5 | Peter A. G. Crosthwaite | */
|
1070 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_write(void *opaque, target_phys_addr_t offset, uint64_t val, |
1071 | e9f186e5 | Peter A. G. Crosthwaite | unsigned size)
|
1072 | e9f186e5 | Peter A. G. Crosthwaite | { |
1073 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s = (GemState *)opaque; |
1074 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t readonly; |
1075 | e9f186e5 | Peter A. G. Crosthwaite | |
1076 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("offset: 0x%04x write: 0x%08x ", offset, (unsigned)val); |
1077 | e9f186e5 | Peter A. G. Crosthwaite | offset >>= 2;
|
1078 | e9f186e5 | Peter A. G. Crosthwaite | |
1079 | e9f186e5 | Peter A. G. Crosthwaite | /* Squash bits which are read only in write value */
|
1080 | e9f186e5 | Peter A. G. Crosthwaite | val &= ~(s->regs_ro[offset]); |
1081 | e9f186e5 | Peter A. G. Crosthwaite | /* Preserve (only) bits which are read only in register */
|
1082 | e9f186e5 | Peter A. G. Crosthwaite | readonly = s->regs[offset]; |
1083 | e9f186e5 | Peter A. G. Crosthwaite | readonly &= s->regs_ro[offset]; |
1084 | e9f186e5 | Peter A. G. Crosthwaite | |
1085 | e9f186e5 | Peter A. G. Crosthwaite | /* Squash bits which are write 1 to clear */
|
1086 | e9f186e5 | Peter A. G. Crosthwaite | val &= ~(s->regs_w1c[offset] & val); |
1087 | e9f186e5 | Peter A. G. Crosthwaite | |
1088 | e9f186e5 | Peter A. G. Crosthwaite | /* Copy register write to backing store */
|
1089 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[offset] = val | readonly; |
1090 | e9f186e5 | Peter A. G. Crosthwaite | |
1091 | e9f186e5 | Peter A. G. Crosthwaite | /* Handle register write side effects */
|
1092 | e9f186e5 | Peter A. G. Crosthwaite | switch (offset) {
|
1093 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_NWCTRL:
|
1094 | e9f186e5 | Peter A. G. Crosthwaite | if (val & GEM_NWCTRL_TXSTART) {
|
1095 | e9f186e5 | Peter A. G. Crosthwaite | gem_transmit(s); |
1096 | e9f186e5 | Peter A. G. Crosthwaite | } |
1097 | e9f186e5 | Peter A. G. Crosthwaite | if (!(val & GEM_NWCTRL_TXENA)) {
|
1098 | e9f186e5 | Peter A. G. Crosthwaite | /* Reset to start of Q when transmit disabled. */
|
1099 | e9f186e5 | Peter A. G. Crosthwaite | s->tx_desc_addr = s->regs[GEM_TXQBASE]; |
1100 | e9f186e5 | Peter A. G. Crosthwaite | } |
1101 | e9f186e5 | Peter A. G. Crosthwaite | if (!(val & GEM_NWCTRL_RXENA)) {
|
1102 | e9f186e5 | Peter A. G. Crosthwaite | /* Reset to start of Q when receive disabled. */
|
1103 | e9f186e5 | Peter A. G. Crosthwaite | s->rx_desc_addr = s->regs[GEM_RXQBASE]; |
1104 | e9f186e5 | Peter A. G. Crosthwaite | } |
1105 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1106 | e9f186e5 | Peter A. G. Crosthwaite | |
1107 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_TXSTATUS:
|
1108 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
1109 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1110 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_RXQBASE:
|
1111 | e9f186e5 | Peter A. G. Crosthwaite | s->rx_desc_addr = val; |
1112 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1113 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_TXQBASE:
|
1114 | e9f186e5 | Peter A. G. Crosthwaite | s->tx_desc_addr = val; |
1115 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1116 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_RXSTATUS:
|
1117 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
1118 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1119 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_IER:
|
1120 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_IMR] &= ~val; |
1121 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
1122 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1123 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_IDR:
|
1124 | e9f186e5 | Peter A. G. Crosthwaite | s->regs[GEM_IMR] |= val; |
1125 | e9f186e5 | Peter A. G. Crosthwaite | gem_update_int_status(s); |
1126 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1127 | e9f186e5 | Peter A. G. Crosthwaite | case GEM_PHYMNTNC:
|
1128 | e9f186e5 | Peter A. G. Crosthwaite | if (val & GEM_PHYMNTNC_OP_W) {
|
1129 | e9f186e5 | Peter A. G. Crosthwaite | uint32_t phy_addr, reg_num; |
1130 | e9f186e5 | Peter A. G. Crosthwaite | |
1131 | e9f186e5 | Peter A. G. Crosthwaite | phy_addr = (val & GEM_PHYMNTNC_ADDR) >> GEM_PHYMNTNC_ADDR_SHFT; |
1132 | e9f186e5 | Peter A. G. Crosthwaite | if (phy_addr == BOARD_PHY_ADDRESS) {
|
1133 | e9f186e5 | Peter A. G. Crosthwaite | reg_num = (val & GEM_PHYMNTNC_REG) >> GEM_PHYMNTNC_REG_SHIFT; |
1134 | e9f186e5 | Peter A. G. Crosthwaite | gem_phy_write(s, reg_num, val); |
1135 | e9f186e5 | Peter A. G. Crosthwaite | } |
1136 | e9f186e5 | Peter A. G. Crosthwaite | } |
1137 | e9f186e5 | Peter A. G. Crosthwaite | break;
|
1138 | e9f186e5 | Peter A. G. Crosthwaite | } |
1139 | e9f186e5 | Peter A. G. Crosthwaite | |
1140 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("newval: 0x%08x\n", s->regs[offset]);
|
1141 | e9f186e5 | Peter A. G. Crosthwaite | } |
1142 | e9f186e5 | Peter A. G. Crosthwaite | |
1143 | e9f186e5 | Peter A. G. Crosthwaite | static const MemoryRegionOps gem_ops = { |
1144 | e9f186e5 | Peter A. G. Crosthwaite | .read = gem_read, |
1145 | e9f186e5 | Peter A. G. Crosthwaite | .write = gem_write, |
1146 | e9f186e5 | Peter A. G. Crosthwaite | .endianness = DEVICE_LITTLE_ENDIAN, |
1147 | e9f186e5 | Peter A. G. Crosthwaite | }; |
1148 | e9f186e5 | Peter A. G. Crosthwaite | |
1149 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_cleanup(VLANClientState *nc) |
1150 | e9f186e5 | Peter A. G. Crosthwaite | { |
1151 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s = DO_UPCAST(NICState, nc, nc)->opaque; |
1152 | e9f186e5 | Peter A. G. Crosthwaite | |
1153 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
1154 | e9f186e5 | Peter A. G. Crosthwaite | s->nic = NULL;
|
1155 | e9f186e5 | Peter A. G. Crosthwaite | } |
1156 | e9f186e5 | Peter A. G. Crosthwaite | |
1157 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_set_link(VLANClientState *nc) |
1158 | e9f186e5 | Peter A. G. Crosthwaite | { |
1159 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
1160 | e9f186e5 | Peter A. G. Crosthwaite | phy_update_link(DO_UPCAST(NICState, nc, nc)->opaque); |
1161 | e9f186e5 | Peter A. G. Crosthwaite | } |
1162 | e9f186e5 | Peter A. G. Crosthwaite | |
1163 | e9f186e5 | Peter A. G. Crosthwaite | static NetClientInfo net_gem_info = {
|
1164 | e9f186e5 | Peter A. G. Crosthwaite | .type = NET_CLIENT_TYPE_NIC, |
1165 | e9f186e5 | Peter A. G. Crosthwaite | .size = sizeof(NICState),
|
1166 | e9f186e5 | Peter A. G. Crosthwaite | .can_receive = gem_can_receive, |
1167 | e9f186e5 | Peter A. G. Crosthwaite | .receive = gem_receive, |
1168 | e9f186e5 | Peter A. G. Crosthwaite | .cleanup = gem_cleanup, |
1169 | e9f186e5 | Peter A. G. Crosthwaite | .link_status_changed = gem_set_link, |
1170 | e9f186e5 | Peter A. G. Crosthwaite | }; |
1171 | e9f186e5 | Peter A. G. Crosthwaite | |
1172 | e9f186e5 | Peter A. G. Crosthwaite | static int gem_init(SysBusDevice *dev) |
1173 | e9f186e5 | Peter A. G. Crosthwaite | { |
1174 | e9f186e5 | Peter A. G. Crosthwaite | GemState *s; |
1175 | e9f186e5 | Peter A. G. Crosthwaite | |
1176 | e9f186e5 | Peter A. G. Crosthwaite | DB_PRINT("\n");
|
1177 | e9f186e5 | Peter A. G. Crosthwaite | |
1178 | e9f186e5 | Peter A. G. Crosthwaite | s = FROM_SYSBUS(GemState, dev); |
1179 | e9f186e5 | Peter A. G. Crosthwaite | gem_init_register_masks(s); |
1180 | e9f186e5 | Peter A. G. Crosthwaite | memory_region_init_io(&s->iomem, &gem_ops, s, "enet", sizeof(s->regs)); |
1181 | e9f186e5 | Peter A. G. Crosthwaite | sysbus_init_mmio(dev, &s->iomem); |
1182 | e9f186e5 | Peter A. G. Crosthwaite | sysbus_init_irq(dev, &s->irq); |
1183 | e9f186e5 | Peter A. G. Crosthwaite | qemu_macaddr_default_if_unset(&s->conf.macaddr); |
1184 | e9f186e5 | Peter A. G. Crosthwaite | |
1185 | e9f186e5 | Peter A. G. Crosthwaite | s->nic = qemu_new_nic(&net_gem_info, &s->conf, |
1186 | e9f186e5 | Peter A. G. Crosthwaite | object_get_typename(OBJECT(dev)), dev->qdev.id, s); |
1187 | e9f186e5 | Peter A. G. Crosthwaite | |
1188 | e9f186e5 | Peter A. G. Crosthwaite | return 0; |
1189 | e9f186e5 | Peter A. G. Crosthwaite | } |
1190 | e9f186e5 | Peter A. G. Crosthwaite | |
1191 | e9f186e5 | Peter A. G. Crosthwaite | static const VMStateDescription vmstate_cadence_gem = { |
1192 | e9f186e5 | Peter A. G. Crosthwaite | .name = "cadence_gem",
|
1193 | e9f186e5 | Peter A. G. Crosthwaite | .version_id = 1,
|
1194 | e9f186e5 | Peter A. G. Crosthwaite | .minimum_version_id = 1,
|
1195 | e9f186e5 | Peter A. G. Crosthwaite | .minimum_version_id_old = 1,
|
1196 | e9f186e5 | Peter A. G. Crosthwaite | .fields = (VMStateField[]) { |
1197 | e9f186e5 | Peter A. G. Crosthwaite | VMSTATE_UINT32_ARRAY(regs, GemState, GEM_MAXREG), |
1198 | e9f186e5 | Peter A. G. Crosthwaite | VMSTATE_UINT16_ARRAY(phy_regs, GemState, 32),
|
1199 | e9f186e5 | Peter A. G. Crosthwaite | VMSTATE_UINT8(phy_loop, GemState), |
1200 | e9f186e5 | Peter A. G. Crosthwaite | VMSTATE_UINT32(rx_desc_addr, GemState), |
1201 | e9f186e5 | Peter A. G. Crosthwaite | VMSTATE_UINT32(tx_desc_addr, GemState), |
1202 | e9f186e5 | Peter A. G. Crosthwaite | } |
1203 | e9f186e5 | Peter A. G. Crosthwaite | }; |
1204 | e9f186e5 | Peter A. G. Crosthwaite | |
1205 | e9f186e5 | Peter A. G. Crosthwaite | static Property gem_properties[] = {
|
1206 | e9f186e5 | Peter A. G. Crosthwaite | DEFINE_NIC_PROPERTIES(GemState, conf), |
1207 | e9f186e5 | Peter A. G. Crosthwaite | DEFINE_PROP_END_OF_LIST(), |
1208 | e9f186e5 | Peter A. G. Crosthwaite | }; |
1209 | e9f186e5 | Peter A. G. Crosthwaite | |
1210 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_class_init(ObjectClass *klass, void *data) |
1211 | e9f186e5 | Peter A. G. Crosthwaite | { |
1212 | e9f186e5 | Peter A. G. Crosthwaite | DeviceClass *dc = DEVICE_CLASS(klass); |
1213 | e9f186e5 | Peter A. G. Crosthwaite | SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); |
1214 | e9f186e5 | Peter A. G. Crosthwaite | |
1215 | e9f186e5 | Peter A. G. Crosthwaite | sdc->init = gem_init; |
1216 | e9f186e5 | Peter A. G. Crosthwaite | dc->props = gem_properties; |
1217 | e9f186e5 | Peter A. G. Crosthwaite | dc->vmsd = &vmstate_cadence_gem; |
1218 | e9f186e5 | Peter A. G. Crosthwaite | dc->reset = gem_reset; |
1219 | e9f186e5 | Peter A. G. Crosthwaite | } |
1220 | e9f186e5 | Peter A. G. Crosthwaite | |
1221 | e9f186e5 | Peter A. G. Crosthwaite | static TypeInfo gem_info = {
|
1222 | e9f186e5 | Peter A. G. Crosthwaite | .class_init = gem_class_init, |
1223 | e9f186e5 | Peter A. G. Crosthwaite | .name = "cadence_gem",
|
1224 | e9f186e5 | Peter A. G. Crosthwaite | .parent = TYPE_SYS_BUS_DEVICE, |
1225 | e9f186e5 | Peter A. G. Crosthwaite | .instance_size = sizeof(GemState),
|
1226 | e9f186e5 | Peter A. G. Crosthwaite | }; |
1227 | e9f186e5 | Peter A. G. Crosthwaite | |
1228 | e9f186e5 | Peter A. G. Crosthwaite | static void gem_register_types(void) |
1229 | e9f186e5 | Peter A. G. Crosthwaite | { |
1230 | e9f186e5 | Peter A. G. Crosthwaite | type_register_static(&gem_info); |
1231 | e9f186e5 | Peter A. G. Crosthwaite | } |
1232 | e9f186e5 | Peter A. G. Crosthwaite | |
1233 | e9f186e5 | Peter A. G. Crosthwaite | type_init(gem_register_types) |