Revision 3a9d8549 hw/piix_pci.c
b/hw/piix_pci.c | ||
---|---|---|
228 | 228 |
{ |
229 | 229 |
PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
230 | 230 |
|
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pci_config_set_vendor_id(d->dev.config, PCI_VENDOR_ID_INTEL); |
|
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pci_config_set_device_id(d->dev.config, PCI_DEVICE_ID_INTEL_82441); |
|
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d->dev.config[0x08] = 0x02; // revision |
|
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pci_config_set_class(d->dev.config, PCI_CLASS_BRIDGE_HOST); |
|
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|
|
236 | 231 |
d->dev.config[I440FX_SMRAM] = 0x02; |
237 | 232 |
|
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cpu_smm_register(&i440fx_set_smm, d); |
... | ... | |
406 | 401 |
static int piix3_initfn(PCIDevice *dev) |
407 | 402 |
{ |
408 | 403 |
PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev); |
409 |
uint8_t *pci_conf; |
|
410 | 404 |
|
411 | 405 |
isa_bus_new(&d->dev.qdev); |
412 |
|
|
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pci_conf = d->dev.config; |
|
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pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); |
|
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pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) |
|
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pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); |
|
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|
|
418 | 406 |
qemu_register_reset(piix3_reset, d); |
419 | 407 |
return 0; |
420 | 408 |
} |
... | ... | |
429 | 417 |
.no_hotplug = 1, |
430 | 418 |
.init = i440fx_initfn, |
431 | 419 |
.config_write = i440fx_write_config, |
420 |
.vendor_id = PCI_VENDOR_ID_INTEL, |
|
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.device_id = PCI_DEVICE_ID_INTEL_82441, |
|
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.revision = 0x02, |
|
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.class_id = PCI_CLASS_BRIDGE_HOST, |
|
432 | 424 |
},{ |
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.qdev.name = "PIIX3", |
434 | 426 |
.qdev.desc = "ISA bridge", |
... | ... | |
438 | 430 |
.no_hotplug = 1, |
439 | 431 |
.init = piix3_initfn, |
440 | 432 |
.config_write = piix3_write_config, |
433 |
.vendor_id = PCI_VENDOR_ID_INTEL, |
|
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.device_id = PCI_DEVICE_ID_INTEL_82371SB_0, // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) |
|
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.class_id = PCI_CLASS_BRIDGE_ISA, |
|
441 | 436 |
},{ |
442 | 437 |
/* end of list */ |
443 | 438 |
} |
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