Revision 3ad4bb2d target-mips/translate.c
| b/target-mips/translate.c | ||
|---|---|---|
| 1368 | 1368 |
static void gen_compute_branch (DisasContext *ctx, uint32_t opc, |
| 1369 | 1369 |
int rs, int rt, int32_t offset) |
| 1370 | 1370 |
{
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| 1371 |
target_ulong btarget; |
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| 1372 |
int blink, bcond; |
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| 1371 |
target_ulong btarget = -1; |
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| 1372 |
int blink = 0; |
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| 1373 |
int bcond = 0; |
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| 1374 |
|
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| 1375 |
if (ctx->hflags & MIPS_HFLAG_BMASK) {
|
|
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if (loglevel & CPU_LOG_TB_IN_ASM) {
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fprintf(logfile, |
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"undefined branch in delay slot at pc 0x%08x\n", ctx->pc); |
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} |
|
| 1380 |
MIPS_INVAL("branch/jump in bdelay slot");
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| 1381 |
generate_exception(ctx, EXCP_RI); |
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| 1382 |
return; |
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| 1383 |
} |
|
| 1373 | 1384 |
|
| 1374 |
btarget = -1; |
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| 1375 |
blink = 0; |
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| 1376 |
bcond = 0; |
|
| 1377 | 1385 |
/* Load needed operands */ |
| 1378 | 1386 |
switch (opc) {
|
| 1379 | 1387 |
case OPC_BEQ: |
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