Revision 3b6dac34 tcg/tcg.c
b/tcg/tcg.c | ||
---|---|---|
1547 | 1547 |
reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs); |
1548 | 1548 |
} |
1549 | 1549 |
if (ts->reg != reg) { |
1550 |
tcg_out_mov(s, reg, ts->reg); |
|
1550 |
tcg_out_mov(s, ots->type, reg, ts->reg);
|
|
1551 | 1551 |
} |
1552 | 1552 |
} |
1553 | 1553 |
} else if (ts->val_type == TEMP_VAL_MEM) { |
... | ... | |
1652 | 1652 |
/* allocate a new register matching the constraint |
1653 | 1653 |
and move the temporary register into it */ |
1654 | 1654 |
reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); |
1655 |
tcg_out_mov(s, reg, ts->reg); |
|
1655 |
tcg_out_mov(s, ts->type, reg, ts->reg);
|
|
1656 | 1656 |
} |
1657 | 1657 |
new_args[i] = reg; |
1658 | 1658 |
const_args[i] = 0; |
... | ... | |
1734 | 1734 |
ts = &s->temps[args[i]]; |
1735 | 1735 |
reg = new_args[i]; |
1736 | 1736 |
if (ts->fixed_reg && ts->reg != reg) { |
1737 |
tcg_out_mov(s, ts->reg, reg); |
|
1737 |
tcg_out_mov(s, ts->type, ts->reg, reg);
|
|
1738 | 1738 |
} |
1739 | 1739 |
} |
1740 | 1740 |
} |
... | ... | |
1820 | 1820 |
tcg_reg_free(s, reg); |
1821 | 1821 |
if (ts->val_type == TEMP_VAL_REG) { |
1822 | 1822 |
if (ts->reg != reg) { |
1823 |
tcg_out_mov(s, reg, ts->reg); |
|
1823 |
tcg_out_mov(s, ts->type, reg, ts->reg);
|
|
1824 | 1824 |
} |
1825 | 1825 |
} else if (ts->val_type == TEMP_VAL_MEM) { |
1826 | 1826 |
tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
... | ... | |
1849 | 1849 |
reg = ts->reg; |
1850 | 1850 |
if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) { |
1851 | 1851 |
reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); |
1852 |
tcg_out_mov(s, reg, ts->reg); |
|
1852 |
tcg_out_mov(s, ts->type, reg, ts->reg);
|
|
1853 | 1853 |
} |
1854 | 1854 |
func_arg = reg; |
1855 | 1855 |
tcg_regset_set_reg(allocated_regs, reg); |
... | ... | |
1908 | 1908 |
assert(s->reg_to_temp[reg] == -1); |
1909 | 1909 |
if (ts->fixed_reg) { |
1910 | 1910 |
if (ts->reg != reg) { |
1911 |
tcg_out_mov(s, ts->reg, reg); |
|
1911 |
tcg_out_mov(s, ts->type, ts->reg, reg);
|
|
1912 | 1912 |
} |
1913 | 1913 |
} else { |
1914 | 1914 |
if (ts->val_type == TEMP_VAL_REG) |
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