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1	0bf43016	cmchao	/*
2	0bf43016	cmchao	* TI OMAP SDRAM controller emulation.
3	0bf43016	cmchao	*
4	0bf43016	cmchao	* Copyright (C) 2007-2008 Nokia Corporation
5	0bf43016	cmchao	* Written by Andrzej Zaborowski <andrew@openedhand.com>
6	0bf43016	cmchao	*
7	0bf43016	cmchao	* This program is free software; you can redistribute it and/or
8	0bf43016	cmchao	* modify it under the terms of the GNU General Public License as
9	0bf43016	cmchao	* published by the Free Software Foundation; either version 2 or
10	0bf43016	cmchao	* (at your option) any later version of the License.
11	0bf43016	cmchao	*
12	0bf43016	cmchao	* This program is distributed in the hope that it will be useful,
13	0bf43016	cmchao	* but WITHOUT ANY WARRANTY; without even the implied warranty of
14	0bf43016	cmchao	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15	0bf43016	cmchao	* GNU General Public License for more details.
16	0bf43016	cmchao	*
17	0bf43016	cmchao	* You should have received a copy of the GNU General Public License along
18	0bf43016	cmchao	* with this program; if not, see <http://www.gnu.org/licenses/>.
19	0bf43016	cmchao	*/
20	83c9f4ca	Paolo Bonzini	#include "hw/hw.h"
21	0d09e41a	Paolo Bonzini	#include "hw/arm/omap.h"
22	0bf43016	cmchao
23	0bf43016	cmchao	/* SDRAM Controller Subsystem */
24	0bf43016	cmchao	struct omap_sdrc_s {
25	6a0148e7	Avi Kivity	MemoryRegion iomem;
26	0bf43016	cmchao	uint8_t config;
27	0bf43016	cmchao	};
28	0bf43016	cmchao
29	0bf43016	cmchao	void omap_sdrc_reset(struct omap_sdrc_s *s)
30	0bf43016	cmchao	{
31	0bf43016	cmchao	s->config = 0x10;
32	0bf43016	cmchao	}
33	0bf43016	cmchao
34	a8170e5e	Avi Kivity	static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
35	6a0148e7	Avi Kivity	unsigned size)
36	0bf43016	cmchao	{
37	0bf43016	cmchao	struct omap_sdrc_s s = (struct omap_sdrc_s ) opaque;
38	0bf43016	cmchao
39	6a0148e7	Avi Kivity	if (size != 4) {
40	6a0148e7	Avi Kivity	return omap_badwidth_read32(opaque, addr);
41	6a0148e7	Avi Kivity	}
42	6a0148e7	Avi Kivity
43	0bf43016	cmchao	switch (addr) {
44	0bf43016	cmchao	case 0x00: /* SDRC_REVISION */
45	0bf43016	cmchao	return 0x20;
46	0bf43016	cmchao
47	0bf43016	cmchao	case 0x10: /* SDRC_SYSCONFIG */
48	0bf43016	cmchao	return s->config;
49	0bf43016	cmchao
50	0bf43016	cmchao	case 0x14: /* SDRC_SYSSTATUS */
51	0bf43016	cmchao	return 1; /* RESETDONE */
52	0bf43016	cmchao
53	0bf43016	cmchao	case 0x40: /* SDRC_CS_CFG */
54	0bf43016	cmchao	case 0x44: /* SDRC_SHARING */
55	0bf43016	cmchao	case 0x48: /* SDRC_ERR_ADDR */
56	0bf43016	cmchao	case 0x4c: /* SDRC_ERR_TYPE */
57	0bf43016	cmchao	case 0x60: /* SDRC_DLLA_SCTRL */
58	0bf43016	cmchao	case 0x64: /* SDRC_DLLA_STATUS */
59	0bf43016	cmchao	case 0x68: /* SDRC_DLLB_CTRL */
60	0bf43016	cmchao	case 0x6c: /* SDRC_DLLB_STATUS */
61	0bf43016	cmchao	case 0x70: /* SDRC_POWER */
62	0bf43016	cmchao	case 0x80: /* SDRC_MCFG_0 */
63	0bf43016	cmchao	case 0x84: /* SDRC_MR_0 */
64	0bf43016	cmchao	case 0x88: /* SDRC_EMR1_0 */
65	0bf43016	cmchao	case 0x8c: /* SDRC_EMR2_0 */
66	0bf43016	cmchao	case 0x90: /* SDRC_EMR3_0 */
67	0bf43016	cmchao	case 0x94: /* SDRC_DCDL1_CTRL */
68	0bf43016	cmchao	case 0x98: /* SDRC_DCDL2_CTRL */
69	0bf43016	cmchao	case 0x9c: /* SDRC_ACTIM_CTRLA_0 */
70	0bf43016	cmchao	case 0xa0: /* SDRC_ACTIM_CTRLB_0 */
71	0bf43016	cmchao	case 0xa4: /* SDRC_RFR_CTRL_0 */
72	0bf43016	cmchao	case 0xa8: /* SDRC_MANUAL_0 */
73	0bf43016	cmchao	case 0xb0: /* SDRC_MCFG_1 */
74	0bf43016	cmchao	case 0xb4: /* SDRC_MR_1 */
75	0bf43016	cmchao	case 0xb8: /* SDRC_EMR1_1 */
76	0bf43016	cmchao	case 0xbc: /* SDRC_EMR2_1 */
77	0bf43016	cmchao	case 0xc0: /* SDRC_EMR3_1 */
78	0bf43016	cmchao	case 0xc4: /* SDRC_ACTIM_CTRLA_1 */
79	0bf43016	cmchao	case 0xc8: /* SDRC_ACTIM_CTRLB_1 */
80	0bf43016	cmchao	case 0xd4: /* SDRC_RFR_CTRL_1 */
81	0bf43016	cmchao	case 0xd8: /* SDRC_MANUAL_1 */
82	0bf43016	cmchao	return 0x00;
83	0bf43016	cmchao	}
84	0bf43016	cmchao
85	0bf43016	cmchao	OMAP_BAD_REG(addr);
86	0bf43016	cmchao	return 0;
87	0bf43016	cmchao	}
88	0bf43016	cmchao
89	a8170e5e	Avi Kivity	static void omap_sdrc_write(void *opaque, hwaddr addr,
90	6a0148e7	Avi Kivity	uint64_t value, unsigned size)
91	0bf43016	cmchao	{
92	0bf43016	cmchao	struct omap_sdrc_s s = (struct omap_sdrc_s ) opaque;
93	0bf43016	cmchao
94	6a0148e7	Avi Kivity	if (size != 4) {
95	6a0148e7	Avi Kivity	return omap_badwidth_write32(opaque, addr, value);
96	6a0148e7	Avi Kivity	}
97	6a0148e7	Avi Kivity
98	0bf43016	cmchao	switch (addr) {
99	0bf43016	cmchao	case 0x00: /* SDRC_REVISION */
100	0bf43016	cmchao	case 0x14: /* SDRC_SYSSTATUS */
101	0bf43016	cmchao	case 0x48: /* SDRC_ERR_ADDR */
102	0bf43016	cmchao	case 0x64: /* SDRC_DLLA_STATUS */
103	0bf43016	cmchao	case 0x6c: /* SDRC_DLLB_STATUS */
104	0bf43016	cmchao	OMAP_RO_REG(addr);
105	0bf43016	cmchao	return;
106	0bf43016	cmchao
107	0bf43016	cmchao	case 0x10: /* SDRC_SYSCONFIG */
108	0bf43016	cmchao	if ((value >> 3) != 0x2)
109	0bf43016	cmchao	fprintf(stderr, "%s: bad SDRAM idle mode %i\n",
110	6a0148e7	Avi Kivity	__FUNCTION__, (unsigned)value >> 3);
111	0bf43016	cmchao	if (value & 2)
112	0bf43016	cmchao	omap_sdrc_reset(s);
113	0bf43016	cmchao	s->config = value & 0x18;
114	0bf43016	cmchao	break;
115	0bf43016	cmchao
116	0bf43016	cmchao	case 0x40: /* SDRC_CS_CFG */
117	0bf43016	cmchao	case 0x44: /* SDRC_SHARING */
118	0bf43016	cmchao	case 0x4c: /* SDRC_ERR_TYPE */
119	0bf43016	cmchao	case 0x60: /* SDRC_DLLA_SCTRL */
120	0bf43016	cmchao	case 0x68: /* SDRC_DLLB_CTRL */
121	0bf43016	cmchao	case 0x70: /* SDRC_POWER */
122	0bf43016	cmchao	case 0x80: /* SDRC_MCFG_0 */
123	0bf43016	cmchao	case 0x84: /* SDRC_MR_0 */
124	0bf43016	cmchao	case 0x88: /* SDRC_EMR1_0 */
125	0bf43016	cmchao	case 0x8c: /* SDRC_EMR2_0 */
126	0bf43016	cmchao	case 0x90: /* SDRC_EMR3_0 */
127	0bf43016	cmchao	case 0x94: /* SDRC_DCDL1_CTRL */
128	0bf43016	cmchao	case 0x98: /* SDRC_DCDL2_CTRL */
129	0bf43016	cmchao	case 0x9c: /* SDRC_ACTIM_CTRLA_0 */
130	0bf43016	cmchao	case 0xa0: /* SDRC_ACTIM_CTRLB_0 */
131	0bf43016	cmchao	case 0xa4: /* SDRC_RFR_CTRL_0 */
132	0bf43016	cmchao	case 0xa8: /* SDRC_MANUAL_0 */
133	0bf43016	cmchao	case 0xb0: /* SDRC_MCFG_1 */
134	0bf43016	cmchao	case 0xb4: /* SDRC_MR_1 */
135	0bf43016	cmchao	case 0xb8: /* SDRC_EMR1_1 */
136	0bf43016	cmchao	case 0xbc: /* SDRC_EMR2_1 */
137	0bf43016	cmchao	case 0xc0: /* SDRC_EMR3_1 */
138	0bf43016	cmchao	case 0xc4: /* SDRC_ACTIM_CTRLA_1 */
139	0bf43016	cmchao	case 0xc8: /* SDRC_ACTIM_CTRLB_1 */
140	0bf43016	cmchao	case 0xd4: /* SDRC_RFR_CTRL_1 */
141	0bf43016	cmchao	case 0xd8: /* SDRC_MANUAL_1 */
142	0bf43016	cmchao	break;
143	0bf43016	cmchao
144	0bf43016	cmchao	default:
145	0bf43016	cmchao	OMAP_BAD_REG(addr);
146	0bf43016	cmchao	return;
147	0bf43016	cmchao	}
148	0bf43016	cmchao	}
149	0bf43016	cmchao
150	6a0148e7	Avi Kivity	static const MemoryRegionOps omap_sdrc_ops = {
151	6a0148e7	Avi Kivity	.read = omap_sdrc_read,
152	6a0148e7	Avi Kivity	.write = omap_sdrc_write,
153	6a0148e7	Avi Kivity	.endianness = DEVICE_NATIVE_ENDIAN,
154	0bf43016	cmchao	};
155	0bf43016	cmchao
156	6a0148e7	Avi Kivity	struct omap_sdrc_s omap_sdrc_init(MemoryRegion sysmem,
157	a8170e5e	Avi Kivity	hwaddr base)
158	0bf43016	cmchao	{
159	0bf43016	cmchao	struct omap_sdrc_s s = (struct omap_sdrc_s )
160	7267c094	Anthony Liguori	g_malloc0(sizeof(struct omap_sdrc_s));
161	0bf43016	cmchao
162	0bf43016	cmchao	omap_sdrc_reset(s);
163	0bf43016	cmchao
164	6a0148e7	Avi Kivity	memory_region_init_io(&s->iomem, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
165	6a0148e7	Avi Kivity	memory_region_add_subregion(sysmem, base, &s->iomem);
166	0bf43016	cmchao
167	0bf43016	cmchao	return s;
168	0bf43016	cmchao	}

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root / hw / omap_sdrc.c @ 3bd88451