Revision 3c4c9f9f target-ppc/cpu.h

b/target-ppc/cpu.h
693 693 
    /* temporary fixed-point registers
694 694 
     * used to emulate 64 bits target on 32 bits hosts
695 695 
     */
696 
    target_ulong t0, t1, t2;
696 
    ppc_gpr_t t0, t1, t2;
697 697 
#endif
698 698 
    ppc_avr_t t0_avr, t1_avr, t2_avr;
699 699 

  		












Also available in:
  Unified diff